CN102031525B - Method for etching deep through silicon via (TSV) - Google Patents
Method for etching deep through silicon via (TSV) Download PDFInfo
- Publication number
- CN102031525B CN102031525B CN200910196781.5A CN200910196781A CN102031525B CN 102031525 B CN102031525 B CN 102031525B CN 200910196781 A CN200910196781 A CN 200910196781A CN 102031525 B CN102031525 B CN 102031525B
- Authority
- CN
- China
- Prior art keywords
- gas
- etching
- etch step
- silicon
- tsv
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention provides a method for etching a deep through silicon via (TSV), belonging to the technical field of semiconductor manufacturing. The etching method comprises a reaction ion etching step and a polymer deposition step which are alternately carried out, wherein gases adopted in the etching step comprise a first gas for chemical reaction plasma etching of silicon and a second gas which reacts with the silicon to form a silicide protection film. When used for etching the TSV, the etching method has the characteristics of high etching efficiency and good smoothness of the side wall of the TSV.
Description
Technical field
The invention belongs to technical field of manufacturing semiconductors, be specifically related to reactive ion etching (Reactive Icon Etching, RIE) technology, relate in particular to (Through-Silicon-Via, TSV) lithographic method of a kind of dark silicon through hole.
Background technology
In technical field of manufacturing semiconductors, in fields such as MEMS (Micro-Electro-Mechanical Systems, MEMS (micro electro mechanical system)) and 3D encapsulation technologies, conventionally need to carry out deep via etching to materials such as silicon.For example, in body silicon etching technology, the degree of depth of dark silicon through hole (Through-Silicon-Via, TSV) reaches hundreds of micron, its depth-to-width ratio even much larger than 10, conventionally adopts reactive ion etching method to come etching body silicon to form.
Figure 1 shows that the lithographic method schematic diagram of the dark silicon through hole of prior art.In prior art, the Bosch technique that the reactive ion etching of TSV adopts US Patent No. 5501893 to propose is conventionally carried out.As shown in Figure 1, wherein, 12 is substrate silicon, and 11 is mask layer, and 13 is polymer layer; Mask layer 11 is generally SiO
2or Si
3n
4, mainly in etching process, play mask effect.Concrete reactive ion etching method comprises the following steps: (1) etch step, conventionally use Ar, SF
6mixed gas carry out plasma etching, (2) polymer deposition step, uses Ar and C conventionally
4f
8mixed gas at hole medial surface, form fluorocarbon polymer layer, its thickness is generally at nano level, sometimes also referred to as this polymer layer, be passivation layer, (3) etch step and polymer deposition step hocket, until dark silicon via etch completes, in etch step, internal surface due to hole, especially at hole medial surface deposited polymer, the polymkeric substance of the plasma bombardment bottom of vertical incidence, make the etching of vertical direction continue to carry out downwards, and so the reservation etching rate due to polymkeric substance of sidewall is very low, thereby guaranteed the anisotropy of whole hole etching process.Particularly, in etching process, adopt inductively-coupled plasma sources (Inductive Coupled Plasma, CCP) technology, can accelerate etching speed in the vertical direction, anisotropic properties is better.
But; while adopting the method etching TSV shown in Fig. 1; when some etch step; in the depth range that etching forms in step; its sidewall is that the polymkeric substance not forming by polymer deposition step is protected; therefore,, in an independent etch step, its etching is isotropic.In the TSV lithographic method of prior art, generally by being set for example, for shorter (2 seconds) each etch step time, etching depth is also less than 1 μ m, because be so that the recess of the larger sidewall of etching depth of the single etch step of isotropy etching also can be larger in etch step, in order to make whole etching, be anisotropic, after completing an etch step, switch and carry out polymer deposition step one time at once, like this, make on the whole etching process show as anisotropy.The drawback that such method exists is: (1) each etch step time is short, etch step and polymer deposition step switching frequency are high, the time of etch step is usually less than half of time of whole TSV etching process, and the efficiency ratio of etching is lower, and the speed of TSV etching is also relatively low; (2) because each independent etch step is relatively isotropic, so the sidewall that each etch step forms can form arc shape, the alternately place of etch step and polymer deposition step, can form a pimple (being highly about 200-500 dust), thereby the TSV that DRIE etching is formed has " fan-shaped (Scalloping) " sidewall as shown in Figure 1, reduce the slickness of the sidewall of deep via.
Except above-mentioned Bosch lithographic method, also there is single step lithographic method in prior art, using etching gas as SF
6provide sidewall shielding gas as polymer deposition gas C when realizing etching
4f
8or a small amount of oxygen.Etch step wants the degree of depth of the silicon chip of etching to reach hundreds of micron due to one time to adopt single step lithographic method; the depth-to-width ratio of etched hole (aspect ratio) is greater than 20 even 100, so will realize the etching of deep hole silicon in an etch step, must provide enough protections by oppose side wall.The more protection of oppose side wall will reduce the etching speed of silicon significantly, and sidewall shielding gas is as C simultaneously
4f
8deng meeting, in sidewall accumulation, it is more that etching time accumulates more for a long time, and can at the opening in etch silicon hole, form very thick accumulation horizon affect the further etch rate that reduced of entering of reactant gases.Single step lithographic method need to be realized the protection that oppose side wall in very long etching time was wanted and guaranteed to etching in an etching process simultaneously; but along with the accumulation of increase polymkeric substance and the reduction of etching speed of etching depth all can affect final performance, with single step etching method be difficult to realize high speed etching again oppose side wall carry out enough protections.So industry member simple can realize the smooth enough technology of sidewall that quick etching deep hole silicon can guarantee again etch silicon hole in the urgent need to a kind of.
Summary of the invention
The technical problem to be solved in the present invention is to improve the etching efficiency of dark silicon through hole and avoid " fan-shaped " sidewall of the formed dark silicon through hole of etching to occur.
For solving above technical problem; the lithographic method that carries out dark silicon through hole in condenser coupling plasma reaction chamber provided by the invention; comprise the etch step and the polymer deposition step that adopt reactive ion etching; described etch step and polymer deposition step hocket; it is characterized in that, the gas that described etch step adopts comprises for the first gas of chemical reaction plasma etching silicon with for the second gas with pasc reaction formation silicides protection film.
According to the lithographic method of dark silicon through hole provided by the invention, wherein, the gas that described polymer deposition step adopts comprises the 3rd gas that forms polymkeric substance for ionic reaction.Described the first gas is SF
6, NF
3in a kind of.Described the second gas is O
2, CO
2, N
2in a kind of, or be O
2, CO
2, N
2any combination.Described the second gas is O
2time, silicides protection film comprises silicon carbon compound, silicon oxide compound and silicon-carbon-oxygen compound.Described the second gas is N
2and O
2mixed gas time, N
2and O
2gas flow ratio be 10: 1, silicides protection film comprises silicon-nitrogen compound, silicon oxide compound and silicon oxynitrides.
According to the lithographic method of dark silicon through hole provided by the invention, wherein, the gas flow ratio scope of described the first gas and the second gas is: SF
6: 300-500sccm, CO
2: the reactive ion etching radio frequency power condition of 400-600sccm etch step is: 1500W, and 600MHz, the radio frequency power condition of described polymer deposition step is 1500W, 60MHz or 2500W, 2MHz.The reactive ion etching air pressure conditions of etch step is: 300mtorr or 200-600mtorr, the air pressure conditions of described polymer deposition step is that etch step adopts capacitively coupled plasma source technology described in 300-450mtorr.The gas that described etch step adopts also comprises argon.
As preferred technique scheme, the gas that described etch step adopts comprises the 3rd gas that forms polymkeric substance for ionic reaction.The gas flow of described the first gas, the second gas and the 3rd gas is controlled by flow director.Described the 3rd gas is C
4f
8, C
4f
6, CHF
3, CH
2f
2in a kind of.The gas that described polymer deposition step adopts also comprises argon.
Technique effect of the present invention is; by passing in etch step for the second gas with pasc reaction formation silicides protection film; in the first aerochemistry reactive ion etching silicon; the silicides protection film forming is covered in the sidewall of the TSV having formed; be conducive to improve in etch step the etch rate ratio to bottom and oppose side wall respectively; make etch step anisotropic properties better, thereby can extend the time of each step etch step.Therefore,, while using the method etching to form TSV, have that etching efficiency is high, the good feature of TSV through-hole side wall slickness.
Accompanying drawing explanation
Fig. 1 is the lithographic method schematic diagram of the dark silicon through hole of prior art;
Fig. 2 is the schematic flow sheet of the first embodiment TSV lithographic method provided by the invention;
Fig. 3 is the schematic flow sheet of the second embodiment TSV lithographic method provided by the invention.
Fig. 4 is the etching effect schematic diagram of the specific embodiment of the invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, the present invention is described in further detail.
Figure 2 shows that the schematic flow sheet of the first embodiment TSV lithographic method provided by the invention.In this TSV lithographic method, for body silicon is carried out to etching, the form parameters such as the degree of depth of the TSV through hole that specific requirement etching forms, width, aperture are not limited by the present invention, and it can require to determine according to different technology conditions.In this embodiment, for the dark TSV through hole of etching 60 μ m.Below in conjunction with concrete steps, the first embodiment TSV lithographic method shown in Fig. 2 is elaborated.
In this step, adopt reactive ion etching to carry out etching to body silicon, on body silicon, there is the mask layer as shown in 11 of Fig. 1, for TSV is carried out to composition.In this specific embodiment, etching reaction chamber adopts capacitively coupled plasma source technology, due to condenser coupling type reaction chamber (CCP) air pressure, to compare jigger coupling type reaction chamber (ICP) higher, nearly hundreds of mtorr and jigger coupling type only has tens mtorr, so the frequent etch step of switching and reaction gas are known from experience the displacement of having spent more time realization response gas in CCP reaction chamber.The emphasis point of this invention is the selection of the etching gas of etch step, therefore, for other processing condition of etch step, is not described in detail, and the method for itself and traditional Bosch technique etching TSV is similar.We define SF
6for the first gas for chemical reaction plasma etching silicon.Selecting in this embodiment the first gas is SF
6, but being not limited to this, the first gas can also be NF
3deng.CO
2gas is decomposed to form C plasma body and O plasma body under action of plasma; C plasma body and O plasma are known from experience and surperficial silicon effect; at silicon face, form the silicides protection film of silicon carbon compound (SiC), silicon oxide compound (SiO) and silicon-carbon-oxygen compound (SiCO); in this embodiment, the main component in silicides protection film is silicon-carbon-oxygen compound.Therefore, we define CO
2for the second gas that is used to form silicides protection film in etch step.The second gas is chosen as CO in this embodiment
2, but being not limited to this, the second gas can also be CO, O
2, CO
2, NO, N
2, combination, for example, the second gas is chosen as N
2and O
2mixed gas, N
2and O
2gas flow ratio be 10: 1, the silicides protection film now forming comprises silicon-nitrogen compound (SiN), silicon oxide compound (SiO) and silicon oxynitrides (SiNO).In other specific embodiment, the second gas is not generally chosen as separately O
2, or generally do not select a large amount of O
2, this is because O
2during as the second gas, itself and pasc reaction highly sensitive, the silicides protection film component of its formation and thickness etc. are difficult to control.In etching process, due to CO
2the existence of this second gas, can form at the sidewall of the TSV forming the sidewall protection layer (the silicides protection film that is formed at TSV bottom can be got rid of at once under the corrasion of vertical high power plasma) of nanometer grade thickness, i.e. silicides protection film.The F plasma that this silicides protection film can make the first γ-ray emission can not produce etching effect or greatly weaken the etching effect of oppose side wall its inner side-wall, and this is to have because this silicides protection film is to be not easy to the chemical reaction etching by the plasma body of the first γ-ray emission institute with respect to silicon.For example in this embodiment, in etch step, the etch rate of vertical direction and sidewall direction ratio can reach 100: 1.Therefore, CO
2deng the existence of the second gas, can greatly reduce the etching of oppose side wall in etch step, make this etch step region anisotropy, the sidewall of each etch step formation TSV is curved shape relatively vertically and not.Ar gas is the gas all passing in general reactive ion etching process, and its concrete flow range is not limited by the present invention.In this embodiment, SF
6the first gas and CO
2the gas flow SF of the second gas
6for 450sccm, CO
2for 600sccm, Ar can be 300sccm, and pneumatic parameter is 200-500mtorr.
In this step, can pass through MFC (Mass Flow Control, flow director) and control respectively SF
6, CO
2, Ar gas flow, before etch step stops, thus due to etch step in the embodiment of the present invention have good anisotropy do not need phase prior art carry out like that frequently etching and polymer deposition step alternately with the fan-shaped degree of depth that guarantees sidewall within the acceptable range.So the etch step execution time of the present invention can be very long, the time that etch step maintains (be generally 5-30 second) extended greatly with respect to the etch step time in the Bosch processing step of prior art (be generally 1-5 second), therefore, in this embodiment, etch step can complete the etching of the degree of depth of the 10-15 μ m of TSV.As shown in Figure 4, the empty sidewall that etching forms is vertical, basically identical with the verticality of mask layer 110, and due to the speed of substrate silicon 120 downward etchings also can be reduced to gas switching times by etching-deposition cycle still less much larger than the etching speed to sidewall (100: 1) so each etch step can complete the etching that reaches same even depth than the darker depth ratio of 1 μ m of existing Bosch method as being greater than 2.5 μ m or 3 μ m, can also meet the requirement of oppose side wall slickness simultaneously.The etching depth of each step can need to be selected voluntarily according to specific product processing.
In this step, in the medial surface formation fluorocarbon polymer layer of TSV, its thickness, generally at nano level, is passivation layer also referred to as this polymer layer sometimes.We define C
4f
8gas is that the 3rd gas is chosen as C in this embodiment for forming the 3rd gas of polymkeric substance
4f
8, but being not limited to this, the 3rd gas can also be C
4f
6, CHF
3, CH
2f
2in a kind of.By polymer deposition step; can be in the medial surface formation of deposits polymer foil of TSV; on the basis of original Si-O-C compound sidewall protection layer, add another layer of sidewall protection; when the vertical plasma etching of follow-up etch step; the etching speed of vertical direction is far longer than the etching speed of oppose side wall, thereby further highlights the anisotropic feature of whole TSV etching process.
In this step, can pass through MFC (Mass Flow Control, flow director) and control respectively C
4f
8, Ar gas flow, C
4f
8gas flow stops, and represents that polymer deposition step stops.Owing to also needing to use Ar in follow-up etch step, Ar does not stop immediately at this, in follow-up etch step, regulates the gas flow of Ar.In this embodiment, the time of polymer deposition step is 1-3 second, and the time of etch step is the more than 10 times or 10 times of time of polymer deposition step, therefore, in the lithographic method of this TSV, the time of more ratios, for the etching of silicon, can be improved the etching efficiency of TSV greatly.Meanwhile, also reduced the switching frequency of etch step and polymer deposition step, be relatively easy to control.
After step 105, repeat to enter step 101, thereby etch step and polymer deposition step are hocketed, probably, after 6 circulations, the degree of depth of TSV can reach 60 predetermined μ m, and the TSV lithographic method of this embodiment finishes.
Figure 3 shows that the schematic flow sheet of the second embodiment TSV lithographic method provided by the invention.In this TSV lithographic method, for body silicon is carried out to etching, the form parameters such as the degree of depth of the TSV through hole that specific requirement etching forms, width, aperture are not limited by the present invention, and it can require to determine according to different technology conditions.In this embodiment, for the dark TSV through hole of etching 60 μ m.Below in conjunction with concrete steps, the second embodiment TSV lithographic method shown in Fig. 3 is elaborated.
In this step, adopt reactive ion etching to carry out etching to body silicon, on body silicon, there is the mask layer as shown in 11 of Fig. 1, for TSV is carried out to composition.In this specific embodiment, the emphasis point of this invention is the selection of the etching gas of etch step, therefore, for other processing condition of etch step, is not described in detail, and the method for itself and traditional Bosch technique etching TSV is similar.We define SF
6for the first gas for chemical reaction plasma etching silicon.Selecting in this embodiment the first gas is SF
6, but being not limited to this, the first gas can also be CF
4, NF
3deng.CO
2gas is decomposed to form C plasma body and O plasma body under action of plasma; C plasma body and O plasma are known from experience the silicon effect showing; at silicon face, form the silicides protection film of silicon carbon compound (SiC), silicon oxide compound (SiO) and silicon-carbon-oxygen compound (SiCO); in this embodiment, the main component in silicides protection film is silicon-carbon-oxygen compound.Therefore, we define CO
2for the second gas that is used to form silicides protection film in etch step.The second gas is chosen as CO in this embodiment
2, but being not limited to this, the second gas can be CO, O
2, CO
2, NO, N
2combination, due to the aforementioned problem existing with purity oxygen, so oxygen content will be far below the content of carbon or nitrogen while adopting mixed gas, for example, the second gas is chosen as N
2and O
2mixed gas, N
2and O
2gas flow ratio be 10: 1, the silicides protection film now forming comprises silicon-nitrogen compound (SiN), silicon oxide compound (SiO) and silicon oxynitrides (SiNO).In other specific embodiment, the second gas is not generally chosen as separately O
2, or generally do not select a large amount of O
2, this is because O
2during as the second gas, itself and pasc reaction highly sensitive, the silicides protection film component of its formation and thickness etc. are difficult to control.The difference of the first embodiment shown in this embodiment and Fig. 2 is, the C that adds polymer deposition step to adopt in etch step
4f
8gas.We define C
4f
8gas is that the 3rd gas is chosen as C in this embodiment for forming the 3rd gas of polymkeric substance
4f
8, but being not limited to this, the 3rd gas can also be C
4f
6, CHF
3, CH
2f
2in a kind of.In etching process, due to CO
2the existence of this second gas, can form at the sidewall of the TSV forming the sidewall protection layer (the silicides protection film that is formed at TSV bottom can be got rid of at once under the bombardment effect of vertical high power plasma) of nanometer grade thickness.The F plasma that this sidewall protection layer can make the first γ-ray emission can not produce etching effect or greatly weaken the etching effect of oppose side wall its inner side-wall, and this is to have because this silicides protection film is to be not easy to the chemical reaction etching by the plasma body of the first γ-ray emission institute with respect to silicon.For example in this embodiment, in etch step, the etch rate of vertical direction and sidewall direction ratio can reach 1000: 5.Therefore, CO
2deng the existence of the second gas, can greatly reduce the isotropic etching effect of etch step, make this etch step region anisotropy, the sidewall of each etch step formation TSV is curved shape relatively vertically and not.In the present embodiment, in etch stages, add C
4f
8the protective capability that gas can further improve sidewall makes etch step carry out the longer time to enter polymer deposition step oppose side wall again and protect.While C
4f
8in adding of etch step, can also make etch step and polymer deposition step more easily switch, plasma body more easily maintains when switching.Ar gas is the gas all passing in general reactive ion etching process, and its concrete flow range is not limited by the present invention.In this embodiment, SF
6the first gas be 450sccm, CO
2the second gas be 600sccm, C
4f
8the 3rd gas be that 50-250sccm, Ar flow are 300sccm.The above gas flow parameter of difference due to size and air pressure in concrete different reaction chambers has difference, as long as but meeting basic ideas of the present invention all belongs to protection domain of the present invention.
In this step, can pass through MFC (Mass Flow Control, flow director) and control respectively SF
6, CO
2, C
4f
8, Ar gas flow, before etch step stops, the time that etch step maintains (be generally 5-30 second) extended greatly with respect to the etch step time in the Bosch processing step of prior art (be generally 1-5 second), therefore, in this embodiment, etch step can complete the etching of the degree of depth of the 5-10 μ m of TSV.
In this step, in the medial surface formation fluorocarbon polymer layer of TSV, its thickness, generally at nano level, is passivation layer also referred to as this polymer layer sometimes.We define C
4f
8gas is that the 3rd gas is chosen as C in this embodiment for forming the 3rd gas of polymkeric substance
4f
8, but being not limited to this, the 3rd gas can also be C
4f
6, CHF
3, CH
2f
2in a kind of.In this embodiment, the air pressure conditions of polymer deposition step is 200-600mtorr.By polymer deposition step; can be in the medial surface formation of deposits polymer foil of TSV; when the vertical plasma etching of follow-up etch step, form sidewall protection; the etching speed of vertical direction is far longer than the etching speed of oppose side wall, thereby further highlights the anisotropic feature of whole TSV etching process.
In this step, can pass through MFC (Mass Flow Control, flow director) and control respectively C
4f
8, Ar gas flow, adjust C
4f
8with the gas flow of Ar, then start to pass into the gas of etch step, represent that polymer deposition step stops.Owing to also needing to use C in follow-up etch step
4f
8, Ar, control C
4f
8, Ar the MFC of the gas flow blocked operation that do not need out or close, prevent from controlling C
4f
8the do switch transition of the MFC of gas flow between polymer deposition step and etch step operates, and reduces the equipment cost requirement of etching.In this embodiment, the time of polymer deposition step is 1-7 second, and the time of etch step is the more than 10 times or 10 times of time of polymer deposition step, therefore, in the lithographic method of this TSV, the time of more ratios, for the etching of silicon, can be improved the etching efficiency of TSV greatly.Meanwhile, also reduced the switching frequency of etch step and polymer deposition step, be relatively easy to control.
After step 205, repeat to enter step 201, thereby etch step and polymer deposition step are hocketed, probably, after 6 circulations, the degree of depth of TSV can reach 60 predetermined μ m, and TSV lithographic method finishes.This embodiment is to have increased in etch step C with respect to the key distinction of the first embodiment TSV lithographic method shown in Fig. 2
4f
8this 3rd gas, therefore, can increasing on the one hand operating space, that each etch step can be etched into is darker, help on the other hand the rapid conversion between etch step and polymer deposition step, that conversion between two steps is more level and smooth, the pimple of TSV sidewall is relatively less, and the slickness of the sidewall of TSV is improved.
The relative prior art of the present invention has improved the slickness of silicon hole sidewall on the basis that guarantees etch rate, so owing to adopting etch step in each etchings circulation of a plurality of etchings circulations can allow sidewall etching to a certain degree (as mentioned above 1000: 5) to guarantee etch rate, the general effect of final a plurality of etchings circulations remains anisotropic.Each etching circulation includes a polymer deposition step can guarantee that etching completes sidewall partly and can not be etched in next etching circulation.The circulation of each etching comprises that an etch step can remove the excess polymer of sidewall accumulation, prevents that polymkeric substance from piling up at opening part etching into while putting compared with deep-seated.
Without departing from the spirit and scope of the present invention in the situation that, can also form many embodiment that have very big difference.Should be appreciated that except as defined by the appended claims, the invention is not restricted at the specific embodiment described in specification sheets.
Claims (15)
1. the lithographic method of a dark silicon through hole; comprise the etch step and the polymer deposition step that adopt reactive ion etching; described etch step and polymer deposition step hocket; it is characterized in that; the gas that described etch step adopts comprises for the first gas of plasma etching silicon with for the second gas with pasc reaction formation silicides protection film; wherein etch step is anisotropic, and wherein, described the first gas is SF
6, NF
3in a kind of, described the second gas is N
2and O
2mixed gas, N
2and O
2gas flow ratio be 10:1, silicides protection film comprises silicon-nitrogen compound, silicon oxide compound and silicon oxynitrides.
2. lithographic method according to claim 1, is characterized in that, the gas that described polymer deposition step adopts comprises the 3rd gas that is used to form polymkeric substance.
3. lithographic method according to claim 2, is characterized in that, the gas that described etch step adopts also comprises the 3rd gas that is used to form polymkeric substance.
4. lithographic method according to claim 3, is characterized in that, the gas flow of described the first gas, the second gas and the 3rd gas is controlled by flow director.
5. lithographic method according to claim 3, is characterized in that, described the 3rd gas is C
4f
8, C
4f
6, CHF
3, CH
2f
2in a kind of or arbitrarily several combination.
6. lithographic method according to claim 1, is characterized in that, the time of described etch step is the more than 10 times of time of described polymer deposition step.
7. lithographic method according to claim 1, is characterized in that, the gas flow ratio of described the first gas and the second gas is less than 1:1.
8. lithographic method according to claim 3, is characterized in that, the gas flow ratio scope of described the second gas and the 3rd gas is greater than 2:1.
9. lithographic method according to claim 1, is characterized in that, the reactive ion etching air pressure conditions of etch step is: 200-600mtorr.
10. lithographic method according to claim 1, is characterized in that, described etch step adopts capacitively coupled plasma source technology.
11. lithographic methods according to claim 1, is characterized in that, the gas that described etch step adopts also comprises argon.
12. lithographic methods according to claim 1, is characterized in that, described etch step etching time is greater than 3 times of times of polymer deposition step.
13. lithographic methods according to claim 12, is characterized in that, the described etch step time is 5-15 second.
14. lithographic methods according to claim 1, is characterized in that, described each etch step etching depth is greater than 2.5 μ m.
15. lithographic methods according to claim 14, is characterized in that, described each etch step etching depth is greater than 3 μ m.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200910196781.5A CN102031525B (en) | 2009-09-29 | 2009-09-29 | Method for etching deep through silicon via (TSV) |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200910196781.5A CN102031525B (en) | 2009-09-29 | 2009-09-29 | Method for etching deep through silicon via (TSV) |
Publications (2)
Publication Number | Publication Date |
---|---|
CN102031525A CN102031525A (en) | 2011-04-27 |
CN102031525B true CN102031525B (en) | 2014-02-12 |
Family
ID=43884952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200910196781.5A Active CN102031525B (en) | 2009-09-29 | 2009-09-29 | Method for etching deep through silicon via (TSV) |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102031525B (en) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102910572B (en) * | 2011-08-05 | 2015-08-19 | 美新半导体(无锡)有限公司 | The lithographic method of release MEMS hanging bridge structure |
CN102337541A (en) * | 2011-09-23 | 2012-02-01 | 中国科学院上海微系统与信息技术研究所 | Etching method used in process of manufacturing conical through silicon via (TSV) |
CN103050434B (en) * | 2011-10-17 | 2015-09-02 | 中芯国际集成电路制造(上海)有限公司 | The lithographic method of silicon through hole |
CN102738074B (en) * | 2012-07-05 | 2014-07-02 | 中微半导体设备(上海)有限公司 | Method for forming semiconductor structure |
CN102881583A (en) * | 2012-09-17 | 2013-01-16 | 上海华力微电子有限公司 | Method for improving defects in dual damascene process |
CN102881641A (en) * | 2012-09-17 | 2013-01-16 | 上海华力微电子有限公司 | Method for improving etched via bottom critical dimension of 40 nm dual damascene structure |
JP5456129B1 (en) * | 2012-09-28 | 2014-03-26 | 田中貴金属工業株式会社 | Method for treating substrate carrying catalyst particles for plating treatment |
CN103715131B (en) * | 2012-09-29 | 2016-02-03 | 中国航天科技集团公司第九研究院第七七一研究所 | Large depth-to-width ratio TSV through hole step etching and sidewall method of modifying |
CN103789771A (en) * | 2012-10-29 | 2014-05-14 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Plasma treatment method |
CN102923642B (en) * | 2012-11-07 | 2015-11-04 | 中国科学院上海微系统与信息技术研究所 | A kind of smooth-sided method of high-aspect-ratio silicon structure |
CN103824767B (en) * | 2012-11-16 | 2017-05-17 | 中微半导体设备(上海)有限公司 | Method for etching deep through-silicon-via |
CN103906338B (en) * | 2012-12-31 | 2016-06-08 | 北京北方微电子基地设备工艺研究中心有限责任公司 | A kind of plasma device |
CN103972155A (en) * | 2013-02-05 | 2014-08-06 | 中微半导体设备(上海)有限公司 | Method for itching through hole in silicon substrate |
CN104124148B (en) * | 2013-04-26 | 2017-08-22 | 中微半导体设备(上海)有限公司 | Silicon chip etching method |
CN104134611B (en) * | 2013-05-03 | 2017-09-29 | 无锡华润上华半导体有限公司 | silicon release process |
CN103390581A (en) * | 2013-07-26 | 2013-11-13 | 中微半导体设备(上海)有限公司 | Through-silicon-via etching method |
CN104637866B (en) * | 2013-11-15 | 2018-01-05 | 中微半导体设备(上海)有限公司 | Silicon hole lithographic method |
CN103646918B (en) * | 2013-11-28 | 2017-01-11 | 中微半导体设备(上海)有限公司 | A method for forming a through silicon via |
CN103811416B (en) * | 2014-02-27 | 2017-01-04 | 华进半导体封装先导技术研发中心有限公司 | The flattening method of through-silicon via sidewall |
CN103896206B (en) * | 2014-04-09 | 2015-12-02 | 华中科技大学 | The Bulk micro machining worn is carved based on silicon chip |
CN105097494B (en) * | 2014-05-08 | 2018-03-06 | 北京北方华创微电子装备有限公司 | Lithographic method |
CN105460886B (en) * | 2014-09-10 | 2018-05-08 | 北京北方华创微电子装备有限公司 | Chip sacrifice layer lithographic method |
CN111916349A (en) * | 2019-05-08 | 2020-11-10 | 北京北方华创微电子装备有限公司 | Silicon etching method |
CN110190027A (en) * | 2019-07-02 | 2019-08-30 | 武汉新芯集成电路制造有限公司 | The production method of semiconductor devices |
CN110429122A (en) * | 2019-08-07 | 2019-11-08 | 昆山梦显电子科技有限公司 | Silicon substrate micro display screen and preparation method thereof |
CN112520688A (en) * | 2020-11-13 | 2021-03-19 | 中国科学院微电子研究所 | Preparation method of nano forest structure |
CN115692309A (en) * | 2021-07-26 | 2023-02-03 | 腾讯科技(深圳)有限公司 | Through silicon via structure, through silicon via interconnection structure, preparation method and electronic equipment |
CN115841946B (en) * | 2023-02-24 | 2023-06-27 | 粤芯半导体技术股份有限公司 | Deep silicon etching optimization method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5501893A (en) * | 1992-12-05 | 1996-03-26 | Robert Bosch Gmbh | Method of anisotropically etching silicon |
CN1431686A (en) * | 2003-02-28 | 2003-07-23 | 北京大学 | Method of etching silicon in high ratio between depth and width |
CN101124661A (en) * | 2004-05-11 | 2008-02-13 | 应用材料公司 | Carbon-doped-Si oxide etch using H2 additive in fluorocarbon etch chemistry |
-
2009
- 2009-09-29 CN CN200910196781.5A patent/CN102031525B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5501893A (en) * | 1992-12-05 | 1996-03-26 | Robert Bosch Gmbh | Method of anisotropically etching silicon |
CN1431686A (en) * | 2003-02-28 | 2003-07-23 | 北京大学 | Method of etching silicon in high ratio between depth and width |
CN101124661A (en) * | 2004-05-11 | 2008-02-13 | 应用材料公司 | Carbon-doped-Si oxide etch using H2 additive in fluorocarbon etch chemistry |
Non-Patent Citations (1)
Title |
---|
彭忠献等.深U型槽的反应离子刻蚀技术.《微电子学与计算机》.1990,(第2期),1-3. * |
Also Published As
Publication number | Publication date |
---|---|
CN102031525A (en) | 2011-04-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102031525B (en) | Method for etching deep through silicon via (TSV) | |
US11018014B2 (en) | Dry etching method | |
US5658472A (en) | Method for producing deep vertical structures in silicon substrates | |
Owen et al. | High aspect ratio deep silicon etching | |
CN101988196B (en) | Deep reactive ion etching method and gas-flow control device thereof | |
JP6423534B2 (en) | Etching method and etching apparatus for silicon dioxide substrate | |
CN107644812B (en) | Substrate etching method | |
WO2017100053A1 (en) | Apparatus and techniques for filling a cavity using angled ion beam | |
WO2011093258A1 (en) | Dry etching method | |
CN104658962A (en) | Through hole forming method | |
CN103928396A (en) | Method for expanding opening of groove | |
CN108364867B (en) | Deep silicon etching method | |
CN103050434B (en) | The lithographic method of silicon through hole | |
CN102117738B (en) | Method for rounding vertex angle of silicon wafer by using polymer containing fluorocarbon | |
Kok et al. | Investigation of in situ trench etching process and Bosch process for fabricating high-aspect-ratio beams for microelectromechanical systems | |
CN104952788B (en) | A kind of inclined hole lithographic method | |
US20070232070A1 (en) | Method and device for depositing a protective layer during an etching procedure | |
CN101928941B (en) | Reactive ion etching method for etching silicon | |
CN108573867A (en) | Silicon deep hole lithographic method | |
Ngo et al. | Plasma etching of tapered features in silicon for MEMS and wafer level packaging applications | |
TWI416624B (en) | An etching method for deep - through - hole | |
CN108133888B (en) | Deep silicon etching method | |
JP5065726B2 (en) | Dry etching method | |
KR20100131703A (en) | Dry-etching method by low pressure capacitively coupled plasma | |
CN103972155A (en) | Method for itching through hole in silicon substrate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address |
Address after: 201201 No. 188 Taihua Road, Jinqiao Export Processing Zone, Pudong New Area, Shanghai Patentee after: Medium and Micro Semiconductor Equipment (Shanghai) Co., Ltd. Address before: 201201 188 Central Avenue, Jinqiao Export Processing Zone, 5001 East China Road, Pudong New Area, Shanghai Patentee before: Advanced Micro-Fabrication Equipment (Shanghai) Inc. |
|
CP03 | Change of name, title or address |