CN102187458B - 包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构 - Google Patents

包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构 Download PDF

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CN102187458B
CN102187458B CN200980141580.3A CN200980141580A CN102187458B CN 102187458 B CN102187458 B CN 102187458B CN 200980141580 A CN200980141580 A CN 200980141580A CN 102187458 B CN102187458 B CN 102187458B
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recess
electric conducting
conducting material
semiconductor substrate
penetrant structure
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CN102187458A (zh
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欧文·R·费伊
沃伦·M·法恩沃思
戴维·R·亨布里
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本发明揭示包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构以及相关联的系统及方法。根据特定实施例，一种系统包含具有第一衬底材料的第一半导体衬底及由所述第一半导体衬底承载的穿透结构。所述系统进一步包含具有带有预形成的凹部的第二衬底材料的第二半导体衬底。所述第一半导体衬底的所述穿透结构接纳于所述第二半导体衬底的所述凹部中且与所述凹部机械啮合并紧固到所述第二半导体衬底。

Description

包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构
技术领域
本发明大体来说是针对包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构以及相关联的系统及方法。
背景技术
包含存储器芯片、微处理器芯片及成像器芯片的封装式半导体裸片通常包含安装到衬底且包封于塑料保护盖中的半导体裸片。所述裸片包含若干功能性特征，例如，存储器单元、处理器电路、成像器装置及互连电路。所述裸片还通常包含电耦合到所述功能性特征的接合垫。所述接合垫电连接到在所述保护盖外部延伸的引脚或其它类型的端子以用于将所述裸片连接到总线、电路及/或其它微电子组合件。
市场压力不断地驱使制造商减小半导体裸片封装的大小且增加此类封装的功能性容量。一种用于实现这些结果的方法是在单个封装中堆叠多个半导体裸片。此封装中的裸片通常是通过电耦合所述封装中的一个裸片的接合垫与所述封装中的其它裸片的接合垫来互连的。
已使用各种方法来电互连多裸片封装内的裸片。一种现有方法是使用直接连接在相邻裸片的接合垫之间的焊料球。另一方法是在相邻裸片的接合垫上熔化“凸块”。然而，前述工艺可具有数个缺点。举例来说，在一些情况下，相邻裸片的接合垫之间的连接可为不完整的及/或可在某些条件下发生故障。另外，在相邻裸片之间形成接合通常所需的温度通常可消耗分配给用于处理的封装的总热预算的一显著部分。因此，所述接合工艺可限制所述封装的寿命及/或可用于形成所述封装所需的其它处理步骤的热预算。因此，仍需要用于互连半导体封装内的裸片的经改进技术。
发明内容
在一个方面中，本申请案涉及一种半导体系统。所述半导体包括：第一半导体衬底，其具有第一衬底材料；第一导电材料，其由所述第一半导体衬底承载且形成穿透结构；第二半导体衬底，其具有第二衬底材料，带有第一表面、背对所述第一表面的第二表面及沿着通孔轴线从所述第一表面延伸到所述第二表面的穿衬底通孔；及第二导电材料，其由所述第二半导体衬底承载且具有沿着所述通孔轴线定位的预形成的凹部，所述穿透结构接纳于所述凹部中且与所述第一导电材料机械接触及电接触。
在另一方面中，本申请案涉及一种半导体系统。所述半导体系统包括：半导体衬底材料，其具有沿着通孔轴线延伸的穿衬底通孔；导电材料，其安置于所述通孔中；及穿透结构，其沿着所述通孔轴线对准且远离所述通孔延伸，所述穿透结构具有外表面，其中所述外表面的轮廓在空间上以非单调方式变化。
此外，在另一方面中，本申请案涉及一种半导体系统。所述半导体系统包括：半导体衬底材料，其具有沿着通孔轴线延伸的穿衬底通孔；导电材料，其安置于所述通孔中；及穿透结构，其与所述通孔对准且远离所述通孔延伸，所述穿透结构具有远离所述通孔延伸的至少一个大体尖锐表面特征。
此外，在另一方面中，本申请案涉及一种半导体系统。所述半导体系统包括：第一半导体衬底，其具有第一衬底材料；穿透结构，其由所述第一半导体衬底承载；第二半导体衬底，其具有第二衬底材料，所述第二半导体衬底具有其中接纳所述穿透结构的预形成的凹部，所述穿透结构与所述凹部机械啮合并紧固到所述第二半导体衬底。
此外，在另一方面中，本申请案涉及一种用于制作半导体系统的方法。所述方法包括：在两个半导体衬底中的第二者中形成通孔，所述通孔具有通孔壁、敞开端及闭合端；在所述通孔的所述壁上安置导电材料，其中所述导电材料朝向所述敞开端比朝向所述闭合端具有更大厚度；及通过将第一半导体衬底的穿透结构与所述第二半导体衬底的所述导电材料彼此啮合而将所述第二半导体衬底电连接及机械连接到所述第一半导体衬底。
此外，在另一方面中，本申请案涉及一种用于制作半导体系统的方法。所述方法包括：通过将第一半导体衬底的穿透结构插入到第二半导体衬底的凹部中而将所述第一半导体衬底电连接及机械连接到所述第二半导体衬底；及通过向凸出部与所述凹部的壁之间的界面施加声能而进一步将所述第一半导体衬底电连接及机械连接到所述第二半导体衬底。
此外，在另一方面中，本申请案涉及一种用于制作半导体系统的方法。所述方法包括：在半导体衬底中形成凹部；在所述凹部中安置支撑材料；在所述凹部中的所述支撑材料上安置啮合材料层；及移除所述凹部中的所述支撑材料中的至少一些支撑材料，使得所述啮合材料的向内延伸部分悬伸在所述凹部中。
此外，在另一方面中，本申请案涉及一种用于制作半导体系统的方法。所述方法包括：形成由第一半导体衬底承载的穿透结构；在第二半导体衬底中形成凹部；将所述第一半导体衬底的所述穿透结构接纳于所述第二半导体衬底的所述凹部中；及在所述穿透结构与所述凹部的壁之间安置导电材料；及通过将所述导电材料与所述穿透结构且与所述凹部的所述壁结合来连接所述第一与第二半导体衬底。
附图说明
图1是根据本发明一实施例配置的封装的部分示意性侧视横截面图。
图2是根据本发明一实施例的在两个裸片之间的互连布置的部分示意性侧视横截面图。
图3A到图3G示意性地图解说明根据本发明实施例的用于形成凸出部的过程。
图4A到图4E示意性地图解说明根据本发明实施例的用于形成经配置以接纳凸出部的凹部的过程。
图5A到图5D示意性地图解说明根据本发明另一实施例的用于形成具有大体箭头形状的凸出部的过程。
图6A到图6B示意性地图解说明根据本发明另一实施例的用于形成具有突出部及缺口的凸出部的过程。
图7示意性地图解说明根据本发明一实施例的用于形成具有树枝状结构的凸出部的过程。
图8A到图8B示意性地图解说明根据本发明另一实施例的用于形成具有突出部及缺口的凸出部的过程。
图9A到图9E示意性地图解说明根据本发明其它实施例的用于形成凹部的过程。
图10A到图10C示意性地图解说明根据本发明又一些实施例的用于形成凹部的过程。
图11A到图11C图解说明根据本发明另一实施例的用于连接半导体衬底的过程。
图12是可包含根据本发明的数个实施例配置的一个或一个以上封装的系统的示意性图解说明。
具体实施方式
下文参考封装式半导体装置及组合件以及用于形成封装式半导体装置及组合件的方法来描述本发明的数个实施例。下文参考半导体裸片描述某些实施例的许多细节。在通篇中，术语“半导体裸片”用以包含各种制品，举例来说，包含个别集成电路裸片、成像器裸片、传感器裸片及/或具有其它半导体特征的裸片。图1到图12及下文中阐述某些实施例的许多具体细节以提供对这些实施例的透彻理解。数个其它实施例可具有不同于本发明中所述的配置、组件及/或过程的配置、组件及/或过程。因此，所属领域的技术人员将了解，可在不借助图1到图12中所示的实施例的数个细节及/或特征及/或借助额外细节及/或特征的情况下实践额外实施例。
图1是包含根据本发明一实施例配置的半导体封装100的半导体系统160的部分示意性侧视横截面图。封装100可包含支撑部件101，其承载彼此电互连及机械互连的多个半导体衬底(例如，半导体裸片)。举例来说，支撑部件101可承载第一半导体衬底110、堆叠于第一半导体衬底110上的第二半导体衬底130及堆叠于第二半导体衬底130上的第三半导体衬底150。所述半导体衬底中的每一者可包含用于将所述衬底连接到相邻衬底的一个或一个以上连接器。举例来说，第一衬底110可包含面向第二衬底130的第一连接器111。第二衬底130可包含第二连接器131，所述第二连接器面向第一衬底110且与对应的第一连接器111连接。第二衬底130也可包含其自身的第一连接器111，所述第一连接器与第三衬底150的对应的第二连接器131连接。
所述半导体衬底中的每一者可包含促进所述衬底内的电信号通信的特征。举例来说，连接器111、131可通过一个或一个以上通孔与所述半导体衬底中的其它特征连通。第一半导体衬底110可相应地包含第一通孔112，且第二半导体衬底130可包含第二通孔132。在特定实施例中，通孔112、132可包含穿硅通孔(TSV)或完全延伸穿过对应的衬底材料以促进与堆叠式裸片的互连的其它通孔。
封装100可包含额外特征以用于提供与所述封装外部的元件的连通且用于提供所述封装内所述衬底之间或之中的连通。举例来说，支撑部件101可包含促进将封装100连接到电路板或其它外部装置的封装连接器103(例如，焊料球)。支撑部件101还可包含连接支撑部件101与半导体衬底110、130及150的支撑部件连接器。举例来说，这些连接可通过第一支撑部件连接器102a(例如，线接合)及/或第二支撑部件连接器102b(例如，焊料球)来提供。整个封装100可由囊封物105环绕，所述囊封物保护封装100的内部特征，包含相邻半导体衬底之间的互连。以下论述描述这些互连的额外特征。
图2是根据本发明的代表性实施例配置的第一衬底110与第二衬底130之间的界面区域的经放大部分示意性图解说明。第一衬底110接近于第二衬底130定位使得第一通孔112与第二通孔132沿着共同通孔轴线V对准。第一衬底110包含第一连接器111且第二衬底130包含第二连接器131，此两者也沿着所述通孔轴线V对准。第一连接器111包含穿透结构114，且第二连接器131包含经配置以接纳穿透结构114的凹部134。凹部134可为预形成的；例如，其可在将穿透结构114接纳于其中之前全部地或部分地形成。第一连接器111与第二连接器131两者均包含导电材料，所述导电材料又可包含一种或一种以上导电成分。举例来说，第一连接器111可包含第一导电材料113，所述第一导电材料又包含基础材料115及导电层116(例如，涂层或包覆层)。第二连接器131可包含第二导电材料133，所述第二导电材料又包含基础材料135及导电层或涂层136。如稍后将更详细地论述，可针对结构及电特性选择对应连接器111、131中的每一者的基础材料115、135，且可选择对应连接器111、131中的每一者的涂层116、136以促进、增强及/或保护所述两个连接器之间的连接。
在操作中，可通过以下方式来连接第一半导体衬底与第二半导体衬底110、130：使所述两个衬底中的一者或两者沿着通孔轴线V朝向另一者移动(如箭头A所指示)，因此将穿透结构114按压到凹部134中。在此过程期间，穿透结构114可切入到第二导电材料133中及/或使第二导电材料133变形，以在所述两个连接器之间提供增强的机械及电啮合。另外，穿透结构114可包含具有凸出到平行于通孔轴线V的平面中的组成部分(且在许多情况下，为重要组成部分)的若干表面。因此，当其与凹部134啮合时，穿透结构114可抵制第一衬底110与第二衬底130之间的相对横向移动(由箭头L指示)。此又可产生在机械及电方面比现有互连结构更稳健的互连结构。可通过安置于第一衬底110及/或第二衬底130上的粘合剂104(例如，薄接合线粘合剂)提供对所述互连结构的额外支撑及保护。在使第一衬底与第二衬底110、130彼此接触时，粘合剂104可在所述衬底之间提供额外机械连接且可保护所述互连以免暴露于氧化剂及/或其它不合意的元素。粘合剂104可包含所属领域的技术人员已知的各种适合材料中的任一者。举例来说，粘合剂104可包含预先施加的BCB或SU-8粘合剂、液晶聚合物或可从宾夕法尼亚州费城的罗门哈斯(RohmandHaasofPhiladelphia，Pennsylvania)购得的基于聚合物的InterviaTM粘合剂。在其它实施例中，粘合剂104可为在结合第一衬底与第二衬底110、130之后施加的底部填充材料。
在特定实施例中，涂层116、136包含锡。在将第一衬底与第二衬底110、130彼此啮合之前，可(例如)通过暴露于六氟化硫等离子来氟化涂层116、136。所得氟化氧化锡形成具有有利的回流特性(例如，短回流时间及/或低回流温度)的干助熔剂。
在图2中所示的实施例中，第一衬底110仅包含第一连接器111，且第二衬底130仅包含第二连接器131。因此，可使用专用于形成第一连接器111的步骤来刻意地制造(例如，在晶片级上)第一衬底110，且可使用专用于形成第二连接器131的步骤来形成(例如，在晶片级上)第二衬底130。因此，衬底110、130中的每一者可以少到形成对应连接器111、131所必需的步骤来处理。在其它实施例中，所述衬底可包含第一连接器111与第二连接器131两者。举例来说，当第二衬底130定位于第一衬底110与第三衬底150(如图1中所示)之间时，第二衬底130可包含用以与第一衬底110连接的第二连接器131及用以与第三衬底150连接的第一连接器111。下文描述关于第一衬底111与第二连接器131两者的形成的其它细节。
图3A到图3D图解说明根据本发明一实施例的用于形成第一连接器111的代表性过程。以图3A开始，第一衬底110可包含第一衬底材料117(例如，硅)，其具有第一表面142a及背对第一表面142a的第二表面142b。通孔112可从第一表面142a完全穿过第一衬底材料117延伸到第二表面142b。第一衬底110可进一步包含第一表面142a处的接合垫118(例如，用于电及/或机械连接的导电垫)，其借助一个或一个以上导电线119与第一衬底110的其它结构及装置连接。在第一表面142a处安置电介质材料121以保护所述第一表面，且在电介质层121上方安置镀敷总线122以通过电解或其它加性及/或减性工艺来促进额外导电结构的形成。镀敷总线122可包含钛/钨合金或其它适合导电及/或粘合材料以实现电连通及/或粘合。如图3A中所示，第一掩模120a定位于镀敷总线122上方且具有与通孔112对准的孔口170。在代表性实施例中，第一掩模120a包含湿或干厚膜光致抗蚀剂材料，其具有高达大约40微米、且在特定实施例中约15微米到20微米的厚度。孔口170可具有约10微米到20微米的横向尺寸(例如，直径)，且可具有圆形、正方形或其它适合横截面形状。
在图3B中，(例如)经由电解工艺在第一掩模120a的孔口170中安置基础材料115。在特定实施例中，基础材料115可包含镍、铜或者镍或铜的合金。在其它实施例中，基础材料115可具有其它组成，例如，金或金合金。接着，在基础材料115上方定位第二掩模120b。第二掩模120b可包含使用凸块下冶金技术形成的牺牲保护层。举例来说，第二掩模120b可包含以无电工艺或其它工艺施加的钯或另一牺牲层材料。
接下来参考图3C，接着移除第一掩模120a(图3B)，且蚀刻(例如，使用湿蚀刻工艺)或以其它方式部分地移除基础材料115以形成具有大体三角形横截面形状的结构(例如，圆锥形、棱锥形或类似结构)。举例来说，可使用钠欠蚀刻/过蚀刻工艺来蚀刻基础材料115。第二掩模120b的存在保护基础材料115的上表面，以便以大于基础材料115的顶部的速率移除基础材料115的侧。随着蚀刻过程继续进行，第二掩模120b最终剥离基础材料115或以其它方式耗散。还经由与用以移除基础材料115的工艺相同的工艺或经由不同的后续工艺来移除镀敷总线122的位于远离基础材料115处的部分。
图3D图解说明已完成基础材料115的蚀刻过程且已将导电涂层116施加到基础材料115之后的第一衬底110。在特定实施例中，导电涂层116可包含锡或锡合金，且在其它实施例中，导电涂层116可具有其它组成。在许多情形下，锡或锡合金可特别适合，这是因为这些材料以相对低的温度回流且因此可在不需要高温工艺的情况下促进电及机械接合。当基础材料115包含铜或铜合金时，可使用无电浸渍镀敷工艺或另一工艺(例如，溅镀或电解/掩蔽工艺)来施加导电涂层116。举例来说，在其它实施例中，可使用总线层及经图案化光致抗蚀剂层经由电解工艺来施加导电涂层116。导电涂层116可包含除锡或锡合金以外的材料，例如，金。在又一些实施例中，可消除导电涂层116。举例来说，当基础材料115包含金时，可将其直接接合到第二衬底130(图2)的对应凹部134(图2)中的金，而不需要导电涂层116。可在高达150℃的温度下进行此接合过程。在特定实施例中，可使用超声能来促进接合，例如，减小用以将各部分放置及/或按压成彼此接触的机械力。在这些实施例中的任一者中，所得穿透结构114的外表面129可具有大体锥形形状，其促进穿透到第二衬底130的对应凹部134中。此形状单独地或与超声能的施加组合可促进“擦洗”配合表面以移除污染物，且进一步促进穿透结构114与凹部134之间的接合。
图3E是经历根据本发明另一实施例的用于形成穿透结构的过程的第一衬底110的示意性图解说明。在此实施例中，在不使用上文参考图3A所描述的第一掩模120a的情况下，均匀地施加导电材料115(例如，作为毯覆层)。将第二掩模120b与通孔112对准地施加到基础材料115。接着蚀刻基础材料115，其中第二掩模120b对通孔112上方的基础材料115提供保护，以产生图3F中所示的形状。接着，可以大体类似于上文参考图3D所描述的方式的方式用导电涂层116涂覆所得穿透结构114。
图3G图解说明可借以形成穿透结构114的另一过程。在此过程中，形成第一掩模120a使得在通孔112正上方施加基础材料115，其中第二掩模120b以大体类似于上文所述方式的方式提供保护。接着，将第一衬底110暴露于蚀刻第一掩模120a与基础材料115两者但不蚀刻第二掩模120b的蚀刻剂。因此，第一衬底110的面向上的表面呈现连续改变的形状，如图3G中由虚线及箭头E所指示。在所述蚀刻过程结束时，形成大体三角形穿透结构114且第二掩模120b剥离或以其它方式耗散。任选地，可接着在不影响导电基础材料115的形状的情况下选择性地移除来自第一掩模120a的残余材料。接着可将导电涂层添加到基础材料115，且接着可以大体类似于上文所论述方式的方式移除镀敷总线122的位于远离基础材料115处的部分。在一个实施例中，移除第一掩模120a与基础材料115两者的前述方法可通过将第一衬底110暴露于多功能移除剂(例如，溶剂(其可优先移除第一掩模120a)与氧化物/酸蚀刻剂(其可优先移除基底金属115)的混合物)来实现。在其它实施例中，可在溶剂与氧化物/酸蚀刻剂之间来回转移第一衬底110以实现相同或类似的结果。
图4A到图4B图解说明根据本发明一实施例的用于形成第二衬底130中的凹部134的代表性过程。以图4A开始，第二衬底130可包含第二衬底材料137(例如，硅)，其具有第一表面142a、第二表面142b及从第一表面142a延伸到第二表面142b的第二通孔132(例如，穿硅通孔)。通孔132可延伸穿过第一表面142a处的接合垫138，且可具有介于约10微米到20微米的范围中的直径。可用电介质层及/或势垒层146来保护通孔132的壁。任选地，可在第二通孔132中安置籽晶层以促进后续金属形成过程。
可使用包含气相沉积工艺(物理或化学)及/或电解或无电沉积工艺的各种适合工艺中的任一者将基础材料135安置于第二通孔132中。在特定实施例中，基础材料135可包含铜。在其它实施例中，(例如)当接纳于凹部134中的穿透结构包含未经涂覆的金时，基础材料135也可包含金。在图4A中所示的实施例的特定布置中，基础材料135可趋向于“呈面包条样”，例如，封闭或夹紧第二通孔132的入口。尽管在大多数半导体处理应用中当填充通孔时此效应通常是不合意的，但在本发明的特定实施例中，此效应可产生合意的结果。特定来说，此效应可产生具有大于或等于对应宽度W的深度D的凹部134，其具有向内凸出以便与插入到凹部134中的对应突出部啮合且至少抵制所述对应突出部的移除的凸瓣145或其它结构。
图4B是已将导电涂层136施加到基础材料135之后的第二衬底130的一部分的经放大图解说明。凸瓣145中的一者上的导电涂层136可接触另一凸瓣145上的对应导电涂层136，从而有效地形成凹部134的两个分离部分。在其它实施例中，对置凸瓣145上的导电涂层136可保持彼此不接触使得凹部134为连续的。在如上文所论述的任一布置中，第二导电材料133(例如，基础材料135及导电涂层136)可形成提供与对应穿透结构(例如，上文参考图3A到图3G所描述的穿透结构114)的机械互连与电互连两者的结构。
图4C图解说明其中已根据本发明的另一实施例形成凹部134的代表性第二衬底130。在此实施例中，通孔132在第二衬底130的第一表面142a与第二表面142b之间仅延伸到中途。因此，通孔132可为盲通孔。可使用大体类似于上文参考图4A到图4B所描述的技术的技术在盲通孔132中形成凹部134。当第二衬底130为衬底堆叠中的最外衬底时，所得结构可特别适合。举例来说，图4C中所示的第二衬底130可用作图1中所示的最外或最顶的第三半导体衬底150。此过程的一个特征是无需使用图4C中所示的过程来形成在第二衬底130位于衬底堆叠中间的情况下将形成的额外连接结构。
图4D及图4E图解说明根据特定实施例的用于形成凹部134的又一过程。首先参考图4D，在通孔132内安置支撑材料148。支撑材料148可包含大体类似于上文所述基础材料135的基础材料，或其可包含未必是导电材料的另一材料。支撑材料148可形成凸瓣145，其经确定大小使得当将涂层或层136施加到支撑材料148时，其不完全封闭通孔132。此布置允许在已施加涂层136之后蚀刻剂或其它材料移除剂进入通孔132中。所述移除剂经选择以优先移除支撑材料148(例如，在不移除涂层136的情况下)。因此，可将支撑材料148移除到由图4D中的虚线指示的位置或其它位置。在一些实施例中，可完全移除支撑材料148。在这些实施例中的任一者中，涂层136可借助于其到接合垫138的附接且任选地借助于由通孔132中的任何剩余支撑材料148提供的支撑而保持于适当位置中，同时涂层136的一个或一个以上部分悬伸到凹部134中。涂层或层136可为导电的或不导电的，此取决于所述凹部是将用以形成机械/电连接还是将用以形成机械连接。在任一实施例中，涂层136为经定位以与对应穿透结构啮合的啮合材料的代表性实例，如下文所述。
图4E是大致法向于第一表面142a来看的第二衬底130的部分示意性图解说明。如图4E中所示，涂层136已经选择性地蚀刻或以其它方式处理以形成向内延伸到凹部134中的导电凸出部180。或者，涂层136无需经历此材料移除过程。在任一实施例中，现在参考图4D与图4E两者，涂层136的若干部分可形成向内倾斜的结构，其促进接纳对应穿透结构的过程但抵制所述穿透结构从通孔132中出来的运动。举例来说，涂层136的所述部分可径向地及/或轴向地向内倾斜到凹部134中。在特定实施例中，一旦箭头形状的穿透结构已进入凹部134，涂层136的凸出到凹部134中的未被支撑(例如，悬伸的)端即可与其啮合以防止或至少抵制所述穿透结构从凹部134中出来的运动。下文参考图5A到图5D更详细地描述此穿透结构。
图5A到图8B图解说明根据本发明其它实施例的穿透结构及对应的形成方法。举例来说，图5A图解说明第一衬底110，其具有带有与通孔轴线V对准的第一孔口170a的第一掩模层120a及带有也与通孔轴线V对准的较大第二孔口170b的第二掩模层120b。在图5B中，已将基础材料115施加到第一衬底110的接合垫118。接着，在基础材料115上方定位将第三掩模120c。
在图5C中，已移除第二掩模层120b，且已以大体类似于上文参考图3C所描述的方式的方式蚀刻或以其它方式处理基础材料115。因此，已将基础材料115形成为具有大体三角形横截面形状的头部123，且已漂离或以其它方式耗散保护头部123的高度的第三掩模120c。第一掩模层120a保护基础材料115的形成轴杆124的下部部分。
在图5D中，已移除第一掩模层120a以暴露轴杆124，且已将涂层116施加到基础材料115，从而形成穿透结构514。穿透结构514的外表面529具有大体箭头型横截面形状且围绕穿透结构514的外围以非单调方式变化。因此，穿透结构514既可穿透到上文参考图2、图4A及图4B所描述的凹部134中又可借助于头部123大于轴杆124而与凹部134中的导电材料互锁且抵制可趋向于将穿透结构114从凹部134中逐出的力。另外，由于外表面529的若干部分是非水平的(例如，具有与通孔轴线V对准的组成部分)，因此此布置可抵制与穿透结构514结合的半导体衬底之间的相对横向移动，如上文所述。
图6A到图6B图解说明根据本发明另一实施例的用于形成穿透结构的过程。以图6A开始，将掩模120施加到第一半导体衬底110，且将基础材料115施加到经由所述掩模中的开口而暴露的上覆接合垫118的镀敷总线122。在沉积工艺的过程期间基础材料115的沉积速率可变化以产生具有不同晶粒结构的交替层。举例来说，所述交替层可包含具有相对精细晶粒结构的小晶粒层125a及具有较粗糙晶粒结构的大晶粒层125b。可通过控制每一层的沉积速率(例如，通过控制电流密度)来控制所述晶粒结构，例如，借此使用相对慢的沉积过程来形成小晶粒层125a且使用较快的沉积过程来形成大晶粒层125b。
在图6B中，已移除掩模120且已将基础材料115暴露于蚀刻剂。因对应晶粒的粗糙结构，大晶粒层125b是以大于小晶粒层125a的速率被蚀刻。因此，所得穿透结构614可包含与缺口127交替的突出部126。接着，可将涂覆层116施加到基础材料115。所得外表面629以非单调方式改变且因此可促进与对应凹部的导电材料的互锁啮合。
图7是具有根据本发明另一实施例形成的穿透结构714的第一衬底110的部分示意性图解说明。可通过以下方式形成穿透结构714：将掩模120施加到第一衬底110并将基础材料115施加到上覆于接合垫118上的总线层122以形成大体柱状结构。在形成所述柱状结构之后，可在基础材料115的经暴露端部分处形成树枝状结构728，且可将涂覆层(图7中未展示)施加到树枝状结构728。树枝状结构728可为相对小的(例如，大约一微米)且可使用现有电解工艺但以与用于典型填充工艺的电流密度相比高的电流密度来形成。举例来说，可使用每平方英尺50安或更高的电流密度来形成树枝状结构728。因此，穿透结构714的外表面729以非单调方式变化且包含相邻树枝状结构728之间的缺口，此可促进与穿透结构714所啮合的凹部的导电材料的互锁。
在其它实施例中，树枝状结构728可通过其它技术形成及/或可具有其它形状。举例来说，用于形成树枝状结构728的另一技术包含在穿透结构714的形成期间(例如，将近沉积过程的结束)消除整平剂(其通常用以促进总体均匀的沉积过程)。在另一实例中，除在穿透结构714的端处形成树枝状结构728以外或替代此，还可沿着穿透结构714的侧形成此些结构。可通过在移除掩模120(或掩模120的一部分)之后继续树枝状生长过程来实现此形状，且其可形成具有与穿透结构714所插入到的凹部的导电材料互锁的增强能力的穿透结构714。
图8A到图8B图解说明根据本发明另一实施例的用于形成穿透结构814的再一过程。使用掩模120将基础材料115施加到接合垫118，如图8A中所示。在图8B中，移除掩模120，且使基础材料115经受蚀刻过程，所述过程在所述穿透结构的端部分及侧部分处产生多个突出部826及缺口827。因此，这些部分具有不规则的外表面829，例如，以非单调方式变化的外表面。用以形成缺口827的蚀刻剂可为相对侵略性，例如40∶2∶1(水∶过氧化物∶盐酸)。在其它实施例中，所述蚀刻剂可具有其它组成。在完成所述蚀刻过程之后，可将涂覆层(图7中未展示)施加到基础材料115。
图9A到图9E图解说明用于形成可接纳上文所述的前述穿透结构中的任一者的凹部的过程。以图9A开始，所述过程可包含将填充材料139施加到给第二衬底130的通孔132加衬的电介质材料141。接着，在第二衬底130上定位第一掩模140a，其具有与通孔131对准的开口。在图9B中，移除填充材料139的一部分，从而形成延伸于第二衬底材料137的第一表面142a下方的凹陷143。在图9C中，已将镀敷总线144施加到第二衬底130，且已在镀敷总线144上方定位第二掩模140b并处理所述掩模以形成与通孔轴线V对准的开口。在图9D中，已将基础材料135施加到第二衬底130且已移除第二掩模140b。预期凹陷143的存在将改进基础材料135与填充材料139之间的连接的结构完整性。
在图9E中，已蚀刻或以其它方式处理基础材料135以形成凹部134。可将涂层136施加到基础材料135以促进与前述穿透结构中的任一者的互连。因此，涂层136可界定给凹部134定界的内表面947。内表面947可具有各种形状中的任一者，此取决于对应穿透结构及/或其它特征的形状。在特定实施例中，内表面947可延伸于第二衬底材料137的第一表面142a下方，但不延伸到填充材料139中。或者，内表面947可延伸到填充材料139中，如以虚线指示为凹部134c，或其可保持在第二表面142a上方，如也以虚线指示为凹部134b。在又一实施例中，凹部134可填充有导电材料，例如以丝网印刷或其它工艺施加到第二衬底130的银膏或其它导电膏。在这些实施例中的任一者中，凹部134可接纳对应的穿透结构、与其互锁且与其机械连接及电连接。
图10A到图10C图解说明用于形成可接纳前述穿透结构中的任一者的凹部的另一过程。图10A图解说明在已将填充材料139(例如，铜)安置于通孔132中且已将掩模140定位于填充材料139的一部分上方之后的第二衬底130。在图10B中，已直接在填充材料139中形成凹部134，且在图10C中，已将导电涂层136施加到凹部134的壁。因此，填充材料139及涂层材料136可一起形成第二导电材料133。可使用浸渍或其它工艺来施加涂层136。在施加涂层136之后，可移除掩模140且可使用前述结合技术中的任一者将第二衬底130接合到第一衬底110(图2)。
图10A到图10C中所示的过程的一个预期结果是不需要向所述填充材料添加导电基础材料。相反地，上文参考图9A到图9E所描述的过程的潜在结果是其可以给定通孔宽度产生较大(例如，较宽)凹部，所述凹部可提供与对应穿透结构的更稳健连接。
上文参考图1到图10C所描述的前述实施例中的数者的一个特征是可使用堆叠式衬底中的一个衬底中的容座或凹部与另一衬底中的穿透结构的组合来结合所述衬底。此布置的一个预期结果是所述特征可为自对准的。举例来说，所述凹部可具有斜坡入口表面及/或所述穿透结构可具有斜坡外表面。这些表面可相对于通孔轴线以锐角成斜坡。因此，在将两个衬底放在一起时，所述穿透结构与所述凹部可适应某一未对准，举例来说，数微米的未对准。
上文参考图1到图10C所描述的前述实施例中的数者的另一特征是穿透结构包含与凹部的对应非水平表面配合的非水平表面。此布置的预期结果是穿透结构的外表面与凹部的壁之间的非水平界面可抵制横向应力及运动。另外，所述穿透结构与所述凹部的互锁布置(例如，由凹部壁提供的支撑)可更佳地耐受在其它连接布置中可能导致弯曲的垂直力。
前述实施例中的至少一些实施例的又一特征是互连结构在大小上可相对小，且可经间隔而靠近在一起。举例来说，在特定实施例中，所述穿透结构与所述凹部可形成于具有约10微米的宽度及约50微米的间距的通孔中/上。在其它实施例中，这些尺寸可更小。此布置的预期结果是其可减小衬底及其所并入到的封装的总体大小，因此使得所述封装能够在较紧凑的应用中使用。
前述实施例中的至少数者的又一特征是可在相对低的温度及/或压力下实现穿透结构与凹部之间的连接。举例来说，当所述穿透结构及所述凹部包含锡包覆层时，可将对应衬底按压在一起且提高到高于共熔温度(例如，约220℃或小于220℃(且在具体实施例中，对于无铅焊料为约217℃))的温度以使锡涂层熔化。在其中消除所述锡涂层且所述穿透结构及所述凹部各自具有经暴露的金表面的实施例中，所述过程可在室温下进行，其中使所述穿透结构与所述凹部之间的界面经受声能(例如，超声能)以促进这些元件之间的接合。此不同于为进行接合而通常需要高达350℃的较高温度的至少一些现有工艺。举例来说，典型的铜到铜接合工艺需要350℃或大于350℃的高温及200兆帕或大于200兆帕的高压。
图11A到图11C示意性地图解说明用于形成凹部及穿透结构且以可进一步减小或消除用以实现堆叠式半导体衬底之间的接合的力的方式互连所述穿透结构与所述凹部的另一过程。以图11A开始，可在第一衬底1110上或其中形成穿透结构1114，且可在第二衬底1130上或其中形成对应凹部1134。穿透结构1114在特定实施例中可由导电材料形成，但在其它实施例中无需由导电材料形成且可替代地由包含第一衬底材料1113的其它材料形成。在这些实施例中的任一者中，穿透结构1114可具有导电的外表面。举例来说，可在穿透结构1114及第一衬底1110的邻近表面上安置第一籽晶层1182a。接着，可在第一衬底1110上选择性地安置(或安置并选择性地移除)第一掩模1120a以覆盖邻近于穿透结构1114的区域中的第一籽晶层1182a且使第一籽晶层1182a在穿透结构1114处暴露。
第二衬底1130可接纳第二籽晶层1182b，所述第二籽晶层安置于第二衬底1130的凹部1134及邻近部分中。可在第二籽晶层1182b的定位于凹部1134外部的部分上安置第二掩模1120b。接着，使第一衬底1110及第二衬底1130相对于彼此移动(如箭头A所指示)使得穿透结构1114进入凹部1134。
图11B图解说明在已使第一衬底1110及第二衬底1130相对于彼此移动使得穿透结构1114进入对应凹部1134之后的第一衬底1110及第二衬底1130。尽管在穿透结构1114与对应凹部1134的壁之间可存在偶然接触，但穿透结构1114与凹部1134通常不会彼此机械互锁。因此，预期，将衬底1110、1130移动到图11B中所示的位置中所需的力(如果有的话)是小的或不存在的。
如图11B中所示，第一衬底1110与第二衬底1130可通过间隙1181分离。接着，可使两个衬底1110、1130经受其中在间隙1181中安置导电材料1183的无电、电解及/或其它工艺。导电材料1183在由第一衬底1110承载的第一籽晶层1182a与由第二衬底1130承载的第二籽晶层1182b之间形成物理接合及电接合。相邻凹部1134之间的区域及相邻穿透结构1114之间的区域分别通过第二掩模1120b及第一掩模1120a保护以免受导电材料1183的影响。
在于穿透结构1114与对应凹部1134之间安置导电材料1183之后，移除第一掩模及第二掩模1120a、1120b。接着，还移除第一籽晶层及第二籽晶层1182a、1182b的定位于远离穿透结构1114及凹部1134处的部分，从而产生图11C中示意性地展示的结构。此时，作为前述材料移除过程的结果，组合件可包含从形成于穿透结构1114与对应凹部1134之间的接合向外定位的位置处的空隙1184。这些空隙1184可任选地填充有填充材料，例如，底部填充材料或另一适合电介质材料。在另一实施例中，这些空隙1184可保持为空的，且在特定布置中，空隙1184可完全地或部分地形成允许以对流方式冷却第一衬底及第二衬底1110、1113的冷却通道。举例来说，可用空气流、去离子水流或氟化液流来冷却衬底1110、1113之间的界面。
在前述过程的特定实施例中，将第一衬底1110定位于第二衬底1130上方，使得凹部1134沿向上方向上敞开。预期，此布置将减小在处理期间气体聚集在凹部1134中的可能性。尽管图11A到图11C中将穿透结构1114展示为简单的柱状结构，但在其它实施例中，其可具有其它形状，包含上文所述的前述形状中的任一者。除由图11A到图11C中所示的简单柱状结构提供的表面区之外，此些形状还可提供额外表面区，且因此可增加所得物理接合及电接合的强度、稳健性及/或可靠性。
还可将前述实施例的其它特征与图11A到图11C中所示的布置组合。举例来说，在一些实施例中，可在图11A到图11C中所示的第一衬底与第二衬底1110、1130之间的选择性位置处使用大体类似于上文参考图2到图10C所描述的结构的结构(其中在穿透结构进入到对应凹部中之后即刻形成机械互锁)。此布置可用以在第一衬底与第二衬底1110、1130之间的界面处维持一致间隙1181，且可在两个衬底经历上文参考图11B到图11C所描述的处理步骤时将其支撑在相对于彼此的固定位置中。在这些实施例中的任一者中，预期，出于在两个衬底1110、1130之间提供物理及/或电连接的目的而使所述两个衬底彼此啮合所需的力在与用于连接半导体衬底的现有方法相比时可显著减小。
由根据上文参考图1A到图11C所描述的方法及结构来结合半导体衬底而产生的半导体封装中的任一者可并入到无数较大及/或较复杂的系统中，所述系统的代表性实例为图12中示意性地展示的系统1200。系统1200可包含：处理器1202、存储器1204(例如，SRAM、DRAM、快闪存储器及/或其它存储器装置)、输入/输出装置1206(例如，传感器及/或传输器)及/或其它子系统或组件1208。具有上文参考图1到图11C所描述的特征中的任一者或其组合的半导体封装可包含于图12中所示的装置中的任一者中。所得系统1200可执行各种各样的计算、处理、存储、感测、成像及/或其它功能中的任一者。因此，代表性系统1200包含(而不限于)计算机及/或其它数据处理器，举例来说，桌上型计算机、膝上型计算机、因特网器具、手持式装置(例如，掌上型计算机、可佩戴式计算机、蜂窝式或移动电话、个人数字助理、音乐播放器、相机等)、多处理器系统、基于处理器或可编程的消费型电子装置、网络计算机及小型计算机。其它代表性系统1200可装纳于单个单元中或分布于多个互连式单元上(例如，通过通信网络)。因此，系统1200的组件可包含本地及/或远程存储器存储装置及各种各样的计算机可读媒体中的任一者。
从前文将明了，本文中已出于图解说明的目的描述了若干具体实施例，但前述系统及方法也可具有其它实施例。举例来说，尽管在具有两个或三个堆叠式裸片的半导体封装的背景下描述了上文所述的某些实施例，但在其它实施例中，所述封装可包含其它数目个堆叠式裸片。用于形成前述连接结构且连接不同半导体衬底的配合结构的过程中的许多过程可在裸片级(例如，在单个化裸片之后)、晶片级(例如，在单个化裸片之前)及/或在其它处理阶段处实施。因此，所述接合过程可用以将个别裸片接合到另一个别裸片，或将个别裸片接合到晶片或晶片的一部分，或将晶片或晶片的一部分接合到另一晶片或晶片的一部分。所述晶片或晶片部分(例如，晶片形式)可包含未经单个化的晶片或晶片部分或者经重新组装的载体晶片。所述经重新组装的载体晶片可包含粘合剂材料(例如，柔性粘合剂)，其由具有与未经单个化的晶片的形状相当的周边形状的大体刚性框架环绕，其中经单个化的元件(例如，裸片)由所述粘合剂承载。
在某一情况下，可将导电材料成块体地直接施加于电介质势垒层(例如，经由直接势垒上镀敷工艺)上，且在其它实施例中，可首先将导电籽晶层施加到所述电介质势垒层。所述凹部及穿透结构可具有不同于各图中所示的大小及/或形状的大小及/或形状，且所述凹部及对应穿透结构的大小/形状可经修整以彼此适合/兼容。所述穿透结构可在其进入对应凹部时接触所述凹部中的材料，或如图11A到图11C中所示，所述穿透结构可在几乎不接触或不接触凹部壁的情况下穿透(例如，进入)所述凹部，且可在穿透之后在所述穿透结构与所述凹部之间形成接合或较强的接合。
在其它实施例中，可组合或消除在特定实施例的背景下描述的某些特征。举例来说，图6B或图8B中所示的结构可与图5D或图2中所示的三角形结构组合。在某些实施例中，可消除图1中所示的支撑部件101。此外，尽管已在某些实施例的背景下描述了与所述实施例相关联的特征及结果，但其它实施例也可展现此些特征及结果且并非所有实施例均必须要展现此些特征及结果。因此，本发明可包含上文未展示或未描述的其它实施例。

Claims (41)

1.一种半导体系统，其包括：
第一半导体衬底，其具有第一衬底材料；
第一导电材料，其由所述第一半导体衬底承载且形成穿透结构，所述穿透结构具有至少一个尖锐尖端；
第二半导体衬底，其具有第二衬底材料，带有第一表面、背对所述第一表面的第二表面及沿着通孔轴线从所述第一表面延伸到所述第二表面的穿衬底通孔；及
第二导电材料，其由所述第二半导体衬底承载且具有沿着所述通孔轴线定位的预形成的凹部，所述穿透结构接纳于所述凹部中且与所述第二导电材料机械接触及电接触，其中所述第二导电材料在所述通孔中朝向所述通孔的敞开端比朝向所述通孔的闭合端具有更大厚度，其中所述凹部包含与所述凹部的敞开端邻近的彼此接触的对置凸瓣。
2.根据权利要求1所述的系统，其中所述凹部具有沿着所述通孔轴线的第一尺寸及横切于所述通孔轴线的第二尺寸，所述第一尺寸大于或等于所述第二尺寸。
3.根据权利要求1所述的系统，其中所述凹部远离第一表面向内延伸到所述通孔中。
4.根据权利要求1所述的系统，其中所述第二导电材料沿着所述通孔轴线从所述第一表面向外延伸，且其中所述凹部形成于所述第二导电材料中，其中所述凹部的至少一部分从所述第一表面向外定位。
5.根据权利要求1所述的系统，其中所述第一衬底材料形成第一半导体裸片的至少一部分且所述第二衬底材料形成第二半导体裸片的至少一部分，且其中所述系统进一步包括被定位且附接在所述第一与第二半导体裸片之间的粘合剂。
6.根据权利要求1所述的系统，其中所述第一衬底材料形成第一半导体裸片的至少一部分且所述第二衬底材料形成第二半导体裸片的至少一部分，且其中所述第二衬底材料包含穿衬底通孔，在所述通孔的一端处具有所述凹部且在所述通孔的另一端处具有凸出部，且其中所述系统进一步包括具有其中接纳所述第二半导体裸片的所述凸出部的凹部的第三半导体裸片。
7.根据权利要求1所述的系统，其中所述第一衬底材料形成第一半导体裸片的至少一部分且所述第二衬底材料形成第二半导体裸片的至少一部分，进一步其中所述穿透结构具有被接纳于所述凹部中的大体箭头形状的横截面。
8.一种半导体系统，其包括：
第一半导体衬底材料，其具有沿着通孔轴线延伸的穿衬底通孔；
第一导电材料，其安置于所述通孔中；
穿透结构，其沿着所述通孔轴线对准且远离所述通孔延伸，所述穿透结构具有外表面，其沿着所述穿透结构的外围在空间上以非单调方式变化；及
第二半导体衬底材料，其具有凹部，所述凹部具有安置在所述凹部中的第二导电材料，其中所述第二导电材料在所述通孔中朝向所述通孔的敞开端比朝向所述通孔的闭合端具有更大厚度，其中所述凹部包含与所述凹部的敞开端邻近的彼此接触的对置凸瓣，其中所述穿透结构接纳于所述第二半导体衬底材料的所述凹部中，且所述第二导电材料通过所述穿透结构而变形，且其中所述穿透结构与所述第二导电材料机械接触及电接触。
9.根据权利要求8所述的半导体系统，其中所述外表面具有大体箭头型的形状。
10.根据权利要求8所述的半导体系统，其中所述外表面包含远离所述通孔延伸的多个树枝状结构。
11.根据权利要求8所述的半导体系统，其中所述外表面的侧部分包含沿大体横切于所述通孔的主轴线的方向延伸的多个突出部及凹部。
12.根据权利要求8所述的半导体系统，其中所述外表面的端部分包含沿与所述通孔轴线大体对准的方向延伸的多个突出部及凹部。
13.根据权利要求8所述的半导体系统，其中所述穿透结构为由所述第一半导体衬底材料承载的多个穿透结构中的一者，且其中相邻穿透结构之间的间距小于50微米，且个别穿透结构的横向尺寸小于20微米。
14.根据权利要求8所述的系统，其中所述穿透结构包含位于包含除锡以外的金属的下伏金属结构上的锡涂层。
15.一种半导体系统，其包括：
第一半导体衬底材料，其具有沿着第一通孔轴线延伸的穿衬底通孔；
导电材料，其安置于所述通孔中；及
穿透结构，其与所述通孔对准且远离所述通孔延伸，所述穿透结构具有远离所述通孔延伸的至少一个尖锐尖端；及
第二半导体衬底材料，其具有沿着第二通孔轴延伸的第二通孔；及
第二导电材料，其安置于所述第二通孔中，且具有凹部，其中所述第二导电材料在所述通孔中朝向所述凹部的敞开端比朝向所述凹部的闭合端具有更大厚度，其中所述凹部包含与所述凹部的敞开端邻近的彼此接触的对置凸瓣，其中所述穿透结构接纳于所述通孔中，且所述第二导电材料通过所述穿透结构而变形。
16.根据权利要求15所述的半导体系统，其中所述穿透结构包含单个表面特征，所述单个表面特征在被与所述通孔轴线大体对准的平面横断时具有大体三角形横截面形状。
17.根据权利要求16所述的半导体系统，其中所述单个表面特征包含具有所述大体三角形横截面形状的头部及定位于所述头部与所述通孔之间的轴杆。
18.根据权利要求15所述的半导体系统，其中所述穿透结构包含沿与所述通孔轴线大体对准的第一方向及大体横切于所述通孔轴线的第二方向中的至少一者远离所述通孔延伸的多个凸出部。
19.根据权利要求18所述的半导体系统，其中所述多个凸出部包含从所述穿透结构的下伏材料凸出的树枝状生长结构。
20.根据权利要求18所述的半导体系统，其中所述多个凸出部通过蚀刻到所述穿透结构的下伏材料中的凹部间隔开。
21.根据权利要求15所述的半导体系统，其中所述穿透结构朝向所述通孔的第一端定位，且其中所述系统进一步包括朝向所述通孔的第二端定位的导电容座，所述导电容座经定位以接纳另一半导体衬底的对应穿透结构。
22.一种半导体系统，其包括：
第一半导体衬底，其具有第一衬底材料；
穿透结构，其由所述第一半导体衬底承载；
第二半导体衬底，其具有第二衬底材料，包含第二导电材料的所述第二半导体衬底具有其中接纳所述穿透结构的预形成的凹部，所述穿透结构与所述凹部机械啮合并紧固到所述第二半导体衬底，其中所述第二导电材料在所述凹部中朝向所述凹部的敞开端比朝向所述凹部的闭合端具有更小开口，且其中所述第二导电材料的一部分向内凸出到所述凹部中，以使得所述第二导电材料至少部分地悬伸在所述凹部内，其中所述向内凸出的导电材料形成朝向所述凹部的敞开端的彼此接触的对置凸瓣。
23.根据权利要求22所述的系统，其中：
所述第一半导体衬底及沿着通孔轴线完全延伸穿过所述第一衬底材料的第一穿衬底通孔；
所述穿透结构包含沿着所述通孔轴线从所述第一穿衬底通孔向外凸出的第一导电材料；
所述第二半导体衬底及沿着所述通孔轴线完全延伸穿过所述第二衬底材料的第二穿衬底通孔；
所述凹部沿着所述通孔轴线对准且承载所述第二导电材料；
所述穿透结构的所述第一导电材料与所述凹部的所述第二导电材料机械互连；
所述穿透结构的所述第一导电材料与所述凹部的所述第二导电材料电接触；且
所述凹部的所述第二导电材料经定位以至少限制所述穿透结构从所述凹部中出来的轴向运动。
24.根据权利要求23所述的系统，其中所述穿透结构包含第一导电材料，且其中所述第一及第二导电材料在所述第一与第二半导体衬底之间形成电连接。
25.根据权利要求24所述的系统，其中所述第一与第二导电材料彼此直接接触。
26.根据权利要求24所述的系统，其进一步包括安置于所述第一与第二导电材料之间的第三导电材料。
27.根据权利要求23所述的系统，其中所述向内凸出的导电材料压靠在所述穿透结构的至少一部分上且经定位以抵制所述穿透结构从所述凹部的抽出。
28.一种用于制作半导体系统的方法，其包括：
在两个半导体衬底中的第二半导体衬底中形成通孔，所述通孔具有由所述第二半导体衬底限定的通孔壁、敞开端及闭合端；
在所述通孔壁上安置导电材料，其中所述导电材料在所述通孔中朝向所述敞开端比朝向所述闭合端具有更大厚度，其中所述导电材料界定凹部，所述凹部至少部分地由从所述通孔壁向内延伸的对置凸瓣界定，且其中所述对置凸瓣与所述凹部的敞开端邻近且彼此接触；及
通过将第一半导体衬底的穿透结构与所述第二半导体衬底的所述导电材料彼此啮合而将所述第二半导体衬底电连接及机械连接到所述第一半导体衬底，其中所述穿透结构具有至少一个尖锐尖端。
29.根据权利要求28所述的方法，其中啮合所述穿透结构包含借助所述穿透结构切入到所述导电材料中。
30.根据权利要求28所述的方法，连接所述第一与第二半导体衬底包含向所述穿透结构与所述导电材料之间的界面施加声能。
31.根据权利要求28所述的方法，其中所述穿透结构具有第一啮合表面且所述导电材料具有至少部分地包封凹部的第二啮合表面，所述第一及第二表面中的至少一者相对于运动轴线以锐角定向，且其中所述方法进一步包括通过在所述第一及第二半导体衬底中的至少一者沿着运动路径朝向另一者移动时将所述第一与第二表面彼此啮合来对准所述第一与第二半导体衬底。
32.根据权利要求28所述的方法，其中所述穿透结构具有大体尖细箭头型横截面形状，且其中所述方法进一步包括在使所述第一及第二半导体衬底中的至少一者朝向另一者移动时将所述穿透结构的尖细部分与所述对置凸瓣之间的中心区域对准，其中所述穿透结构的斜坡侧部分将所述穿透结构导引到所述凹部中。
33.一种用于制作半导体系统的方法，其包括：
通过将第一半导体衬底的穿透结构插入到第二半导体衬底的凹部中而将所述第一半导体衬底电连接及机械连接到所述第二半导体衬底，其中导电材料界定所述凹部，其中所述导电材料朝向所述凹部的敞开端比朝向所述凹部的闭合端具有更小开口，且其中所述导电材料的一部分向内凸出到所述凹部中，以使得所述导电材料至少部分地悬伸在所述凹部内，且其中所述向内凸出的导电材料形成与所述凹部的敞开端邻近的彼此接触的对置凸瓣；及
通过向凸出部与所述凹部的壁之间的界面施加声能而进一步将所述第一半导体衬底电连接及机械连接到所述第二半导体衬底。
34.根据权利要求33所述的方法，其中在不将所述第一及第二半导体衬底暴露于超过220℃的温度的情况下完成所述电连接及机械连接所述第一与第二半导体衬底的过程。
35.根据权利要求33所述的方法，其中施加声能包含施加超声能。
36.一种用于制作半导体系统的方法，其包括：
形成由第一半导体衬底承载的穿透结构，所述穿透结构具有尖锐尖端；
在第二半导体衬底中形成凹部；
将所述第一半导体衬底的所述穿透结构接纳于所述第二半导体衬底的所述凹部中；及
在所述穿透结构与所述凹部的壁之间安置导电材料，其中所述导电材料在所述凹部中朝向所述凹部的敞开端比朝向所述凹部的闭合端具有更大厚度，且其中所述导电材料形成与所述凹部的敞开端邻近的彼此接触的对置凸瓣；及
通过将所述导电材料与所述穿透结构且与所述凹部的所述壁结合来连接所述第一与第二半导体衬底。
37.根据权利要求36所述的方法，其中所述穿透结构包含第一导电材料且所述凹部的所述壁包含第二导电材料，且其中安置于所述穿透结构与所述凹部的所述壁之间的所述导电材料包含第三导电材料，且其中连接包含将所述第三导电材料以电解方式沉积成与所述第一及第二导电材料两者接触。
38.根据权利要求36所述的方法，其中将所述穿透结构接纳于所述凹部中包含在不将所述穿透结构与所述凹部的所述壁机械互锁的情况下将所述穿透结构接纳于所述凹部中。
39.根据权利要求38所述的方法，其中所述穿透结构为第一穿透结构且所述凹部为第一凹部，且其中所述第一半导体衬底包含第二穿透结构且所述第二半导体衬底包含第二凹部，且其中所述方法进一步包括将所述第二穿透结构与所述第二凹部的壁机械互锁以在安置所述导电材料时至少部分地将所述第一与第二半导体衬底彼此紧固。
40.根据权利要求36所述的方法，其进一步包括形成包含相邻穿透结构之间的空隙的冷却流通道。
41.根据权利要求40所述的方法，其进一步包括在所述冷却流通道中安置液体或气体冷却剂。
CN200980141580.3A 2008-09-11 2009-08-19 包含用于穿硅通孔的穿透结构的堆叠式裸片互连结构 Active CN102187458B (zh)

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US7872332B2 (en) 2011-01-18
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KR101260219B1 (ko) 2013-05-06
WO2010030474A1 (en) 2010-03-18
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