CN102227001A - 一种锗基nmos器件及其制备方法 - Google Patents
一种锗基nmos器件及其制备方法 Download PDFInfo
- Publication number
- CN102227001A CN102227001A CN2011101709914A CN201110170991A CN102227001A CN 102227001 A CN102227001 A CN 102227001A CN 2011101709914 A CN2011101709914 A CN 2011101709914A CN 201110170991 A CN201110170991 A CN 201110170991A CN 102227001 A CN102227001 A CN 102227001A
- Authority
- CN
- China
- Prior art keywords
- germanium
- substrate
- metal oxide
- metal
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 title claims abstract description 35
- 229910052732 germanium Inorganic materials 0.000 title claims abstract description 33
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 22
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title abstract description 6
- 239000004065 semiconductor Substances 0.000 title abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 15
- YBMRDBCBODYGJE-UHFFFAOYSA-N germanium dioxide Chemical compound O=[Ge]=O YBMRDBCBODYGJE-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims description 30
- 239000002184 metal Substances 0.000 claims description 30
- 238000002360 preparation method Methods 0.000 claims description 12
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Chemical group [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 claims description 12
- 229910005793 GeO 2 Inorganic materials 0.000 claims description 11
- 125000004430 oxygen atom Chemical group O* 0.000 claims description 10
- QVQLCTNNEUAWMS-UHFFFAOYSA-N barium oxide Inorganic materials [Ba]=O QVQLCTNNEUAWMS-UHFFFAOYSA-N 0.000 claims description 8
- CSSYLTMKCUORDA-UHFFFAOYSA-N barium(2+);oxygen(2-) Chemical compound [O-2].[Ba+2] CSSYLTMKCUORDA-UHFFFAOYSA-N 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 7
- PLEZGBHMSVTPPQ-UHFFFAOYSA-N [O-2].[Ra+2] Chemical compound [O-2].[Ra+2] PLEZGBHMSVTPPQ-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 239000004411 aluminium Substances 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229940119177 germanium dioxide Drugs 0.000 claims description 3
- XCNHXROWMVKLEB-UHFFFAOYSA-N [Ge+2].[O-2].[O-2].[Ti+4] Chemical compound [Ge+2].[O-2].[O-2].[Ti+4] XCNHXROWMVKLEB-UHFFFAOYSA-N 0.000 claims 3
- 230000004888 barrier function Effects 0.000 abstract description 14
- 238000005516 engineering process Methods 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 239000003989 dielectric material Substances 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 230000000295 complement effect Effects 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 238000002955 isolation Methods 0.000 description 6
- 238000000231 atomic layer deposition Methods 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical group [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000037230 mobility Effects 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- SCCCLDWUZODEKG-UHFFFAOYSA-N germanide Chemical compound [GeH3-] SCCCLDWUZODEKG-UHFFFAOYSA-N 0.000 description 3
- 230000001105 regulatory effect Effects 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 150000001768 cations Chemical class 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000005036 potential barrier Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 229910018575 Al—Ti Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 101100204059 Caenorhabditis elegans trap-2 gene Proteins 0.000 description 1
- 241000027294 Fusi Species 0.000 description 1
- 206010021143 Hypoxia Diseases 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002146 bilateral effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 208000018875 hypoxemia Diseases 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000007521 mechanical polishing technique Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0895—Tunnel injectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
- H01L29/41783—Raised source or drain electrodes self aligned with the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66643—Lateral single gate silicon transistors with source or drain regions formed by a Schottky barrier or a conductor-insulator-semiconductor structure
Abstract
本发明提供一种锗基NMOS器件结构及其制备方法。该方法在源、漏区与衬底之间淀积了二氧化锗(GeO2)和金属氧化物双层介质材料。本发明不但降低了锗基肖特基NMOS源漏处电子的势垒高度，改善了锗基肖特基晶体管的电流开关比，提升了锗基肖特基NMOS晶体管的性能，而且制作工艺与硅CMOS技术完全兼容，保持了工艺简单的优势。相对于现有工艺制备方法，本发明结构及其制造方法简单、有效地提升锗基肖特基NMOS晶体管的性能。
Description
技术领域
本发明属于超大规模集成电路(ULSI)工艺制造技术领域，具体涉及一种锗基NMOS器件结构及其制备方法。
背景技术
在摩尔定律的推动下，传统硅基MOS器件在不断提高集成度的同时也面临诸多挑战和限制：如迁移率退化、载流子速度饱和以及DIBL效应等，其中迁移率退化成为影响器件性能进一步提升的关键因素之一。为了解决器件尺寸缩小所带来的问题，必须采用高迁移率沟道材料。目前，锗基肖特基MOS晶体管成为了研究热点之一：首先，锗材料的电子和空穴迁移率比硅材料高，而且锗沟道器件的制备工艺与传统CMOS工艺兼容；同时肖特基源漏结构替代传统的高掺杂源漏不仅避免了锗材料中杂质固溶度低和扩散快的问题，而且还能减小源漏电阻率。因此，锗基肖特基MOS晶体管有望突破传统硅基器件的限制而获得优良的器件性能。
然而，锗基肖特基MOS晶体管也存在亟待解决的问题：锗基肖特基MOS晶体管源漏与衬底的界面处存在的大量悬挂键以及金属(或金属锗化物)在锗禁带中产生的金属诱导带隙态(MIGS)使费米能级被钉扎在价带附近，导致电子势垒较大。较大的电子势垒限制了锗基肖特基NMOS晶体管性能的提升：开态时源/沟道较大的电子势垒限制了器件的电流驱动能力；而关态时漏/沟道的较低的空穴势垒导致器件的泄漏电流增大；同时，较大的电子势垒使源端的电子主要以隧穿的方式进入沟道，导致器件的亚阈值斜率变大。因此，电子势垒高度成为影响锗基肖特基NMOS晶体管性能的决定因素之一。
发明内容
针对上述锗基肖特基NNMOS晶体管存在的问题，本发明通过在源漏区与衬底间淀积二氧化锗(GeO2)和金属氧化物双层介质薄膜来减弱费米能级钉扎效应，降低电子势垒，改善锗基肖特基NMOS晶体管的性能。
下面简述此发明的锗基肖特基NMOS晶体管的一种制备方法，步骤如下：
1-1)在锗基衬底上制作MOS结构；
1-2)淀积源漏区域的GeO2和金属氧化物薄层；
1-3)溅射低功函数金属薄膜，刻蚀形成金属源漏；
1-4)形成接触孔、金属连线。
步骤1-1)具体包括：
2-1)在衬底上制作隔离区；
2-2)淀积栅介质层以及栅；
2-3)形成栅结构；
2-4)形成侧墙结构。
所述步骤1-1)的锗基衬底包括体锗衬底、锗覆绝缘衬底(GOI)或外延锗衬底等。
所述步骤1-2)的金属氧化物采用低氧原子面密度的材料，要求此介质材料氧原子面密度与GeO2氧原子面密度比小于0.8，如氧化锶(SrO)、氧化钡(BaO)、氧化镭(RaO)等。
所述步骤1-3)的金属薄膜为铝膜或其他低功函数金属膜。
与现有技术相比，本发明的有益效果是：
此方法可以减弱费米能级钉扎效应，降低电子势垒，进而改善锗基肖特基NMOS器件的性能。首先，在GeO2上淀积一薄层金属氧化物，由于金属氧化物界面处的氧原子面密度比GeO2的低，GeO2界面处的氧原子向金属氧化物界面一侧移动，导致在界面处产生由GeO2指向金属氧化物方向的偶极子，而偶极子产生的电场有助于肖特基电子势垒的调节；其次，在众多介质中，GeO2能与Ge衬底形成较好的界面接触，有效钝化锗表面的悬挂键，降低界面态密度；再者，在金属源漏与衬底之间的金属氧化物和GeO2，可以阻挡金属或金属锗化物在锗禁带中产生金属诱导带隙态(MIGS)，从而达到进一步减弱费米能级钉扎效应、调节肖特基势垒高度的目的。
一般金属氧化物与GeO2界面处的氧原子面密度比越小，产生的偶极子越强，势垒调节越显著。而金属氧化物的氧原子面密度与金属阳离子的半径有关：金属阳离子半径越大，氧原子面密度越小。本发明采用的氧化锶(SrO)、氧化钡(BaO)、氧化镭(RaO)等材料的金属离子半径都大于1.1与GeO2界面处的氧原子面密度比小于0.8，进而产生较强的偶极子调节肖特基势垒。与采用单层绝缘介质材料如氧化铝(Al2O3)等相比，本实施方案能更有效地调节肖特基势垒，提升器件性能。
附图说明
图1(a)-图1(j)为本发明提出的制备锗基肖特基晶体管的流程图。
图中：1-衬底；2-P阱区域；3-隔离区；4-栅极介质层；5-金属栅；6-侧墙结构；7-GeO2薄层；8-绝缘氧化物薄膜；9-金属源漏；10-金属连线层。
具体实施方式
下面结合附图和具体实施方式对本发明作进一步详细描述：
图1为本发明一优选实施例制作锗基肖特基晶体管的方法流程图。本发明制作锗基肖特基晶体管的方法包括如下步骤：
步骤1：提供一块锗基衬底。如图1(a)所示，一块N型半导体锗衬底1，其中衬底1可采用体锗、锗覆绝缘(GOI)或外延锗衬底等。
步骤2：制作P阱区域。在锗衬底上淀积氧化硅和氮化硅层，首先通过光刻定义P阱区域并反应离子刻蚀掉P阱区域的氮化硅，然后离子注入P型杂质如硼等，再退火驱入制作P阱2，最后去掉注入掩蔽层，完成后如图1(b)所示。
步骤3：实现沟槽隔离。如图1(c)中隔离区3，首先在锗片上淀积氧化硅和氮化硅层，然后通过光刻定义并利用反应离子刻蚀技术刻蚀氮化硅、氧化硅以及锗形成沟槽，再利用化学气相淀积(CVD)方法淀积氧化硅回填隔离槽，最后采用化学机械抛光技术(CMP)将表面磨平，实现器件间的隔离。器件隔离不局限于浅槽隔离(STI)，也可以采用场氧隔离等技术。
步骤4：在所述有源区上形成栅极介质层。栅介质层可以采用高K介质、二氧化锗、氮氧化锗等材料。在淀积栅介质之前，一般需要用PH3、NH3以及F等离子体等进行表面钝化处理，或淀积一层界面层如硅(Si)、氮化铝(AlN)、氧化钇(Y2O3)等。本优选实施例先在锗衬底上制作一薄层氧化钇(Y2O3)作为界面层，然后采用原子层淀积(ALD)方法得到氧化铪(HfO2)栅介质层4，如图1(d)所示。
步骤5：在所述栅极介质层上形成栅极。栅可以采用多晶硅栅、金属栅、FUSI栅或全锗化物栅等，本实施例采用淀积氮化钛(TiN)制备金属栅，然后光刻定义并刻蚀形成栅结构，如图1(e)所示。
步骤6：在栅极两侧制备侧墙。可以通过淀积SiO2或Si3N4并刻蚀的方式制备侧墙，也可依次淀积Si3N4和SiO2形成双侧墙结构。如图1(f)所示，本实施例采用淀积SiO2并采用干法刻蚀的方法，在栅的两侧形成侧墙结构6。
步骤7：形成源漏区域的GeO2薄层。此薄层可以通过ALD、射频溅射、热氧化和臭氧氧化等方式获得。此处优选ALD淀积方式，GeO2厚度约为0.5～4nm，如图1(g)所示。
步骤8：淀积源漏区域的金属氧化物薄膜。要求此介质材料界面氧原子密度与GeO2界面氧原子密度比小于0.8，如氧化锶(SrO)、氧化钡(BaO)、氧化镭(RaO)等，本实施优选例采用氧化锶(SrO)。此层材料同样可以通过ALD淀积的方式得到，其厚度约为0.5～4nm，如图1(h)所示。
步骤9：制备金属源漏。可以采用物理气相淀积方式如蒸镀或溅射，在半导体衬底上淀积一层低功函数金属薄膜如铝(Al)、钛(Ti)、钇(Y)等。本优选实施例为铝，其厚度范围在100nm～1μm，通过光刻定义并刻蚀得到金属源漏，如图1(i)所示。
步骤10：形成接触孔、金属连线。首先用CVD淀积氧化层，光刻定义出开孔位置并刻蚀二氧化硅形成接触孔；然后溅射金属层如Al、Al-Ti等，再光刻定义出连线图形并刻蚀形成金属连线图形，最后进行金属化处理，获得金属连线层10，如图1(j)所示。
本发明提出了一种锗基NMOS器件结构及其制备方法。此方法不但可以降低锗基肖特基NMOS源漏处电子的势垒高度，提升锗基肖特基NMOS晶体管的性能，而且制备工艺简单并与硅CMOS技术完全兼容。与现有技术相比，所述半导体器件结构及其制备方法能简单有效地提升锗基肖特基NMOS晶体管的性能。
以上通过优选实施例详细描述了本发明，本领域的技术人员应当理解，以上所述仅为本发明的优选实施例，在不脱离本发明实质的范围内，可以对本发明的器件结构做一定的变形或修改，例如源漏结构也可采用提升、凹陷源漏结构或其他新结构如双栅、FinFET、Ω栅、三栅和围栅等；其制备方法也不限于实施例中所公开的内容，凡依本发明权利要求所做的均等变化与修饰，皆应属本发明的涵盖范围。
Claims (10)
1.一种锗基肖特基NMOS晶体管，其特征在于，在衬底与源、漏区之间淀积二氧化锗层和金属氧化物层，具体为：在衬底上淀积一层二氧化锗，在二氧化锗层上淀积一层金属氧化物，金属源、漏位于金属氧化物层上。
2.如权利要求1所述的锗基肖特基NMOS晶体管，其特征在于，所述二氧化锗层的厚度范围为0.5～4nm。
3.如权利要求1所述的锗基肖特基NMOS晶体管，其特征在于，所述金属氧化物界面氧原子密度与GeO2界面氧原子密度比小于0.8。
4.如权利要求1所述的锗基肖特基NMOS晶体管，其特征在于，所述金属氧化物层的厚度范围为0.5～4nm。
5.如权利要求3所述的锗基肖特基NMOS晶体管，其特征在于，所述金属氧化物选自氧化锶、氧化钡或氧化镭。
6.一种锗基肖特基NMOS晶体管的制备方法，步骤如下：
1-1)在锗基衬底上制作MOS结构；
1-2)淀积源、漏区域的GeO2和金属氧化物层；
1-3)溅射低功函数金属薄膜，刻蚀形成金属源、漏；
1-4)形成接触孔、金属连线。
7.如权利要求6所述的方法，其特征在于，步骤1-1)具体包括：
2-1)在衬底上制作隔离区；
2-2)淀积栅介质层以及栅；
2-3)形成栅结构；
2-4)形成侧墙结构。
8.如权利要求6所述的方法，其特征在于，所述步骤1-1)的锗基衬底包括体锗衬底、锗覆绝缘衬底或外延锗衬底。
9.如权利要求6所述的方法，其特征在于，所述步骤1-2)金属氧化物材料的界面氧原子密度与GeO2界面氧原子密度比小于0.8，优选氧化锶、氧化钡或氧化镭。
10.如权利要求6所述的方法，其特征在于，所述步骤1-3)的金属薄膜为铝膜或其他低功函数金属膜。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101709914A CN102227001B (zh) | 2011-06-23 | 2011-06-23 | 一种锗基nmos器件及其制备方法 |
| US13/580,971 US8865543B2 (en) | 2011-06-23 | 2012-02-21 | Ge-based NMOS device and method for fabricating the same |
| PCT/CN2012/071390 WO2012174871A1 (zh) | 2011-06-23 | 2012-02-21 | 一种锗基nmos器件及其制备方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101709914A CN102227001B (zh) | 2011-06-23 | 2011-06-23 | 一种锗基nmos器件及其制备方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102227001A true CN102227001A (zh) | 2011-10-26 |
| CN102227001B CN102227001B (zh) | 2013-03-06 |
Family
ID=44807962
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011101709914A Active CN102227001B (zh) | 2011-06-23 | 2011-06-23 | 一种锗基nmos器件及其制备方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8865543B2 (zh) |
| CN (1) | CN102227001B (zh) |
| WO (1) | WO2012174871A1 (zh) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012174871A1 (zh) * | 2011-06-23 | 2012-12-27 | 北京大学 | 一种锗基nmos器件及其制备方法 |
| CN102881562A (zh) * | 2012-10-11 | 2013-01-16 | 北京大学 | 一种锗基衬底的表面钝化方法 |
| CN102903625A (zh) * | 2012-10-18 | 2013-01-30 | 北京大学 | 锗基衬底表面钝化方法 |
| CN103137460A (zh) * | 2011-11-23 | 2013-06-05 | 中国科学院微电子研究所 | 一种分子尺度界面SiO2的形成和控制方法 |
| WO2013155775A1 (zh) * | 2012-04-18 | 2013-10-24 | 北京大学 | 实现锗基mos器件有源区之间隔离的方法 |
| CN103646865A (zh) * | 2013-12-25 | 2014-03-19 | 中国科学院微电子研究所 | 在Ge衬底制备超薄氧化锗界面修复层的方法 |
| CN105336694A (zh) * | 2015-10-13 | 2016-02-17 | 北京大学 | 一种锗基cmos的制备方法 |
| CN111463133A (zh) * | 2020-04-17 | 2020-07-28 | 中国科学院微电子研究所 | Ge基NMOS晶体管及其制作方法 |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6833556B2 (en) | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
| US7084423B2 (en) | 2002-08-12 | 2006-08-01 | Acorn Technologies, Inc. | Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions |
| KR101898027B1 (ko) | 2011-11-23 | 2018-09-12 | 아콘 테크놀로지스 인코포레이티드 | 계면 원자 단일층의 삽입에 의한 ⅳ족 반도체에 대한 금속 접점의 개선 |
| KR20140121617A (ko) * | 2013-04-08 | 2014-10-16 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US9722026B2 (en) * | 2013-08-30 | 2017-08-01 | Japan Science And Technology Agency | Semiconductor structure in which film including germanium oxide is provided on germanium layer, and method for manufacturing semiconductor structure |
| US9449885B1 (en) | 2015-06-19 | 2016-09-20 | International Business Machines Corporation | High germanium content FinFET devices having the same contact material for nFET and pFET devices |
| US10068981B2 (en) * | 2016-03-02 | 2018-09-04 | Lam Research Corporation | Rare earth metal surface-activated plasma doping on semiconductor substrates |
| US9620611B1 (en) | 2016-06-17 | 2017-04-11 | Acorn Technology, Inc. | MIS contact structure with metal oxide conductor |
| US10170627B2 (en) | 2016-11-18 | 2019-01-01 | Acorn Technologies, Inc. | Nanowire transistor with source and drain induced by electrical contacts with negative schottky barrier height |
| US10797137B2 (en) | 2017-06-30 | 2020-10-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier height |
| US11133226B2 (en) * | 2018-10-22 | 2021-09-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | FUSI gated device formation |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005026563A (ja) * | 2003-07-04 | 2005-01-27 | Renesas Technology Corp | 半導体装置 |
| CN1886826A (zh) * | 2003-10-22 | 2006-12-27 | 斯平内克半导体股份有限公司 | 动态肖特基势垒mosfet器件及其制造方法 |
| US20070026591A1 (en) * | 2002-08-12 | 2007-02-01 | Grupp Daniel E | Insulated gate field effect transistor having passivated schottky barriers to the channel |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6235568B1 (en) * | 1999-01-22 | 2001-05-22 | Intel Corporation | Semiconductor device having deposited silicon regions and a method of fabrication |
| US6782610B1 (en) * | 1999-05-21 | 2004-08-31 | North Corporation | Method for fabricating a wiring substrate by electroplating a wiring film on a metal base |
| JP3648466B2 (ja) * | 2001-06-29 | 2005-05-18 | 株式会社東芝 | 電界効果トランジスタ、半導体基板、電界効果トランジスタの製造方法及び半導体基板の製造方法 |
| US7598134B2 (en) * | 2004-07-28 | 2009-10-06 | Micron Technology, Inc. | Memory device forming methods |
| JP4940682B2 (ja) | 2005-09-09 | 2012-05-30 | 富士通セミコンダクター株式会社 | 電界効果トランジスタおよびその製造方法 |
| US7700452B2 (en) * | 2007-08-29 | 2010-04-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel transistor |
| FR2921750B1 (fr) * | 2007-10-02 | 2014-07-25 | Commissariat Energie Atomique | Formation selective d'un compose comprenant un materiau semi-conducteur et un materiau metallique dans un substrat, a travers une couche d'oxyde de germanium |
| KR101527535B1 (ko) * | 2008-10-21 | 2015-06-10 | 삼성전자주식회사 | 반도체 소자의 형성 방법 |
| CN101866953B (zh) | 2010-05-26 | 2012-08-22 | 清华大学 | 低肖特基势垒半导体结构及其形成方法 |
| CN102227001B (zh) | 2011-06-23 | 2013-03-06 | 北京大学 | 一种锗基nmos器件及其制备方法 |
-
2011
- 2011-06-23 CN CN2011101709914A patent/CN102227001B/zh active Active
-
2012
- 2012-02-21 US US13/580,971 patent/US8865543B2/en active Active
- 2012-02-21 WO PCT/CN2012/071390 patent/WO2012174871A1/zh active Application Filing
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070026591A1 (en) * | 2002-08-12 | 2007-02-01 | Grupp Daniel E | Insulated gate field effect transistor having passivated schottky barriers to the channel |
| JP2005026563A (ja) * | 2003-07-04 | 2005-01-27 | Renesas Technology Corp | 半導体装置 |
| CN1886826A (zh) * | 2003-10-22 | 2006-12-27 | 斯平内克半导体股份有限公司 | 动态肖特基势垒mosfet器件及其制造方法 |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012174871A1 (zh) * | 2011-06-23 | 2012-12-27 | 北京大学 | 一种锗基nmos器件及其制备方法 |
| US8865543B2 (en) | 2011-06-23 | 2014-10-21 | Peking University | Ge-based NMOS device and method for fabricating the same |
| CN103137460A (zh) * | 2011-11-23 | 2013-06-05 | 中国科学院微电子研究所 | 一种分子尺度界面SiO2的形成和控制方法 |
| WO2013155775A1 (zh) * | 2012-04-18 | 2013-10-24 | 北京大学 | 实现锗基mos器件有源区之间隔离的方法 |
| US9147597B2 (en) | 2012-04-18 | 2015-09-29 | Peking University | Method for isolating active regions in germanium-based MOS device |
| CN102881562A (zh) * | 2012-10-11 | 2013-01-16 | 北京大学 | 一种锗基衬底的表面钝化方法 |
| CN102903625A (zh) * | 2012-10-18 | 2013-01-30 | 北京大学 | 锗基衬底表面钝化方法 |
| CN102903625B (zh) * | 2012-10-18 | 2015-11-04 | 北京大学 | 锗基衬底表面钝化方法 |
| CN103646865A (zh) * | 2013-12-25 | 2014-03-19 | 中国科学院微电子研究所 | 在Ge衬底制备超薄氧化锗界面修复层的方法 |
| CN105336694A (zh) * | 2015-10-13 | 2016-02-17 | 北京大学 | 一种锗基cmos的制备方法 |
| CN105336694B (zh) * | 2015-10-13 | 2018-03-30 | 北京大学 | 一种锗基cmos的制备方法 |
| CN111463133A (zh) * | 2020-04-17 | 2020-07-28 | 中国科学院微电子研究所 | Ge基NMOS晶体管及其制作方法 |
| CN111463133B (zh) * | 2020-04-17 | 2023-01-17 | 中国科学院微电子研究所 | Ge基NMOS晶体管及其制作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102227001B (zh) | 2013-03-06 |
| US20140117465A1 (en) | 2014-05-01 |
| WO2012174871A1 (zh) | 2012-12-27 |
| US8865543B2 (en) | 2014-10-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102227001B (zh) | 一种锗基nmos器件及其制备方法 | |
| CN102222687B (zh) | 一种锗基nmos器件及其制备方法 | |
| CN102136428B (zh) | 一种锗基肖特基n型场效应晶体管的制备方法 | |
| US10229975B2 (en) | Fabrication of silicon-germanium fin structure having silicon-rich outer surface | |
| US6921691B1 (en) | Transistor with dopant-bearing metal in source and drain | |
| CN101079380A (zh) | 半导体结构及其制造方法 | |
| CN107978635A (zh) | 一种半导体器件及其制造方法和电子装置 | |
| CN103377947B (zh) | 一种半导体结构及其制造方法 | |
| US20070096226A1 (en) | MOSFET dielectric including a diffusion barrier | |
| CN108321197A (zh) | 一种遂穿场效应晶体管及其制造方法 | |
| CN113161240B (zh) | 基于45nm工艺的多金属异质栅介质抗辐照MOS场效应管及方法 | |
| CN102479801B (zh) | 一种半导体器件及其形成方法 | |
| CN105244375B (zh) | 具有突变隧穿结的pnin/npip型ssoi tfet及制备方法 | |
| CN104576381B (zh) | 一种非对称超薄soimos晶体管结构及其制造方法 | |
| US20090079013A1 (en) | Mos transistor and method for manufacturing the transistor | |
| CN103094217B (zh) | 晶体管制作方法 | |
| CN105118783B (zh) | 具有突变隧穿结的pnin/npip型fd‑goi tfet及制备方法 | |
| CN113053751B (zh) | 半导体结构及其形成方法 | |
| Lin et al. | Investigation of the novel attributes of a vertical MOSFET with internal block layer (bVMOS): 2-D simulation study | |
| CN105118782B (zh) | 具有突变隧穿结的ssoi隧穿场效应晶体管及制备方法 | |
| CN105261563B (zh) | 具有突变隧穿结的fd‑goi隧穿场效应晶体管及制备方法 | |
| CN105118784B (zh) | 具有突变隧穿结的utb‑soi隧穿场效应晶体管及制备方法 | |
| CN102468210B (zh) | 一种隔离结构及制造方法、以及具有该结构的半导体器件 | |
| KR20020002165A (ko) | 게이트산화막의 형성방법 | |
| CN102420163A (zh) | 一种隔离结构及制造方法、以及具有该结构的半导体器件 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Free format text: FORMER OWNER: BEIJING UNIV. Effective date: 20141024 Owner name: BEIJING UNIV. Effective date: 20141024 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100871 HAIDIAN, BEIJING TO: 100176 DAXING, BEIJING |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20141024 Address after: 100176 No. 18, Wenchang Avenue, Beijing economic and Technological Development Zone Patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Peking University Address before: 100871 Beijing the Summer Palace Road, Haidian District, No. 5 Patentee before: Peking University |