CN102244033B - The method of copper depression is reduced in copper interconnection line Damascus technique - Google Patents
The method of copper depression is reduced in copper interconnection line Damascus technique Download PDFInfo
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- CN102244033B CN102244033B CN201110170846.6A CN201110170846A CN102244033B CN 102244033 B CN102244033 B CN 102244033B CN 201110170846 A CN201110170846 A CN 201110170846A CN 102244033 B CN102244033 B CN 102244033B
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Abstract
The present invention relates to a kind of method reducing copper depression in copper interconnection line Damascus technique, comprise the following steps: a substrate is provided, in described substrate, be formed with wire casing, be coated with barrier layer and layers of copper successively at described substrate surface; A protective layer is formed above described layers of copper; Utilize photoetching and etching technics to remove the protective layer be positioned at outside described wire casing above layers of copper, retain the protective layer be arranged in above wire casing layers of copper; Carry out first time chemical-mechanical planarization, remove the layers of copper be positioned at outside described wire casing; Carry out second time chemical-mechanical planarization, remove the barrier layer and remaining protective layer that are positioned at outside described wire casing.Process of the present invention is by the layers of copper in wire casing arranges layer protective layer; make in Chemical Mechanical Polishing (CMP); layers of copper in wire casing can be protected; this protective layer is removed when second time chemical-mechanical planarization, thus obtains the copper interconnection line damascene structure without copper depression.
Description
Technical field
The present invention relates to semiconductor fabrication process, particularly relate to a kind of method reducing copper depression in copper interconnection line Damascus technique.
Background technology
Along with reducing of integrated circuit feature size, the raising of operating frequency, the copper that people start to use resistivity less in chip manufacturing is to replace aluminium as metal interconnection wire.But because copper interconnection line can not use Dry etching techniques, so remove unnecessary copper, to form wire mainly through chemical-mechanical planarization (CMP) technology.
In CMP technology, wafer by wafer carrying structure (PolishHead) be crushed on fill lapping liquid (Slurry) polishing pad on.Wafer is relative polishing pad motion under the condition that pressure, relative velocity, temperature etc. are controlled.Chemical substance oxidation in lapping liquid and etching crystal column surface, and the particle suspended in lapping liquid carries out polishing to crystal column surface mechanically.The material of crystal column surface is removed, the flat surfaces needed for acquisition under the acting in conjunction of these two kinds of modes.
Damascus copper technology, by first making substrate, then line groove (wire casing) is formed in the substrate, pass through deposit, the modes such as plating covering barrier layer and layers of copper above wire casing and substrate, remove unnecessary layers of copper finally by chemical-mechanical planarization mode, the layers of copper be retained in wire casing is the interconnection line expecting to obtain.
CMP dish defect (CMPDishingDefect): formed in the process of layers of copper in plating, layers of copper in wire casing and the outer suprabasil layers of copper of wire casing can form obvious difference in height, and this removes in the process of unnecessary copper in oxide layer at chemical-mechanical planarization also can have certain removal speed to the layers of copper in wire casing.Remove totally in the outer suprabasil layers of copper of wire casing like this, the layers of copper in wire casing also has a certain amount of copper and is removed.CMP dish defect that Here it is.
Fig. 1 to Fig. 5 process that under existing copper interconnecting line Damascus manufacturing technology step and prior art, dish-shaped defect is formed with the formal description of profile.
As shown in Figure 1, provide a substrate, described substrate comprises successively for substrate 12 (or being intermetallic metal interconnection layer), nitride layer 22 and oxide skin(coating) 23.
Use conventional photoetching and lithographic technique, define pattern on oxide skin(coating) 23, and select etching to remove part nitride layer 22 and oxide skin(coating) 23, form metal interconnected required wire casing, and form barrier layer 24 in substrate surface deposition, described barrier layer 24 covers bottom surface and the side of wire casing in substrate, and covers the surface of the outer substrate of wire casing, forms structure as shown in Figure 2.
As shown in Figure 3, barrier layer 24 utilizes electro-plating method form layers of copper 25, the thickness of layers of copper 25 is equal to or greater than the degree of depth of wire casing, is filled completely by wire casing.
Then, utilize chemical-mechanical planarization to carry out polishing to layers of copper 25, polishing is divided into two stages: the first stage, carries out the chemical-mechanical planarization of layers of copper, as shown in Figure 4, removes layers of copper 25 unnecessary on barrier layer 24, stops at barrier layer 24; Second stage, to the chemical-mechanical planarization on barrier layer 24, as shown in Figure 5, removes barrier layer 204 unnecessary on wire casing additional oxide layer 23, stops at oxide skin(coating) 23 interface, finally obtain the last copper shown in Fig. 5 and inlay interconnection line structure.
As shown in Figure 5, in prior art, carry out crossing in layer of first time chemical-mechanical planarization in layers of copper 25, the layers of copper 25 in wire casing too can be polished.Graphics effect due to CMP makes the polish removal rate of layers of copper 25 in wire casing be greater than to be positioned at the speed of the layers of copper 25 above wire casing external barrier layer 24.Due to the existence of this removal speed, the layers of copper 25 above wire casing external barrier layer 24 can be caused to remove totally, and the height of the layers of copper 25 in wire casing can lower than the thickness of both sides oxide skin(coating) 23.Between layers of copper 25 and oxide skin(coating) 23, height of formation is poor, and form copper depression 30, namely its difference in height is the dish-shaped defect described by copper chemical mechanical planarization.Relative to whole wafer, the uniformity etc. of the degree of depth of wire casing and width and clearance all has a certain impact to copper depression 30.
Summary of the invention
The technical problem to be solved in the present invention is, provides a kind of process of copper interconnection line Damascus technique of minimizing copper depression newly.
For solving the problem, the invention provides a kind of method reducing copper depression in copper interconnection line Damascus technique, comprising the following steps: a substrate is provided, in described substrate, be formed with wire casing, be coated with barrier layer and layers of copper successively at described substrate surface; A protective layer is formed above described layers of copper; Utilize photoetching and etching technics, remove the protective layer be positioned at above the outer layers of copper of described wire casing, retain the protective layer be arranged in above wire casing layers of copper; Carry out first time chemical-mechanical planarization, remove the layers of copper be positioned at outside described wire casing; Carry out second time chemical-mechanical planarization, remove the barrier layer and remaining protective layer that are positioned at outside described wire casing.
Further, in described wire casing, the thickness of layers of copper is more than or equal to the degree of depth of wire casing, difference 0 ~ 300 dust.
Further, the material of described protective layer is the composition of Si oxide, silicon nitride or said two devices.
Further, described protective layer adopts chemical vapour deposition technique to be formed.
Further, the thickness of described protective layer is 100 dust ~ 300 dusts.
Further, remove the protective layer step be arranged in above the outer layers of copper of described wire casing, described etching technics is anisotropic etching.
In sum; process of the present invention is by the layers of copper in wire casing arranges layer protective layer; the grinding rate of this protective layer in Chemical Mechanical Polishing (CMP) is much smaller than copper; thus in the first Chemical Mechanical Polishing (CMP); layers of copper outside wire casing is removed; layers of copper in wire casing can be protected, and this protective layer is removed when second time chemical-mechanical planarization, thus obtains the copper interconnection line damascene structure without copper depression.
Accompanying drawing explanation
Fig. 1 ~ Fig. 5 is the manufacturing step schematic diagram of copper interconnection line Damascus technique in prior art.
Fig. 6 ~ Figure 11 is the manufacturing step schematic diagram of copper interconnecting line Damascus technique one embodiment in the present invention.
Figure 12 is the manufacturing step schematic flow sheet of copper interconnecting line Damascus technique one embodiment in the present invention.
Embodiment
For making content of the present invention clearly understandable, below in conjunction with Figure of description, content of the present invention is described further.Certain the present invention is not limited to this specific embodiment, and the general replacement known by those skilled in the art is also encompassed in protection scope of the present invention.
Secondly, the present invention's detailed statement that utilized schematic diagram to carry out, when describing example of the present invention in detail, for convenience of explanation, schematic diagram, should in this, as limitation of the invention not according to general ratio partial enlargement.
Core concept of the present invention is: the present invention is by providing a kind of process of minimizing copper depression newly; by the layers of copper in wire casing arranges layer protective layer; the grinding rate of this protective layer in first time Chemical Mechanical Polishing (CMP) is much smaller than copper; make like this in first time Chemical Mechanical Polishing (CMP); layers of copper in wire casing can be protected; this protective layer is removed when second time chemical-mechanical planarization, thus reaches the object that copper interconnection line damascene structure does not have copper depression.
The invention provides a kind of method reducing copper depression in copper interconnection line Damascus technique, Figure 12 is the manufacturing step schematic flow sheet of copper interconnecting line Damascus technique one embodiment in the present invention.Fig. 6 ~ Figure 11 is the manufacturing step schematic diagram of copper interconnecting line Damascus technique one embodiment in the present invention.Incorporated by reference to Fig. 6 ~ Figure 12, said method comprising the steps of,
S01 a: substrate is provided, described underlying structure as shown in Figure 6, comprise for substrate 102 (described substrate 102 is silicon substrate or is intermetallic metal interconnection layer), nitride layer 202 and oxide skin(coating) 203 successively, described nitride layer 202 and oxide skin(coating) 203 adopt chemical vapour deposition technique to be formed, and wherein the thickness of oxide skin(coating) 203 is 4000 dust ~ 6000 dusts.
As shown in Figure 7, comprise in described substrate in described substrate and be formed with wire casing, described wire casing adopts conventional photoetching and lithographic technique, define pattern on oxide skin(coating) 203, and select etching to remove part nitride layer 202 and oxide skin(coating) 203, stop on substrate 102, thus form the wire casing required for metal interconnection wire, the degree of depth of described wire casing is 5250 dust ~ 5500 dusts.
As shown in Figure 7, barrier layer 204 is formed in described substrate surface deposition, the bottom surface of described barrier layer 204 uniform fold in the wire casing of substrate and side, and be covered in the surface of the outer substrate of wire casing, form structure as shown in Figure 7, wherein said barrier layer 204 adopts physical vaporous deposition to be formed, comprise tantalum or tantalum compound layer that a layer thickness is about 100 dust ~ 300 dusts, described barrier layer 204 can also comprise the copper crystal seed layer that a layer thickness is about 50 dust ~ 100 dusts, and described copper crystal seed layer forms the adhesiveness of layers of copper for increasing follow-up plating.
As shown in Figure 8, described barrier layer 204 forms layers of copper 205, utilize electric plating method to form layers of copper 205, layers of copper 205 is full of wire casing, and the thickness of layers of copper 205 is equal to, or greater than the degree of depth of wire casing, and gap is at 0 dust ~ 300 dust.
S02: as shown in Figure 8, forms a protective layer 206 above described layers of copper 205; Described protective layer 206 adopts chemical vapour deposition technique to be formed, and its material is the composition of Si oxide, silicon nitride or said two devices, and preferably, the thickness of described protective layer 206 is 100 dust ~ 300 dusts.
S03: as shown in Figure 9, utilizes photoetching and etching technics to remove the protective layer 206 be positioned at outside described wire casing above layers of copper 205, retains the protective layer 206 be arranged in above wire casing layers of copper 205, form structure as shown in Figure 9; Forming process is as follows: utilize photoetching technique to form photoresist on layers of copper 205 surface; utilize mask plate exposure figure photoresist; photoresist is developed; remove the photoresist in the outer layers of copper 205 of wire casing; carry out etching technics; remove protective layer 206 step be arranged in above the outer layers of copper 205 of described wire casing; described lithographic method is anisotropic etching; thus in etching process; unidirectional etching removes the protective layer 206 above the outer layers of copper 205 of wire casing; after removing residue photoresist, retain the protective layer 206 above layers of copper 205 in wire casing.
S04: carry out first time chemical-mechanical planarization, removes the layers of copper 205 be positioned at outside described wire casing, forms structure as shown in Figure 10; Carry out in first time Chemical Mechanical Polishing (CMP) to copper; protective layer 206 is nitride, oxide or its said two devices composition; chemical-mechanical planarization is copper chemical mechanical planarization process for the first time; therefore the removal speed of protective layer 206 is far smaller than the removal speed of copper in the process; be about 1: 1000, therefore remove when being positioned at the outer layers of copper 205 of wire casing completely, under the protection of the layers of copper 205 being positioned at wire casing protective layer 206 above it; without any consumption, thus avoid the generation of copper depression.
S05: carry out second time chemical-mechanical planarization, removes the barrier layer 204 and remaining protective layer 206 that are positioned at outside described wire casing, thus forms structural representation as shown in figure 11; Wherein barrier layer 204 is close with the removal speed of protective layer 206, thus can remove simultaneously.
In sum; process of the present invention is by the layers of copper in wire casing arranges layer protective layer; the grinding rate of this protective layer in first time Chemical Mechanical Polishing (CMP) is much smaller than copper; make like this in Chemical Mechanical Polishing (CMP); layers of copper in wire casing can be protected; this protective layer is removed when second time chemical-mechanical planarization, thus obtains the copper interconnection line damascene structure without copper depression.Although the present invention discloses as above with preferred embodiment; so itself and be not used to limit the present invention; have in any art and usually know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on those as defined in claim.
Claims (6)
1. reduce a method for copper depression in copper interconnection line Damascus technique, it is characterized in that, comprise the following steps:
One substrate is provided, in described substrate, is formed with wire casing, be coated with barrier layer and layers of copper successively at described substrate surface;
A protective layer is formed above described layers of copper;
Utilize photoetching and etching technics, remove the protective layer be positioned at above the outer layers of copper of described wire casing, retain the protective layer be arranged in above wire casing layers of copper;
Carry out first time chemical-mechanical planarization, remove the layers of copper be positioned at outside described wire casing;
Carry out second time chemical-mechanical planarization, be positioned at barrier layer outside described wire casing and remaining protective layer to remove simultaneously.
2. reduce the method for copper depression in copper interconnection line Damascus technique as claimed in claim 1, it is characterized in that, in described wire casing, the thickness of layers of copper is more than or equal to the degree of depth of wire casing, difference 0 ~ 300 dust.
3. reduce the method for copper depression in copper interconnection line Damascus technique as claimed in claim 1, it is characterized in that, the material of described protective layer is the composition of Si oxide, silicon nitride or said two devices.
4. reduce the method for copper depression in copper interconnection line Damascus technique as claimed in claim 1, it is characterized in that, described protective layer adopts chemical vapour deposition technique to be formed.
5. reduce the method for copper depression in copper interconnection line Damascus technique as claimed in claim 1, it is characterized in that, the thickness of described protective layer is 100 dust ~ 300 dusts.
6. reduce the method for copper depression in copper interconnection line Damascus technique as claimed in claim 1, it is characterized in that, remove the protective layer step be arranged in above the outer layers of copper of described wire casing, described etching technics is anisotropic etching.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6140224A (en) * | 1999-04-19 | 2000-10-31 | Worldiwide Semiconductor Manufacturing Corporation | Method of forming a tungsten plug |
| CN1447391A (en) * | 2002-03-21 | 2003-10-08 | 联华电子股份有限公司 | Method for improving unevenness in chemico-mechanical polishing |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6140224A (en) * | 1999-04-19 | 2000-10-31 | Worldiwide Semiconductor Manufacturing Corporation | Method of forming a tungsten plug |
| CN1447391A (en) * | 2002-03-21 | 2003-10-08 | 联华电子股份有限公司 | Method for improving unevenness in chemico-mechanical polishing |
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