CN102332396A - Method for designing power vertical double-diffused metal-oxide-semiconductor field effect transistor (VDMOSFET) structure - Google Patents
Method for designing power vertical double-diffused metal-oxide-semiconductor field effect transistor (VDMOSFET) structure Download PDFInfo
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- CN102332396A CN102332396A CN201110331187A CN201110331187A CN102332396A CN 102332396 A CN102332396 A CN 102332396A CN 201110331187 A CN201110331187 A CN 201110331187A CN 201110331187 A CN201110331187 A CN 201110331187A CN 102332396 A CN102332396 A CN 102332396A
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Abstract
The invention relates to a method for designing a power vertical double-diffused metal-oxide-semiconductor field effect transistor (VDMOSFET) structure, which is characterized by comprising the following steps of: firstly, selecting a cell structure, namely adopting a regular hexagon structure of cells arranged in a shape like a Chinese character pin; secondly, optimizing a gate electrode structure, namely extending metal at a pressure welding spot of a gate to a cell unit which is far away from the pressure welding point, extending three metal strips of a power tube from the pressure welding point and contacting the three metal strips with polycrystalline silicon below; and finally, designing a terminal structure by increasing the length of an aluminum field plate in a mode of covering a protection ring by using the field plate. The various indexes of a chip designed by the method are optimized, the chip has the effects of the field plate and a field limiting ring, a new electric field peak value generated on the edge of the field plate by the conventional structure is avoided, and early breakdown of voltage between the edge of the field plate and the field limiting ring is avoided.
Description
Technical field
The present invention relates to a kind of POWER VD MOSFET structure Design method.
Background technology
Along with perfect with new technology of improving constantly of semiconductor process technology, POWER VD MOSFET has obtained rapid development thereupon.Present development and design becomes the emphasis of present novel electric power electric device research just towards high pressure, high frequency, big sense of current development.Under this background, brand-new high voltage, the method for designing of powerful VDMOSFET continues to bring out.
Summary of the invention
The purpose of this invention is to provide a kind of POWER VD MOSFET structure Design method, this method has improved the puncture voltage and the reliability of product greatly.
POWER VD MOSFET structure Design method of the present invention is characterized in that, may further comprise the steps: at first the cellular structure is chosen, adopted the cellular structure of regular hexagon article word arrangement; Secondly gate electrode structure is optimized, with the metal at the grid pressure welding point place tripping solder joint place, cellular unit far away that extends, power tube is from extend three strip metal bars and contact with following polysilicon of pressure welding point; Be the junction termination structures design at last, adopt the mode of field plate covering protection ring, realize through the length that increases the aluminium field plate.
Chip according to the inventive method design; Its each item index all is optimized; And played the effect of field plate and field limiting ring, and avoided traditional structure to produce new peak electric field at the edge of field plate, also avoided the puncture in advance between voltage panel edges on the scene and the field limiting ring.
Description of drawings
Fig. 1 is the top plan view of the VDMOSFET device of design according to the present invention.
Fig. 2 is the side cutaway view of VDMOSFET device among Fig. 1.
Lw representes window diffusion region length among the figure, and Xjp is a P-district junction depth, and L is the channel length of MOSFET; W is a VDMOSFET unit are cellular channel width.
Embodiment
Below in conjunction with accompanying drawing and embodiment the present invention is further specified.
The present invention provides a kind of and at first the cellular structure is chosen: because the electric field of equilateral triangle cellular is concentrated easily, cause the reduction of drain-source breakdown voltage; The diagonal of hexagon cellular and the ratio of opposite side distance is less than the diagonal of square cellular and the ratio of the length of side, the good uniformity of CURRENT DISTRIBUTION, and curvature effect is little; Circular cellular sacrifice rate (be A '/Acell, A ' the dead space area that can not flow through wherein for junction, cellular edge electric current, Acell is the cellular gross area) greater than the hexagon cellular.Therefore, 600V high pressure VDMOSFET device adopts the cellular structure of regular hexagon " article " word arrangement, and is as shown in Figure 1.
Secondly gate electrode structure is optimized: POWER VD MOSFET is composed in parallel by a lot of little cellulars unit.And since the existence of grid polycrystalline silicon resistance make under certain grid bias, can not fully open from grid pressure welding point cellular raceway groove far away.Therefore, in order to reduce the influence of gate material resistance, usually with the metal at the grid pressure welding point place tripping solder joint place, cellular unit far away that extends.Power tube is from extend 3 strip metal bars and contact with following polysilicon of pressure welding point.Be the junction termination structures design at last: the junction termination structures that traditional field plate combines with field limiting ring, during design, if the spacing of field plate and guard ring is excessive, PN junction just at first punctured before the depletion layer under the field plate expanded to guard ring, and guard ring will not have effect.Adopt the mode of field plate covering protection ring at present, avoided the design challenges of traditional field plate and field limiting ring structure, and made its simplification.This structure realizes through the length that increases the aluminium field plate on layout design; Than being easier to control; Make metal cover from the nearest field limiting ring of main knot; It has not only played the effect of field plate and field limiting ring, has avoided traditional structure to produce new peak electric field at the edge of field plate again, has avoided the puncture in advance between voltage panel edges on the scene and the field limiting ring.
Each item index that draws the chip that this paper structural design goes out through simulation result all is superior to the index of conventional design.As shown in the table:
The above is merely preferred embodiment of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (2)
1. a POWER VD MOSFET structure Design method is characterized in that, may further comprise the steps:
At first the cellular structure is chosen, adopted the cellular structure of regular hexagon article word arrangement;
Secondly gate electrode structure is optimized, with the metal at the grid pressure welding point place tripping solder joint place, cellular unit far away that extends, power tube is from extend three strip metal bars and contact with following polysilicon of pressure welding point;
Be the junction termination structures design at last, adopt the mode of field plate covering protection ring, realize through the length that increases the aluminium field plate.
2. POWER VD MOSFET structure Design method according to claim 1 is characterized in that: the source breakdown voltage of described POWER VD MOSFET is 600V, and on state current is 12A, and conducting resistance is less than 0.35 Ω.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110331187A CN102332396A (en) | 2011-10-27 | 2011-10-27 | Method for designing power vertical double-diffused metal-oxide-semiconductor field effect transistor (VDMOSFET) structure |
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| CN201110331187A CN102332396A (en) | 2011-10-27 | 2011-10-27 | Method for designing power vertical double-diffused metal-oxide-semiconductor field effect transistor (VDMOSFET) structure |
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| CN102332396A true CN102332396A (en) | 2012-01-25 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1291926A2 (en) * | 2001-09-07 | 2003-03-12 | Power Integrations, Inc. | High-voltage semiconductor devices |
| EP1321985A1 (en) * | 2001-12-20 | 2003-06-25 | STMicroelectronics S.r.l. | Metal Oxide Semiconductor Field Effect Transistor |
| CN101162733A (en) * | 2006-10-09 | 2008-04-16 | 上海华虹Nec电子有限公司 | Metal oxide semiconductor field-effect tranisistor and preparation method thereof |
| CN102104068A (en) * | 2009-12-18 | 2011-06-22 | 上海华虹Nec电子有限公司 | Structure of power MOS (Metal Oxide Semiconductor) transistor and preparation method thereof |
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2011
- 2011-10-27 CN CN201110331187A patent/CN102332396A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1291926A2 (en) * | 2001-09-07 | 2003-03-12 | Power Integrations, Inc. | High-voltage semiconductor devices |
| EP1321985A1 (en) * | 2001-12-20 | 2003-06-25 | STMicroelectronics S.r.l. | Metal Oxide Semiconductor Field Effect Transistor |
| CN101162733A (en) * | 2006-10-09 | 2008-04-16 | 上海华虹Nec电子有限公司 | Metal oxide semiconductor field-effect tranisistor and preparation method thereof |
| CN102104068A (en) * | 2009-12-18 | 2011-06-22 | 上海华虹Nec电子有限公司 | Structure of power MOS (Metal Oxide Semiconductor) transistor and preparation method thereof |
Non-Patent Citations (2)
| Title |
|---|
| 《山西电子技术》 20101231 耿凯鸽 "高压功率VDMOSFET的设计与研制" 第1页至第3页 1-2 , 第4期 * |
| 耿凯鸽: ""高压功率VDMOSFET的设计与研制"", 《山西电子技术》, no. 4, 31 December 2010 (2010-12-31), pages 1 - 3 * |
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Application publication date: 20120125 |