CN102509694A - Method for maintaining partial amorphous carbon layer - Google Patents

Method for maintaining partial amorphous carbon layer Download PDF

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Publication number
CN102509694A
CN102509694A CN2011103281605A CN201110328160A CN102509694A CN 102509694 A CN102509694 A CN 102509694A CN 2011103281605 A CN2011103281605 A CN 2011103281605A CN 201110328160 A CN201110328160 A CN 201110328160A CN 102509694 A CN102509694 A CN 102509694A
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China
Prior art keywords
amorphous carbon
carbon layer
layer
etching
hard mask
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CN2011103281605A
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CN102509694B (en
Inventor
景旭斌
杨斌
郭明升
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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Abstract

The invention relates to a manufacturing method for maintaining partial amorphous carbon layer. The method comprises the following steps of forming a polysilicon line on a substrate, depositing an amorphous carbon layer, an insulation anti-reflective coating and a silicon nitride hard mask layer on the polysilicon line in sequence; painting photoresist on the silicon nitride hard mask layer, forming a first window of amorphous carbon layer stripping area in a photoeching way; etching the silicon nitride hard mask layer in the first window, staying the etched silicon nitride hard mask layer on the insulation anti-reflective coating, and forming a second window in the nitride silicon hard mask layer; etching to remove the photoresist; and etching to remove the insulation anti-reflective layer and amorphous carbon layer in the second window. According to the method provided by the invention, high etching selection ratio of the silicon nitride hard mask layer and the amorphous carbon layer is adopted to maintain partial amorphous carbon layer, and the maintained amorphous carbon layer can be used in the subsequent working procedures.

Description

The method of reserve part amorphous carbon layer
Technical field
The present invention relates to semiconductor applications, particularly a kind of method of reserve part amorphous carbon layer.
Background technology
In the semi-conductive technology of routine, amorphous carbon layer generally uses in the less engineering of chemical wet etching window at present, after accomplishing graphical etching, can peel off, and can not be left to the use that follow-up engineering is done other purposes.For the isotropic etching that makes full use of amorphous carbon layer and the characteristic of anisotropic etching, need amorphous carbon layer kept after graphical etching engineering.The amorphous carbon layer that keeps can use in subsequent handling, such as the hollow structure of realizing nano-tube.
Summary of the invention
The method that the purpose of this invention is to provide a kind of reserve part amorphous carbon layer thinks that subsequent handling is used.
Technical solution of the present invention is a kind of manufacture method of reserve part amorphous carbon layer, may further comprise the steps:
On substrate, form polysilicon lines;
On polysilicon lines, deposit amorphous carbon layer, insulation ARC and silicon nitride hard mask layer successively;
On the silicon nitride hard mask layer, apply photoresist, photoetching forms first window of amorphous carbon layer stripping area;
Silicon nitride hard mask layer in etching first window rests on the insulation ARC, in the silicon nitride hard mask layer, forms second window;
Etching is removed photoresist;
Etching is removed insulation ARC and the amorphous carbon layer in second window.
As preferably: the said step that on substrate, forms silicon nanowires specifically comprises:
Adopt thermal oxidation process, on substrate, form silicon dioxide layer, deposit spathic silicon layer on silicon dioxide layer carries out light dope to said polysilicon layer;
Said polysilicon layer is adopted photoetching, etching technics, form polysilicon lines.
As preferably: said amorphous carbon layer is 4: 1 to the etching selection ratio of silicon nitride; Said amorphous carbon layer is 6: 1 to the etching selection ratio of polysilicon.
As preferably: said amorphous carbon layer is 10: 1 to the etching selection ratio of silicon dioxide.
As preferably: the thickness of said insulation ARC is the 200-600 dust.
Compared with prior art, the present invention adopts the high etching selection ratio of silicon nitride hard mask layer and amorphous carbon layer, the reserve part amorphous carbon layer, and the amorphous carbon layer of reservation can use in subsequent handling.
Description of drawings
Fig. 1 is the flow chart of the method for reserve part amorphous carbon layer of the present invention.
Fig. 2 a-2f is the profile of each processing step in the manufacturing process of method of reserve part amorphous carbon layer of the present invention.
Embodiment
The present invention below will combine accompanying drawing to do further to detail:
A lot of details have been set forth in the following description so that make much of the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention does not receive the restriction of following disclosed practical implementation.
Secondly, the present invention utilizes sketch map to be described in detail, when the embodiment of the invention is detailed; For ease of explanation; The profile of expression device architecture can be disobeyed general ratio and done local the amplification, and said sketch map is instance, and it should not limit the scope of the present invention's protection at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Fig. 1 shows the flow chart of the method for reserve part amorphous carbon layer of the present invention.
See also shown in Figure 1ly, in the present embodiment, the manufacture method of reserve part amorphous carbon layer may further comprise the steps:
In step 101, shown in Fig. 2 a, on substrate, form polysilicon lines; May further comprise the steps: adopt thermal oxidation process; On substrate 1, form silicon dioxide layer 2, deposit spathic silicon layer (not shown) carries out light dope to said polysilicon layer on silicon dioxide layer 2; Said polysilicon layer is adopted photoetching, etching technics, form polysilicon lines 3;
In step 102; Shown in Fig. 2 b; On polysilicon lines 3, deposit amorphous carbon layer 4, insulation ARC 5 and silicon nitride hard mask layer 6 successively; Said amorphous carbon layer 4 can adopt the APF film (Advanced Pattening Film) of Applied Materials, and the thickness of said insulation ARC 5 is the 200-600 dust;
In step 103, shown in Fig. 2 c, on silicon nitride hard mask layer 6, apply photoresist 7, photoetching forms first window 71 of amorphous carbon layer stripping area A;
In step 104, shown in Fig. 2 d, the silicon nitride hard mask layer 6 in etching first window 71 rests on the insulation ARC 5, in the silicon nitride hard mask layer, forms second window 51;
In step 105, shown in Fig. 2 e, etching is removed photoresist 7;
In step 106, shown in Fig. 2 f, etching is removed the insulation ARC 5 and amorphous carbon layer 4 in second window 51, and the etching selection ratio of 4 pairs of silicon nitride hard mask layers 6 of said amorphous carbon layer is 4: 1; The etching selection ratio of 4 pairs of polysilicons of said amorphous carbon layer is 6: 1; The etching selection ratio of 4 pairs of silicon dioxide layers 2 of said amorphous carbon layer is 10: 1; The present invention adopts the high etching selection ratio of silicon nitride hard mask layer 6 and amorphous carbon layer; The reserve part amorphous carbon layer, the amorphous carbon layer of reservation can use in subsequent handling.
The above is merely preferred embodiment of the present invention, and all equalizations of being done according to claim scope of the present invention change and modify, and all should belong to the covering scope of claim of the present invention.

Claims (5)

1. the manufacture method of a reserve part amorphous carbon layer is characterized in that, may further comprise the steps:
On substrate, form polysilicon lines;
On polysilicon lines, deposit amorphous carbon layer, insulation ARC and silicon nitride hard mask layer successively;
On the silicon nitride hard mask layer, apply photoresist, photoetching forms first window of amorphous carbon layer stripping area;
Silicon nitride hard mask layer in etching first window rests on the insulation ARC, in the silicon nitride hard mask layer, forms second window;
Etching is removed photoresist;
Etching is removed insulation ARC and the amorphous carbon layer in second window.
2. the manufacture method of reserve part amorphous carbon layer according to claim 1 is characterized in that: the said step that on substrate, forms silicon nanowires specifically comprises:
Adopt thermal oxidation process, on substrate, form silicon dioxide layer, deposit spathic silicon layer on silicon dioxide layer carries out light dope to said polysilicon layer;
Said polysilicon layer is adopted photoetching, etching technics, form polysilicon lines.
3. the manufacture method of reserve part amorphous carbon layer according to claim 1 is characterized in that: said amorphous carbon layer is 4: 1 to the etching selection ratio of silicon nitride; Said amorphous carbon layer is 6: 1 to the etching selection ratio of polysilicon.
4. the manufacture method of reserve part amorphous carbon layer according to claim 2 is characterized in that: said amorphous carbon layer is 10: 1 to the etching selection ratio of silicon dioxide.
5. the manufacture method of reserve part amorphous carbon layer according to claim 1 is characterized in that: the thickness of said insulation ARC is the 200-600 dust.
CN201110328160.5A 2011-10-25 2011-10-25 Method for maintaining partial amorphous carbon layer Active CN102509694B (en)

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CN102509694B CN102509694B (en) 2015-04-01

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105118772A (en) * 2015-10-14 2015-12-02 上海华力微电子有限公司 Production method of ion implantation barrier layer
CN110312679A (en) * 2017-02-24 2019-10-08 新加坡国立大学 Two-dimentional amorphous carbon coating and the method for making stem cell growth and differentiation

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1248059A (en) * 1998-09-17 2000-03-22 世大积体电路股份有限公司 Manufacture of flat intermetallic dielectric layer or inner dielectric layer
US6773998B1 (en) * 2003-05-20 2004-08-10 Advanced Micro Devices, Inc. Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning
CN1855390A (en) * 2005-03-24 2006-11-01 三星电子株式会社 Semiconductor device having a round-shaped nano-wire transistor channel and method of manufacturing same
CN1949473A (en) * 2005-10-12 2007-04-18 海力士半导体有限公司 Method for forming contact hole of semiconductor device
CN101174024A (en) * 2006-08-25 2008-05-07 视频有限公司 Micro devices having anti-stiction materials
CN102194676A (en) * 2010-03-11 2011-09-21 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device grid

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1248059A (en) * 1998-09-17 2000-03-22 世大积体电路股份有限公司 Manufacture of flat intermetallic dielectric layer or inner dielectric layer
US6773998B1 (en) * 2003-05-20 2004-08-10 Advanced Micro Devices, Inc. Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning
CN1855390A (en) * 2005-03-24 2006-11-01 三星电子株式会社 Semiconductor device having a round-shaped nano-wire transistor channel and method of manufacturing same
CN1949473A (en) * 2005-10-12 2007-04-18 海力士半导体有限公司 Method for forming contact hole of semiconductor device
CN101174024A (en) * 2006-08-25 2008-05-07 视频有限公司 Micro devices having anti-stiction materials
CN102194676A (en) * 2010-03-11 2011-09-21 中芯国际集成电路制造(上海)有限公司 Method for manufacturing semiconductor device grid

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105118772A (en) * 2015-10-14 2015-12-02 上海华力微电子有限公司 Production method of ion implantation barrier layer
CN105118772B (en) * 2015-10-14 2018-11-09 上海华力微电子有限公司 The production method on ion implanting barrier layer
CN110312679A (en) * 2017-02-24 2019-10-08 新加坡国立大学 Two-dimentional amorphous carbon coating and the method for making stem cell growth and differentiation

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