CN102521142A - Method for improving access efficiency of high-capacity and multiple-memory device - Google Patents
Method for improving access efficiency of high-capacity and multiple-memory device Download PDFInfo
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- CN102521142A CN102521142A CN2011104144130A CN201110414413A CN102521142A CN 102521142 A CN102521142 A CN 102521142A CN 2011104144130 A CN2011104144130 A CN 2011104144130A CN 201110414413 A CN201110414413 A CN 201110414413A CN 102521142 A CN102521142 A CN 102521142A
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Abstract
The invention provides a method for improving access efficiency of a high-capacity and multiple-memory device, wherein each memory in the high-capacity and multiple-memory device is equipped with an RAM (Random Access Memory). With the method for improving access efficiency of high-capacity and multiple-memory device provided by the invention, reading and writing of data which is accessed, read and written frequently are accomplished through the RAM equipped in the memory according to data classification, and the access efficiency of the high-capacity and multiple-memory device can be improved.
Description
Technical field
The invention belongs to the Memory Controller Hub design field, be specifically related to a kind of method that improves high capacity, many memory devices access efficiency.
Background technology
The visit of internal memory is based on the burst operation, and the intrinsic time expense of each burst visit is essential.Sometimes need on internal memory, store some explicitly known data, when these data of visit, also must initiate read request, wait for that read data returns, waste the stand-by period to internal memory.
Patent No. CN200710156683.X (method for synchronous of total distributed control system operator stations memory database structure storage) discloses a kind of method for synchronous of total distributed control system operator stations memory database structure storage.Operation configuration file storage is that data dictionary is set up memory database in operator station RAM Shared internal memory with operation configuration file in the built-in Flash internal memory of operator station, and database structure and data separate storage are being monitored on the monitoring software platform in real time.Adopting the multilevel-pointer storage organization, is a set of pointers of pointing to real data with internal storage data base relation element group representation; To the single characteristics of operator station data refresh mode, employing is read and write two pointers and is combined the synchronous of read-write signal amount technology realization memory database.Caused data integrity of data collision and consistency problem when the present invention efficiently solves operator station read-write task; The multilevel-pointer storage organization has the high-level efficiency of first level address visit, is applicable to the specific (special) requirements of operator station memory database mutilation long word section, and the industry spot data only need storage once in memory database.
Patent No. CN200610098872.1 (a kind of production test method of internal memory performance) discloses a kind of production test method of internal memory performance, and it may further comprise the steps: comprise following any one performance test methods at least: the stability that test memory reads after band CACHE large tracts of land writes; The stability of test memory when band CACHE random address large span jump writing.The method of testing that the inventive method adopted is compared with industry memory pressure test (RAM Stress Test) mode commonly used, can save the test duration, improves testing efficiency, and more is applicable to production test; And with production test in function test method commonly used compare, then can remedy its deficiency to internal memory performance (stability of internal memory particle) test aspect.
The present invention exists in the ram through the data that some temporary transient contents on the internal memory are fixing, when needing access memory, at first this ram is searched at every turn; Whether see with ram in the address identical; If mate successfully, then directly return the corresponding data in this address, need not to initiate the read operation request to internal memory again; Save internal memory read operation time overhead, improve internal storage access efficient.
In general high capacity, many memory devices, equipment whenever receives a read request visit, must at first resolve the read access address, which bar internal memory to initiate read access request according to the address analysis result to.
Summary of the invention
The present invention overcomes the deficiency of prior art, and the present invention is that every internal memory in high capacity, the many memory devices has been equipped with a ram.
The invention provides a kind of method that improves high capacity, many memory devices access efficiency, it is characterized in that, for every internal memory in high capacity, the many memory devices has been equipped with a ram.
The method of raising high capacity provided by the invention, many memory devices access efficiency is that dsc data or cold data are judged to writing content during write access, and afterwards cold data are placed among the ram, dsc data is write into corresponding memory address.
The method of raising high capacity provided by the invention, many memory devices access efficiency, dsc data are that value can often change, and constantly all might be replaced data updated.
The method of raising high capacity provided by the invention, many memory devices access efficiency, cold data are data of the rare variation of data content.
The method of raising high capacity provided by the invention, many memory devices access efficiency; When read access, judge that at first this time read the address whether in its corresponding ram address, if coupling; Then directly from ram, read this data content and return, needn't send out read request to this internal memory.
With prior art property ratio, beneficial effect of the present invention is: according to classification of Data, the data write that the visit read-write is frequent is accomplished through the ram that internal memory is equipped with, and can promote the access efficiency of high capacity, many memory devices.
Description of drawings
Fig. 1 is a memory device synoptic diagram of the present invention.
Embodiment
In the present invention, be equipped with a ram for every internal memory in high capacity, the many memory devices.Shown in accompanying drawing 1.Before write access, can judging this time, to write content be dsc data or cold data, and dsc data refers to that those values can often change, and constantly all might be replaced renewal.Cold data refer to the data of the rare variation of those data contents.Those cold data are placed among the ram, and dsc data is write into corresponding memory address.When next read access, judge that at first this time read the address whether in its corresponding ram address, if coupling is then directly read this data content and returned from ram, needn't send out read request to this internal memory.Save internal memory read operation time overhead like this, improved the efficient of internal storage access.
The present invention exists in the ram through the data that some temporary transient contents on the internal memory are fixing; When needing access memory at every turn; At first this ram is searched, whether see with ram in the address identical, if mate successfully; Then directly return the corresponding data in this address, need not to initiate the read operation request to internal memory again.Simultaneously, in general high capacity, many memory devices, equipment whenever receives a read request visit; Must at first resolve the read access address; Initiate read access request according to the address analysis result to any bar internal memory, therefore saved internal memory read operation time overhead, and improve internal storage access efficient.
Above embodiment is only in order to technical scheme of the present invention to be described but not to its restriction; Although the present invention has been carried out detailed explanation with reference to the foregoing description; The those of ordinary skill in said field is to be understood that: still can specific embodiments of the invention make amendment or replacement on an equal basis; And do not break away from any modification of spirit and scope of the invention or be equal to replacement, it all should be encompassed in the middle of the claim scope of the present invention.
Claims (5)
1. a method that improves high capacity, many memory devices access efficiency is characterized in that, for every internal memory in high capacity, the many memory devices has been equipped with a ram.
2. the method for claim 1 is characterized in that, is that dsc data or cold data are judged to writing content during write access, and afterwards cold data are placed among the ram, dsc data is write into corresponding memory address.
3. the method for claim 1-2 is characterized in that, dsc data is that value can often change, and constantly all might be replaced data updated.
4. the method for claim 1-3 is characterized in that, cold data are data of the rare variation of data content.
5. the method for claim 1-4 is characterized in that, when read access, judges that at first this time read the address whether in its corresponding ram address, if coupling is then directly read this data content and returned from ram, needn't send out read request to this internal memory.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201110414413.0A CN102521142B (en) | 2011-12-13 | 2011-12-13 | Method for improving access efficiency of high-capacity and multiple-memory device |
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| CN201110414413.0A CN102521142B (en) | 2011-12-13 | 2011-12-13 | Method for improving access efficiency of high-capacity and multiple-memory device |
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| CN102521142A true CN102521142A (en) | 2012-06-27 |
| CN102521142B CN102521142B (en) | 2015-05-13 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108062279A (en) * | 2016-11-07 | 2018-05-22 | 三星电子株式会社 | For handling the method and apparatus of data |
Citations (6)
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| US20080077754A1 (en) * | 2006-09-21 | 2008-03-27 | Sanyo Electric Co., Ltd. | Memory Access Apparatus |
| US7844772B2 (en) * | 2006-10-02 | 2010-11-30 | Samsung Electronics Co., Ltd. | Device driver including a flash memory file system and method thereof and a flash memory device and method thereof |
| CN101957726A (en) * | 2009-07-16 | 2011-01-26 | 恒忆有限责任公司 | Phase transition storage in the dual inline type memory module |
| US20110035543A1 (en) * | 2008-04-11 | 2011-02-10 | Lg Electronics Inc. | Memory drive that can be operated like optical disk drive and method for virtualizing memory drive as optical disk drive |
| CN102157192A (en) * | 2010-12-17 | 2011-08-17 | 曙光信息产业股份有限公司 | Method for compensating memory particle data delay of synchronous dynamic random access memory |
| CN102177551A (en) * | 2008-08-08 | 2011-09-07 | 惠普开发有限公司 | Independently controllable and reconfigurable virtual memory devices in memory modules that are pin-compatible with standard memory modules |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080077754A1 (en) * | 2006-09-21 | 2008-03-27 | Sanyo Electric Co., Ltd. | Memory Access Apparatus |
| US7844772B2 (en) * | 2006-10-02 | 2010-11-30 | Samsung Electronics Co., Ltd. | Device driver including a flash memory file system and method thereof and a flash memory device and method thereof |
| US20110035543A1 (en) * | 2008-04-11 | 2011-02-10 | Lg Electronics Inc. | Memory drive that can be operated like optical disk drive and method for virtualizing memory drive as optical disk drive |
| CN102177551A (en) * | 2008-08-08 | 2011-09-07 | 惠普开发有限公司 | Independently controllable and reconfigurable virtual memory devices in memory modules that are pin-compatible with standard memory modules |
| CN101957726A (en) * | 2009-07-16 | 2011-01-26 | 恒忆有限责任公司 | Phase transition storage in the dual inline type memory module |
| CN102157192A (en) * | 2010-12-17 | 2011-08-17 | 曙光信息产业股份有限公司 | Method for compensating memory particle data delay of synchronous dynamic random access memory |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108062279A (en) * | 2016-11-07 | 2018-05-22 | 三星电子株式会社 | For handling the method and apparatus of data |
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Effective date of registration: 20170126 Address after: 211106 Jiangning economic and Technological Development Zone, Jiangsu, general Avenue, No. 37, No. Patentee after: JIANGSU DAWN INFORMATION TECHNOLOGY CO., LTD. Address before: 100084 Beijing Haidian District City Mill Street No. 64 Patentee before: Dawning Information Industry (Beijing) Co., Ltd. |