CN102566459A - Digital NIM (Nuclear Instrument Module) data acquisition system - Google Patents
Digital NIM (Nuclear Instrument Module) data acquisition system Download PDFInfo
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- CN102566459A CN102566459A CN2011103969954A CN201110396995A CN102566459A CN 102566459 A CN102566459 A CN 102566459A CN 2011103969954 A CN2011103969954 A CN 2011103969954A CN 201110396995 A CN201110396995 A CN 201110396995A CN 102566459 A CN102566459 A CN 102566459A
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Abstract
The invention relates to a digital NIM (Nuclear Instrument Module) data acquisition system, which comprises a controller insert, an analog-digital signal converter (ADC) insert and a self-defined bus, wherein the self-defined bus is used for connecting the controller insert with the analog-digital signal converter (ADC) insert and is cased in an NIM case. Through test of physical experiments, the data transmission rate can reach up to 66 MB/s, the system resolution is 0.0735 percent; the maximum event rate of 400 KSPS can be obtained with 1/2 us; and the minimum dead time of an acquisition card is 2.0 us.
Description
Technical field
The invention belongs to data-acquisition system, directly apply to nuclear physics experiment or high-energy physics experiment.
Background technology
Lanzhou heavy ion accelerator cooling storage ring (HIRFL-CSR is called for short CSR) is the extension project of Lanzhou heavy ion accelerator HIRFL, belongs to the specific national scientific development project project.CSR be one integrate acceleration, accumulate, cool off, store, control the cancer terminal, multifunction experiment apparatus that the experiment of interior target, external target experiment and high-resolution are measured, be a two storage rings system, by CSRm (main ring) and CSRe (experimental ring) formation.The CAS Institute of Modern Physics relies on this big science device can carry out numerous high precision, highdensity nuclear physics experiment.
NIM (Nuclear Instrument Module, nuclear instrument plug-in unit) electronic system is the basic platform of nuclear technology field front-end electronics, and a large amount of nuclear physics experiments need the support of NIM electronic system.But traditional NIM electronic system does not have the digitizing standard; Do the support that data are obtained needs CAMAC (Computer Automatic Measurement and Contro1, computer automatic analysis and control) or VME (Versa Module Euro card) system.The data transmission rate of CAMAC data-acquisition system is the highest can only to arrive 3MB/s, and can reach 47.5MB/s based on the maximum data transfer rate of the data-acquisition system of VME system.But VME and CAMAC system cost are too high, can't carry out promotion and application at the other field that data are obtained.
Summary of the invention
In view of above-mentioned, the objective of the invention is to develop a kind of digitizing NIM data-acquisition system ((CCNS)).Utilize the good characteristic of NIM power supply,, realize the digitizing function of NIM system, thereby be that nuclear physics experiment and high-energy physics experiment provide a cover new types of data to obtain platform, improve data and obtain efficient in conjunction with modern computer and digital technology.
The present invention realizes through following technical scheme:
A kind of digitizing NIM data-acquisition system ((CCNS)) comprises controller card (1), analog and digital signal converter (ADC) plug-in unit (2), self-defined bus (3); Wherein: the front panel of controller card sub-controller, the rear panel of controller and controller are inner; Analog and digital signal converter (ADC) plug-in unit divides analog and digital signal converter (ADC) front panel, analog and digital signal converter (ADC) rear panel and analog and digital signal converter (ADC) inside; Self-defined bus is connected controller card with analog and digital signal converter (ADC) plug-in unit; Pack in the NIM cabinet (4);
The front panel of controller card is provided with programmed control pilot lamp, parallel port hard disk pilot lamp, serial ports hard disk pilot lamp, power light, trigger pip interface, RS232 serial interface, keyboard and mouse interface, three USB2.0 interfaces, 100,000,000 network interfaces, reset key, display interface device;
The rear panel of controller card (Back Panel) is provided with two plugs, is self-defined mutual bus plug and NIM attaching plug;
Be connected on the internal circuit board of controller card: the fpga chip of SM800 series embedded computer, ACEX1K50 series, single-ended transfer difference chip, parallel port hard disk, CF card, low pressure difference linearity power supply chip and the chip for driving of SN75976 series; Joint weld on the front panel of controller card is in a side of controller circuit board, and the socket on the rear panel of controller card is welded on the opposite side of controller circuit board;
The front panel (Front Panel) of analog and digital signal converter (ADC) plug-in unit is provided with 8 road analog input signal interfaces, 1 tunnel trigger pip interface and 1 reset key;
The rear panel (Back Panel) of analog and digital signal converter (ADC) plug-in unit is provided with two plugs, is self-defined mutual bus plug and NIM attaching plug;
Be connected to peak value stretcher plug-in unit, 16 amplifier chips, 8 ADC chips, 2 digital simulation converter chips, the fpga chip of 1 CYCLONEIII series, the application configuration chip of fpga chip, single-ended transfer difference chip, 3V-5V level conversion chip, Signal Matching plate interface, low pressure difference linearity power supply chip and the chip for driving of SN75976 series on the internal circuit board of analog and digital signal converter (ADC) plug-in unit.Joint weld on the front panel of analog and digital signal converter (ADC) module is in a side of analog and digital signal converter circuit board, and the socket on the rear panel of analog and digital signal converter (ADC) module is welded on the opposite side of analog and digital signal converter circuit board;
Self-defined bus connects controller card and analog and digital signal converter plug-in unit.
The beneficial effect of advantage of the present invention and generation:
The present invention has passed through the test of Physical Experiment, and the data transmission rate maximum can reach 66MB/s, and the normal runtime data transfer rate of system is 33MB/s, is 10 times of traditional C AMAC system data rate.Cost performance of the present invention is high, and system constructing is flexible.Advantage shows:
1. this invention has realized the novel complete data-acquisition system of a cover;
2. a kind of intelligentized controller and hyperchannel ADC module have been realized;
3. realized self-defined 64 core core bus standard and agreements, obtained the data transmission rate of 33MB/s based on the FPGA technology;
4.ADC plug-in unit index lab investigation index is following:
Systemic resolution: 0.0735%;
Maximum transfer speed: 33MB/s;
Maximum incident rate: 400KSPS;
Minimum dead time: the 2.0us of capture card
Minimum DNL:3LSB
Description of drawings
Fig. 1 inserts the synoptic diagram of NIM cabinet for this data-acquisition system;
Fig. 2 is controller card, ADC plug-in unit and the self-defined bus connected mode figure of this system;
Fig. 3 is the Co60 radioactive source gamma spectrums that experiment obtains under this system's support;
Waveform when Fig. 4 tests the self-defined bus transmission speed for oscillograph;
Fig. 5 is the waveform of oscillograph test peak value stretcher;
Embodiment
The used NIM chassis power supply of this invention has+-6V ,+-12V ,+-six kinds of power supply electrical levels of 24V.
The present invention has added embedded computer controller and 64 core core buss in originally having only the NIM system of physical construction standard and electrical code; And through the core bus agreement; Can make the collaborative work of more NIM plug-in unit; Realize the function that the middle and small scale data are obtained, to accomplish complicated Physical Experiment.
In the present invention, designed controller card 1 and analog and digital signal converter (ADC) plug-in unit 2, the detailed introduction of these two kinds of plug-in units is following:
Controller
The front panel of controller (Front Panel) has following interfaces from top to bottom: three programmed control pilot lamp, parallel port hard disk pilot lamp, serial ports hard disk pilot lamp, power light, trigger pip interface, RS232 serial interface, keyboard and mouse interface, three USB2.0 interfaces, 100,000,000 network interfaces, reset key, display interface device.Programmed control pilot lamp wherein connects by the inner programmable chip FPGA of controller, can realize user-defined function; The hard disk pilot lamp shows that whether current hard disk is at reading writing working; Whether power light indication power supply is normal, and whether controller energized; Trigger pip interface compatibility TTL standard and NIM standard signal, employing be the LEMO high-frequency socket, and the RS232 serial ports adopts the female connector of 9 pin D types; The keyboard and mouse interface is to be with two structures, and common PS2 socket needs an external patchcord, and a PS2 mouth is expanded to a PS2 keyboard mouth and a PS2 mouse mouth; Three USB2.0 interfaces are standard interface, can external portable hard drive, flash disk or equipment such as USB keyboard and mouse; 100,000,000 network interfaces are standard interface; But the firmware program of the programmable chip that the reset key reset controller is inner, inner embedded computer can reset simultaneously; Display interface device is the VGA15 needle socket, can connect the display of usefulness.
On the rear panel of controller card (Back Panel) two plugs are arranged, be self-defined mutual bus plug and NIM attaching plug.Wherein, self-defined mutual bus plug is double 64 pin plugs (every row's 32 pins), and the spacing between pin and pin is 2.0mm; Attaching plug is a standard N IM card power supply plug, in the design, has only used+6V and+two kinds of power supplys of 12V.
Components and parts are mainly formed in the inside of controller to be had: the fpga chip of SM800 series embedded computer, ACEX1K50 series, single-ended transfer difference chip, parallel port hard disk, CF card, low pressure difference linearity power supply chip and the part chip for driving of SN75976 series.Wherein SM800 series embedded computer is realized basic computer function; It is the supporting device at this controller man-machine interface interface; Be responsible for operation WINDOWS XP or LINUX operating system; The driving and the application program of the PCI plug-in card of FPGA simulation are provided, the software support of data-acquisition system and data storage etc.; The main effect in this controller of the fpga chip of ACEX1K50 series is bridging functionality and the partial data processing capacity between embedded computer pci bus and the self-defined core bus; These functions are all with VHDL language portion's realization within it, and these VHDL programs mainly comprise PCI slave unit interface, self-defined bus interface, two-port RAM, trigger pip processing, precisely sequential control, state machine and partial test program.The core of this controller is made up of the software and hardware program of embedded computer, fpga chip and these two kinds of part interior.It all is the support component of this core that other device such as conversion chip, hard disk, power supply grade.
Analog and digital signal converter (ADC)
Analog and digital signal converter (ADC) plug-in unit 2 also is the wide NIM plug-in unit of list of a standard, divides analog and digital signal converter (ADC) front panel, analog and digital signal converter (ADC) rear panel and analog and digital signal converter (ADC) inside; This plug-in unit has been realized the conversion from the simulating signal to the digital signal, and can will transform the controller that the digital signal transfers of accomplishing is talked about above giving through self-defined core bus, thereby realizes simple data acquisition functions.Simultaneously, the ADC module also can receive the order of self-controller through self-defined core bus, realizes corresponding action.
The front panel of ADC module (Front Panel) has with lower interface: 8 road analog input signal interfaces, 1 tunnel trigger pip interface and 1 reset key.8 road analog input signal interfaces wherein (from up to down being the 1 road to the 8 tunnel) are the LEMO high-frequency socket, receive the energy road signal from the output of detector front end electronics main amplifier; 1 tunnel trigger pip can be used as the trigger pip input of module in the debugging process, also can obtain the synchronizing signal that receives in the experiment from the output of trigger pip fan-out device in data; Reset key is realized the synchronous reset function of the related chip of this inside modules.
The rear panel of ADC module (Back Panel) profile and controller are identical, and self-defined mutual bus plug and NIM attaching plug are from up to down arranged.Wherein, self-defined mutual bus plug is double 64 pin plugs (every row's 32 pins), and the spacing between pin and pin is 2.0mm; Attaching plug is standard N IM card power supply plug, and is different with controller, this module only used in design+and 6V and-two kinds of power supplys of 6V.
Components and parts are mainly formed in the inside of ADC module to be had: 8 peak value stretcher plug-in units, 16 amplifier chips, 8 ADC chips, 2 digital simulation converter chips, the fpga chip of 1 CYCLONEIII series, the application configuration chip of fpga chip, single-ended transfer difference chip, 3V-5V level conversion chip, Signal Matching plate interface, low pressure difference linearity power supply chip and the part chip for driving of SN75976 series.Can realize that amplitude range is the pulse height broadening of 10ns at 50mV-5V, rising edge, and time broadening is controlled at 500ns-20us, minimum time is distinguished as 2.5ns.
16 amplifier chips provide differential input signal for 8 ADC chips of its back, and the later Analog signals'digital transformation of 8 ADC chips realization peak value broadenings sends data to fpga chip through public parallel bus then; 2 DAC chips provide upper threshold value and lower threshold value for the peak value stretcher of front end according to the control of program; Fpga chip is the control core of this module; The timing control signal of all chips in the module is provided; Coordinate the cooperation between each parts; Accomplish the conversion transmission of simulating signal to data-signal, fpga chip also is responsible for the storage and the processing of data, being uploaded to controller through self-defined core bus after the packing data of obtaining.All with VHDL language portion's realization within it, these VHDL programs mainly comprise work schedule control, look-at-me generation, state machine and the partial test program etc. of self-defined bus interface, two-port RAM, ADC and DAC to these functions of fpga chip.Single-ended transfer difference chip, 3V-5V level conversion chip, the Signal Matching plate interface of SN75976 series all is to design for the correct transmission that realizes signal.The low pressure difference linearity power supply chip is the power supply that whole module provides extremely low ripple, each parts operate as normal on the assurance module.
Self-defined bus
Be the information interaction between two kinds of plug-in units realizing design; The present invention designs the complete self-defined bus standard of a cover; Controller card 1 all will be supported basic write operation, read operation, Interrupt Process essential bus function with analog and digital signal converter plug-in unit 2; And to reach certain data rate, satisfy basic physical experiment demand.
Self-defined bus 3 is connected controller card 1 with analog and digital signal converter plug-in unit 2; Pack in the NIM cabinet 4.
Data are obtained experimental procedure
1. controller card is inserted the NIM cabinet, guarantee that the supply socket of plug-in unit and the power supply base of cabinet are connected firmly;
2. the external patchcord of the keyboard and mouse interface of controller front panel, switching is two PS2 mouths, connects PS2 keyboard and PS2 mouse respectively;
3. will connect the into trigger pip interface of controller front panel by the trigger pip that detector front end electronics partly provides with the LEM0 line;
4. the display interface device of controller front panel connects the VGA display;
5. 100,000,000 netting twines are received the network interface of controller front panel;
6. the self-defined bus interface of controller rear panel connects homemade 64 core flat cables; So far, the controller line finishes.
7. the ADC module is inserted the NIM cabinet, guarantee that the supply socket of plug-in unit and the power supply base of cabinet are connected firmly;
8. will connect into 8 road analog input interfaces of ADC module front panel by the energy road signal that detector front end electronics partly provides with the LEMO line;
9.ADC the self-defined bus interface of module rear plate connects self-control 64 core flat cables that communicate with controller;
So far, ADC module line finishes.
Accomplish after above 9 steps, open the power switch of NIM cabinet, controller and ADC module are started working.
10. after the controller energized, a process that starts the operating system is arranged, this process approximately needs 1-2 minute;
11. behind the os starting, operating system can be according to setting before, the PCI that searches for FPGA automatically drives monitoring control equipment;
12. open the Data Acquisition Program interface, working procedure, whole data acquisition begins thus.
The signal that is come out by detector forms trigger pip and energy signal through the processing of front-end electronics parts.Trigger pip offers the ADC module plug-in in the system through the processing and the fan-out of the controller card in the native system.Under the control of the control program of controller and trigger pip; The ADC module is carried out analog-to-digital conversion with the signal of input; And will transform later value and temporarily exist in the internal memory that ADC inside modules FPGA realizes; When reaching the quantity of 1KB-3KB Deng temporary data, the ADC module is sent interrupt request through core bus.Controller receives after the middle-end request of ADC module; Shake hands alternately through core bus transmission handshake and ADC module; Shake hands after the success, the ADC module sends data in internal memory to controller module through core bus with piece transmission manner (block transmission) with regard to beginning.Controller is temporarily stored in the data that receive earlier in the inner memory headroom of FPGA, is uploaded in the internal memory of controller embedded computer through pci bus then.Data in the embedded computer internal memory are drawn spectrogram under the control of Data Acquisition Program, perhaps carry out spectrogram through Network Transmission to host computer and show and the online data analysis.Meanwhile, all data are all deposited, so that experimental data is carried out later off-line analysis.
What Fig. 3 showed is a Co60 radioactive source gamma spectrums test experiments of under the support of this system, doing.As can be seen from the figure: this system can measure two peaks in the Co60 gamma spectrums accurately, through analyzing wherein the narrowest peak, uses its halfwidth just can obtain 0.0735% resolution divided by the maximal value at this peak; Explained that this digitizing NIM data-acquisition system function realizes, and can realize the basic physical experiment.
Waveform when Fig. 4 tests the self-defined bus transmission speed for oscillograph.Wherein the 1 road signal is the clock of self-defined bus, and the clock period is 60ns, and frequency is 16.5MHz.The 2 the tunnel is the waveform on the minimum data position AD00 on the self-defined bus.From figure, can find in two clock period; AD00 becomes low level perhaps becomes high level from low level waveform from high level; The minimum interval that the proof data bit changes is a clock period, and promptly the data on the data line also are operated under the clock signal frequency.Because data line is 16, therefore, data rate is 16.5 * 16 ÷ 8=33MB/s.
Fig. 5 is the waveform of oscillograph test peak value stretcher.From this waveform, can analyze, following waveform width is 200ns * 10=2us, and can draw the minimum dead time of capture card is 2.0us.Can draw maximum incident rate: 400KSPS with 1/2us.
Claims (1)
1. a digitizing NIM data-acquisition system comprises controller card (1), analog and digital signal converter plug-in unit (2), self-defined bus (3); Wherein: the front panel of controller card (1) sub-controller, the rear panel of controller and controller are inner; Analog and digital signal converter plug-in unit (2) divides analog and digital signal converter front panel, analog and digital signal converter rear panel and analog and digital signal converter inner: self-defined bus (3) is connected controller card (1) with analog and digital signal converter plug-in unit (2); Pack in the NIM cabinet (4);
The front panel of controller card is provided with programmed control pilot lamp, parallel port hard disk pilot lamp, serial ports hard disk pilot lamp, power light, trigger pip interface, RS232 serial interface, keyboard and mouse interface, three USB2.0 interfaces, 100,000,000 network interfaces, reset key, display interface device;
The rear panel of controller card is provided with two plugs, is self-defined mutual bus plug and NIM attaching plug;
Be connected on the internal circuit board of controller card: single-ended transfer difference chip, parallel port hard disk, CF card, low pressure difference linearity power supply chip and the chip for driving of embedded computer, fpga chip, SN75976 series; Joint weld on the front panel of controller card is in a side of controller circuit board, and the socket on the rear panel of controller card is welded on the opposite side of controller circuit board;
The front panel of analog and digital signal converter plug-in unit is provided with 8 road analog input signal interfaces, 1 tunnel trigger pip interface and 1 reset key;
The rear panel of analog and digital signal converter plug-in unit is provided with two plugs, is self-defined mutual bus plug and NIM attaching plug;
Be connected to peak value stretcher plug-in unit, 16 amplifier chips, 8 ADC chips, 2 digital simulation converter chips, 1 fpga chip, the application configuration chip of fpga chip, single-ended transfer difference chip, 3V-5V level conversion chip, Signal Matching plate interface, low pressure difference linearity power supply chip and the chip for driving of SN75976 series on the internal circuit board of analog and digital signal converter plug-in unit; Joint weld on the front panel of analog and digital signal converter plug-in unit is in a side of analog and digital signal converter circuit board, and the socket on the rear panel of analog and digital signal converter plug-in unit is welded on the opposite side of analog and digital signal converter circuit board;
Self-defined bus (3) connects controller card (1) and analog and digital signal converter plug-in unit (2).
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011103969954A CN102566459A (en) | 2011-12-02 | 2011-12-02 | Digital NIM (Nuclear Instrument Module) data acquisition system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011103969954A CN102566459A (en) | 2011-12-02 | 2011-12-02 | Digital NIM (Nuclear Instrument Module) data acquisition system |
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| CN2011103969954A Pending CN102566459A (en) | 2011-12-02 | 2011-12-02 | Digital NIM (Nuclear Instrument Module) data acquisition system |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5866907A (en) * | 1993-10-12 | 1999-02-02 | Biotraces, Inc. | Ultralow background multiple photon detector |
| CN1529249A (en) * | 2003-10-17 | 2004-09-15 | 清华大学 | USB-based multi-parameter data obtaining system |
-
2011
- 2011-12-02 CN CN2011103969954A patent/CN102566459A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5866907A (en) * | 1993-10-12 | 1999-02-02 | Biotraces, Inc. | Ultralow background multiple photon detector |
| CN1529249A (en) * | 2003-10-17 | 2004-09-15 | 清华大学 | USB-based multi-parameter data obtaining system |
Non-Patent Citations (3)
| Title |
|---|
| 南钢洋等: "基于NIM系统的多道脉冲幅度采集卡设计", 《核电子学与探测技术》 * |
| 南钢洋等: "核物理实验中模数转换器选型及其供电方案", 《强激光与粒子束》 * |
| 张建川等: "在核实验仪器中的嵌入式微机选型", 《核电子学与探测技术》 * |
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Application publication date: 20120711 |