CN102569359A - Partial SOI (Silicon On Insulator) transverse double-diffused device - Google Patents
Partial SOI (Silicon On Insulator) transverse double-diffused device Download PDFInfo
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- CN102569359A CN102569359A CN2012100473167A CN201210047316A CN102569359A CN 102569359 A CN102569359 A CN 102569359A CN 2012100473167 A CN2012100473167 A CN 2012100473167A CN 201210047316 A CN201210047316 A CN 201210047316A CN 102569359 A CN102569359 A CN 102569359A
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Abstract
The invention relates to SOI technology. The invention provides a partial SOI (Silicon On Insulator) transverse double-diffused device, which solves the problem of obvious self-heating effect in the traditional SOI device. The technical scheme can be summarized as follows: in the partial SOI transverse double-diffused device, one end of a buried oxide layer is positioned below a source and contacts with the edge of the device; the horizontal distance between the other end of the buried oxide layer and a type II impurity ohmic contact region of a drain is not less than zero; and between the other end of the buried oxide layer and the device edge below the drain, a type I impurity substrate and a type II impurity top silicon layer are in contact with each other to form a PN junction. The partial SOI transverse double-diffused device provided by the invention has the following advantages that the thermal generated by the SOI device can be effectively transmitted because the buried oxide layer is open below the drain and is suitable for SOI devices.
Description
The application is that application number is 201010579250.7, and the applying date is on December 8th, 2010, and name is called the dividing an application of patent application of the horizontal double-diffused device of partial SOI.
Technical field
The present invention relates to the SOI technology, particularly the horizontal double-diffused device of SOI.
Background technology
SOI (Silicon on Insulator) technology is described as " the silicon integrated circuit technology of 21 century ", is one of mainstream technology of integrated circuit of new generation, has been widely used in integrated low-voltage high performance chips such as ultrahigh speed processor at present; Thin film SOI is the full dielectric isolation device that adopts LOCOS technology, and thin film SOI adopts LOCOS technology to isolate, and does not have the preparation of trap; Selective oxidation just can realize the formation of silicon island, has reduced the area of isolated area to a great extent, but conventional SOI device vertically withstand voltage determine by drift region and oxygen buried layer; Its serious self-heating effect has limited its development, and people such as Park have proposed the form of partial SOI device architecture, because the existence of silicon window; The drift region links to each other with substrate, and depletion layer is expanded to substrate, and it is withstand voltage to have born part after substrate is exhausted; Increased the vertical withstand voltage length of device, and along with the reduction of substrate concentration, vertically withstand voltage further increase; The SOI device electric breakdown strength is by smaller's decision of vertical and horizontal voltage, and conventional SOI device is in order to improve its puncture voltage, and Withstand voltage layer all exhausts; Mixing in the drift region must be lower, and vertically withstand voltage by drift region under the drain terminal face and the decision of oxygen buried layer thickness, the drift region thickness of conventional partial SOI device from source electrode to drain electrode is all identical; And surface field is not optimised, though the partial SOI device has been broken vertically withstand voltage restriction of conventional SOI, its surface field must satisfy the RESURF principle; Distribution shape low between the senior middle school of two ends can appear in surface field; Make the second type impurity device drift region fully optimize, and the limitations restrict of RESURF own to electric field modulation in its drift region, make the second type impurity device drift region Electric Field Distribution not improve; As shown in Figure 1; Conventional SOI device comprises source electrode, drain electrode, the first type impurity substrate 1, oxygen buried layer 2 and the second type impurity top silicon layer 3, and the said second type impurity top silicon layer 3 comprises first type impurity back of the body gate contact zone 7, the source electrode second type impurity ohmic contact regions 6, the second type impurity device drift region 5 and the second type impurity ohmic contact regions 4 that drains, and the said first type impurity substrate 1 is arranged on the horizontal plane; Oxygen buried layer 2 is arranged on the first type impurity substrate 1; The second type impurity device drift region 5 is arranged on the oxygen buried layer 2, and oxygen buried layer 2 carries out the electrical equipment isolation with the first type impurity substrate 1 and the second type impurity top silicon layer 3, and first type impurity back of the body gate contact zone 8 and the source electrode second type impurity ohmic contact regions 7 are mutually arranged side by side; Be arranged on the position of the second type impurity device drift region, 5 upper surfaces near source electrode; The said drain electrode second type impurity ohmic contact regions 4 is arranged on the position of the second type impurity device drift region, 5 upper surfaces near drain electrode, and wherein the first type impurity is p type impurity or n type impurity, and the second type impurity is n type impurity or p type impurity.
Summary of the invention
The objective of the invention is to overcome present conventional SOI device self-heating effect significant disadvantages, provide a kind of partial SOI horizontal double-diffused device.
The present invention solves its technical problem; The technical scheme that adopts is; The horizontal double-diffused device of partial SOI comprises source electrode, drain electrode, the first type impurity substrate, oxygen buried layer and the second type impurity top silicon layer, and the said second type impurity top silicon layer comprises drain electrode second type impurity ohmic contact regions and the source electrode second type impurity ohmic contact regions; The said first type impurity substrate is arranged on horizontal plane; It is characterized in that said oxygen buried layer one end is positioned at the source electrode below and contacts with device edge, the other end is not less than zero with the horizontal range of the drain electrode second type impurity ohmic contact regions; The other end of oxygen buried layer is between the device edge of drain electrode below, and the first type impurity substrate contacts with the second type impurity top silicon layer and forms PN junction.
Concrete, said oxygen buried layer be pantostrat or pass through between be divided into the n section, the spacing between per two adjacent sections has the PN junction of the first type impurity substrate and second type impurity top silicon layer formation greater than zero in the said spacing.
Further; Said spacing increases to the end near drain electrode from an end of the source electrode of oxygen buried layer successively; Said section reduces to the end near drain electrode from an end of oxygen buried layer source electrode successively, and the length of first section that begins from oxygen buried layer source electrode one end is greater than the horizontal range of the source electrode second type impurity ohmic contact regions to source electrode.
Concrete; Comprise that also the second type impurity floats dead level; The floating dead level of the said second type impurity is horizontally set in the first type impurity substrate, and the one of which end is positioned at the drain electrode below and contacts with device edge, and the horizontal range of the other end and the source electrode second type impurity ohmic contact regions is not less than zero.
Further again; Comprise that also the second type impurity floats dead level; The floating dead level of the said second type impurity is horizontally set in the first type impurity substrate; The one of which end is positioned at the drain electrode below and contacts with device edge; The horizontal range of the other end and the source electrode second type impurity ohmic contact regions is not less than zero, and said spacing all has the floating dead level of the second type impurity on the floor projection of the floating dead level face of the second type impurity, the length of first section that the other end of the floating dead level of the said second type impurity begins less than an end below the oxygen buried layer source electrode to the horizontal range between the device edge of source electrode below.
Concrete, the concentration of the floating dead level of the said second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the first type impurity substrate upper surface is that 3 μ m are to 15 μ m.
Further again, the said first type impurity is p type impurity or n type impurity, and the second type impurity is n type impurity or p type impurity.
The invention has the beneficial effects as follows that through the horizontal double-diffused device of above-mentioned partial SOI, its oxygen buried layer is in the drain electrode lower opening; Can effectively transmit the heat that the SOI device is produced, the drain electrode below is the first type impurity substrate and the formed PN junction of the second type impurity top silicon layer simultaneously, wherein; The first type impurity substrate doping content is lower, can depletion layer be extended to substrate, and owing to increased the floating dead level of the second type impurity; It has shared the oxygen buried layer electric field, makes that electric field reduces significantly in the oxygen buried layer, can use thin oxygen buried layer to satisfy high tension apparatus; Further reduced the self-heating effect of SOI device, simultaneously, the floating dead level of the second type impurity can be modulated for electric field in the drift region; Strengthen drift region zone line electric field, compare conventional SOI device, it can obtain bigger puncture voltage.
Description of drawings
Fig. 1 is conventional SOI device cutaway view;
Fig. 2 is the cutaway view that the horizontal double-diffused device oxygen buried layer of partial SOI of present embodiment is a consecutive hours;
Cutaway view when Fig. 3 is divided into the n section from an end of source electrode for the horizontal double-diffused device oxygen buried layer of partial SOI of present embodiment to the end near drain electrode;
Equipotential lines distribution map when Fig. 4 is conventional SOI device breakdown;
Fig. 5 is the horizontal double-diffused device of the partial SOI of present embodiment equipotential lines distribution map when puncturing;
Fig. 6 is the horizontal double-diffused device of the partial SOI of conventional SOI device and present embodiment lateral surfaces field distribution characteristic curve when puncturing;
Fig. 7 is the horizontal double-diffused device of the partial SOI of conventional SOI device and present embodiment longitudinal electric field distribution character curve when puncturing;
Fig. 8 is the horizontal double-diffused device of the partial SOI of conventional SOI device and present embodiment characteristic curve when puncturing;
Wherein, 1 is the first type impurity substrate, and 2 is oxygen buried layer; 3 is the second type impurity top silicon layer, and 4 are the drain electrode second type impurity ohmic contact regions, and 5 is the second type impurity device drift region; 6 is the source electrode second type impurity ohmic contact regions; 7 is first type impurity back of the body gate contact zone, and 8 is the floating dead level of the second type impurity, and 21 is first section that begins from oxygen buried layer source electrode one end.
Embodiment
Below in conjunction with accompanying drawing and embodiment, describe technical scheme of the present invention in detail.
The horizontal double-diffused device of partial SOI of the present invention; Its oxygen buried layer 2 does not carry out electrical isolation with the first type impurity substrate 1 and the second type impurity top silicon layer 3 fully; One end of oxygen buried layer 2 is positioned at the source electrode below and contacts with device edge; The other end is not less than zero with the horizontal range of the drain electrode second type impurity ohmic contact regions 4, and the other end of oxygen buried layer 2 is between the device edge of drain electrode below, and the first type impurity substrate 1 contacts with the second type impurity top silicon layer 3 and forms PN junction; Because its oxygen buried layer 2 can effectively transmit the heat that the SOI device is produced in the drain electrode lower opening.
Embodiment
The oxygen buried layer 2 of the horizontal double-diffused device of partial SOI that this is routine can be pantostrat or be interrupted be divided into the n section; Its oxygen buried layer is cutaway view such as Fig. 2 of consecutive hours; Cutaway view such as Fig. 3 when oxygen buried layer is divided into the n section from an end of source electrode to the end near drain electrode; Equipotential lines distribution map such as Fig. 4 during routine SOI device breakdown; Equipotential lines distribution map such as Fig. 5 when the horizontal double-diffused device of the partial SOI of present embodiment punctures; Lateral surfaces field distribution characteristic curve such as Fig. 6 when the horizontal double-diffused device of partial SOI of conventional SOI device and present embodiment punctures, longitudinal electric field distribution character curve such as Fig. 7 when the horizontal double-diffused device of the partial SOI of conventional SOI device and present embodiment punctures, characteristic curve such as Fig. 8 when the horizontal double-diffused device of the partial SOI of conventional SOI device and present embodiment punctures.
The oxygen buried layer 2 of the horizontal double-diffused device of this partial SOI does not carry out electrical isolation with the first type impurity substrate 1 and the second type impurity top silicon layer 3 fully; One end of oxygen buried layer 2 is positioned at the source electrode below and contacts with device edge; The other end is not less than zero with the horizontal range of the drain electrode second type impurity ohmic contact regions 4; The other end of oxygen buried layer 2 is between the device edge of drain electrode below; The first type impurity substrate 1 contacts with the second type impurity top silicon layer 3 and forms PN junction, and it can be pantostrat that its oxygen buried layer 2 passes through, and also can be divided into the n section between its end to end; Spacing between per two adjacent sections is greater than zero; Have the first type impurity substrate 1 in the spacing and contact the PN junction that forms with the second type impurity top silicon layer 3, its spacing increases from the end to end of oxygen buried layer 2 successively, and said section reduces from oxygen buried layer 2 end to end successively; The length of first section 21 that one end begins from oxygen buried layer 2 source electrodes below is greater than the horizontal range of the source electrode second type impurity ohmic contact regions 6 to source electrode; An end that in the first type impurity substrate 1, also has been horizontally disposed with the floating dead level 8 of floating dead level 11, the second impurity of the second type impurity is positioned at the drain electrode below and contacts with device edge, and the horizontal range of the other end and the source electrode second type impurity ohmic contact regions 6 is not less than zero; When oxygen buried layer 2 for be interrupted be divided into the n section time; The length of first section 21 that its spacing begins less than one end from oxygen buried layer 2 source electrodes below to the horizontal range between the device edge of source electrode below at the other end that all has the floating dead level 8 of floating dead level 8, the second type impurity of the second type impurity on the floor projection of 8 of the floating dead levels of the second type impurity, the concentration that the second type impurity floats dead level 8 is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of floating dead level 8 to first type impurity substrate 1 upper surface of the second type impurity is that 3 μ m are to 15 μ m; When the first type impurity is p type impurity; The second type impurity is n type impurity, and when the first type impurity was n type impurity, the second type impurity was p type impurity.
Equipotential lines distribution map such as Fig. 4 during routine SOI device breakdown; Its adjacent equipotential lines voltage difference is 10V; As can be seen from Figure 4 the oxygen buried layer 2 of SOI device has been born the vertically withstand voltage of SOI device; Electric field in its second type impurity device drift region 5 is sparse, and this SOI device fails to reach making full use of of the second type impurity device drift region 5; Equipotential lines distribution map such as Fig. 5 when the horizontal double-diffused device of the partial SOI of present embodiment punctures; Its adjacent equipotential lines voltage difference is 10V; As can beappreciated from fig. 5 equipotential lines no longer receives oxygen buried layer 2 restrictions; It can " pass " oxygen buried layer 2, and it is vertically withstand voltage to make the first type impurity substrate 1 bear device, has broken its withstand voltage restriction that receives oxygen buried layer 2 thickness of conventional SOI device; The floating dead level 8 of the second type impurity is modulated for the electric field in the second type impurity device drift region 5 simultaneously; Impel the electric field in the second type impurity device drift region 5 to distribute again, make that the horizontal double-diffused device transverse electric field distribution of this partial SOI is more even, the horizontal double-diffused device of this partial SOI has bigger puncture voltage; Lateral surfaces field distribution characteristic curve such as Fig. 6 when the horizontal double-diffused device of partial SOI of conventional SOI device and present embodiment punctures; Wherein, The X axle is represented the horizontal direction distance, and the Y axle is represented electric field, from Fig. 6, can find out the horizontal double-diffused device of partial SOI that present embodiment provides because surface field has received the modulation of the floating dead level 8 of the second type impurity to it; Its distribution is obviously more even, than conventional SOI technology integrated LDMOS device shown huge advantage; Longitudinal electric field distribution character curve such as Fig. 7 when the horizontal double-diffused device of partial SOI of conventional SOI device and present embodiment punctures; Wherein, The X axle is represented the vertical direction distance, and the Y axle is represented electric field, and the horizontal double-diffused device of partial SOI that as can beappreciated from fig. 7 present embodiment provided is reduced to 2.5E5V/cm with oxygen buried layer 2 electric fields from the 8.5E5V/cm of conventional SOI device; Simultaneously depletion width has had and has increased substantially; So reach identical puncture voltage demand, the horizontal double-diffused device of the partial SOI that present embodiment provided can just can reach requirement with thin oxygen buried layer 2 thickness, adds its oxygen buried layer 2 of the horizontal double-diffused device of partial SOI that present embodiment provides in the drain electrode perforate; The heat that can in 1 this device work of transmission of the first type impurity substrate, be produced is so it has littler self-heating effect; Characteristic curve such as Fig. 8 when the horizontal double-diffused device of partial SOI of conventional SOI device and present embodiment punctures; Wherein, The X axle is represented drain voltage, and the Y axle is represented drain current, from Fig. 8, can find out because the second type impurity floats the modulating action of dead level 8 for transverse electric field and longitudinal electric field the second type impurity device drift region 5; Make the horizontal double-diffused device of partial SOI of present embodiment obtain the 445V puncture voltage, and conventional SOI device electric breakdown strength only have 315V.
Claims (5)
1. the horizontal double-diffused device of partial SOI; Comprise source electrode, drain electrode, the first type impurity substrate, oxygen buried layer and the second type impurity top silicon layer; The said second type impurity top silicon layer comprises drain electrode second type impurity ohmic contact regions and the source electrode second type impurity ohmic contact regions; The said first type impurity substrate is arranged on horizontal plane, it is characterized in that, said oxygen buried layer one end is positioned at the source electrode below and contacts with device edge; The other end is not less than zero with the horizontal range of the drain electrode second type impurity ohmic contact regions; The other end of oxygen buried layer is between the device edge of drain electrode below, and the first type impurity substrate contacts with the second type impurity top silicon layer and forms PN junction, is divided into the n section between said oxygen buried layer passes through; Spacing between per two adjacent sections has the first type impurity substrate and contacts the formation PN junction with the second type impurity top silicon layer greater than zero in the said spacing.
2. according to the horizontal double-diffused device of the said partial SOI of claim 1; It is characterized in that; Said spacing increases from the end to end of oxygen buried layer successively; The said section end to end from oxygen buried layer reduces successively, and the length of first section that one end begins from oxygen buried layer source electrode below adds the length of the second type impurity ohmic contact regions to the horizontal range of source electrode greater than the source electrode second type impurity ohmic contact regions.
3. according to claim 1 or the horizontal double-diffused device of 2 said partial SOIs; It is characterized in that; Comprise that also the second type impurity floats dead level; The floating dead level of the said second type impurity is horizontally set in the first type impurity substrate, and the one of which end is positioned at the drain electrode below and contacts with device edge, and the horizontal range of the other end and the source electrode second type impurity ohmic contact regions is not less than zero; Said spacing all has the floating dead level of the second type impurity on the floor projection of the floating dead level face of the second type impurity, the length of first section that the other end of the floating dead level of the said second type impurity begins less than an end below the oxygen buried layer source electrode to the horizontal range between the device edge of source electrode below.
4. according to claim 1 or the horizontal double-diffused device of 2 said partial SOIs, it is characterized in that the concentration of the floating dead level of the said second type impurity is 1e16cm
-3To 2e17cm
-3, its thickness be 1 μ m to 5 μ m, the vertical range of itself and the first type impurity substrate upper surface is that 3 μ m are to 15 μ m.
5. according to claim 1 or the horizontal double-diffused device of 2 said partial SOIs, it is characterized in that the said first type impurity is p type impurity or n type impurity, the second type impurity is n type impurity or p type impurity.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103515428A (en) * | 2013-09-09 | 2014-01-15 | 电子科技大学 | PSOI transverse high-voltage power semiconductor device |
| CN109817714A (en) * | 2017-11-21 | 2019-05-28 | 格芯公司 | Lateral double diffusion metal oxide semiconductor (LDMOS) device |
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| CN103545346B (en) * | 2012-07-09 | 2016-11-16 | 上海华虹宏力半导体制造有限公司 | Isolated form N-type LDMOS device and manufacture method thereof |
| CN103426913B (en) * | 2013-08-09 | 2016-08-31 | 电子科技大学 | A kind of partial SOI ultra-junction high-voltage power semiconductor device |
| JP6591312B2 (en) * | 2016-02-25 | 2019-10-16 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| CN108447904B (en) * | 2018-03-14 | 2020-09-29 | 电子科技大学 | Manufacturing method of transverse IGBT |
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| US6281054B1 (en) * | 1998-12-30 | 2001-08-28 | Hyundai Electronics Industries Co., Ltd. | SOI device and method for fabricating the same |
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| CN109817714B (en) * | 2017-11-21 | 2022-05-17 | 格芯美国公司 | Lateral double diffused metal oxide semiconductor (LDMOS) device |
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| CN102082169B (en) | 2012-07-25 |
| CN102569359B (en) | 2015-07-29 |
| CN102082169A (en) | 2011-06-01 |
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