CN102576701B - Ic封装件及其制造方法 - Google Patents
Ic封装件及其制造方法 Download PDFInfo
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- CN102576701B CN102576701B CN200980161204.0A CN200980161204A CN102576701B CN 102576701 B CN102576701 B CN 102576701B CN 200980161204 A CN200980161204 A CN 200980161204A CN 102576701 B CN102576701 B CN 102576701B
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- metal lead
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- 238000000034 method Methods 0.000 title claims abstract description 70
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 87
- 229910052751 metal Inorganic materials 0.000 claims abstract description 87
- 238000005530 etching Methods 0.000 claims abstract description 48
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims abstract description 38
- 239000000203 mixture Substances 0.000 claims abstract description 15
- 239000000463 material Substances 0.000 claims description 27
- 238000001465 metallisation Methods 0.000 claims description 22
- 229910000679 solder Inorganic materials 0.000 claims description 12
- 239000003795 chemical substances by application Substances 0.000 claims description 6
- 239000007800 oxidant agent Substances 0.000 claims 5
- 230000001590 oxidative effect Effects 0.000 claims 5
- 238000000059 patterning Methods 0.000 claims 2
- 239000011248 coating agent Substances 0.000 description 16
- 238000000576 coating method Methods 0.000 description 16
- 238000003466 welding Methods 0.000 description 12
- 150000001875 compounds Chemical class 0.000 description 9
- 238000005476 soldering Methods 0.000 description 7
- 239000010949 copper Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 238000007639 printing Methods 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000011469 building brick Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000011900 installation process Methods 0.000 description 2
- 239000000615 nonconductor Substances 0.000 description 2
- 239000011253 protective coating Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000000889 atomisation Methods 0.000 description 1
- 230000000740 bleeding effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H01L23/495—Lead-frames or other flat leads
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Abstract
提供了一种IC封装件。该IC封装件包括引线框架,该引线框架包括在第一侧上部分蚀刻的金属带(222)。可配置该引线框架用于在其上安装IC芯片以及用于将多个接合区域(218)电耦合到引线框架和IC芯片。IC芯片、接合区域和金属引线框架的一部分用封装混合物所覆盖,并且从引线框架的底部表面突出多个接触垫(206)。在制造过程期间,引线框架的底部表面可被蚀刻一次或多次以减小底切的深度。还提供了一种用于制造IC封装件的方法。
Description
有关申请的交叉引用
本专利申请要求序号为61/239,421,2009年9月2日提交的美国临时专利申请的优先权,其通过引用结合于此。
技术领域
本专利申请一般地涉及集成电路(IC)封装技术,并且特别地但不作为限制,涉及用于图案化IC封装引线框架的系统和方法。
背景技术
IC封装是IC器件制造中所涉及的最后阶段之一。在IC封装期间,一个或多个IC芯片被安装在封装基板上,与电接触点相连接,并且接着用包括电绝缘体的封装材料涂覆,该电绝缘体例如是环氧树脂或硅模制混合物。得到的IC封装件可接着被安装到印刷电路板(PCB)上和/或连接到其它电子组件。
时常地,无引线的IC封装件可包括电接触点而非外部引线,其中电接触点在顶部上被封装材料所覆盖并且在IC封装件的底部上被暴露,因此电接触点可以被连接到位于IC封装件之下的电子组件。时常地,使用金属引线框架形成部分IC封装件可以比使用层压板或条带材料更有成本效率,因为例如,可使用更有成本效率的材料,例如铜、镍或其它金属或合金,并且使用这样的材料可允许采用更有成本效率的制造过程,例如冲压或蚀刻,而非多步骤层压过程。
在过去,无引线IC封装件已经受限制,因为可被利用来在IC芯片的I/O端口来回传递电信号的端子的最大数量被限制为可位于管芯连接垫(Die-Attach
Pad, DAP)的周边周围的端子数量。已进行了增加可用于与IC芯片的I/O端口电连接的端子数量的尝试,包括减少端子之间的距离以便在DAP的周边周围安装更多的端子,以及增加布置在DAP的周边周围的端子行的数量。然而,增加端子行的数量要求减少IC芯片的尺寸或增加IC封装件的尺寸。此外,端子之间能被减小的距离量被限制为在PCB上的连接点之间的最小距离,其是相对大的。
发明内容
考虑本申请公开的各种实施例。
本发明的以上概要不意在表示本发明的每个实施例或每个方面。
附图说明
当结合附图一起理解时,可通过参照随后的详细说明书得到本发明的各种实施例的更全面的理解,其中:
图1说明了用于IC封装件制造过程中的引线框架带的实施例;
图2A-E说明了在制造过程的各阶段的无引线IC封装件的实施例的多个方面;
图3A-B是金属引线框架的实施例的两个视图,金属引线框架具有形成在其顶部表面上的多个金属迹线;
图4A-B是引线框架的实施例的两个顶视图,引线框架具有在其外围周围的两行接合区域;
图5说明了在制造过程的各阶段的图4A的引线框架的实施例的细节A和B;
图6A和6B说明了在两个制造过程的各阶段的IC封装件的实施例的各方面的侧视图;
图7A-B说明了在用于图案化接触垫的制造过程的各阶段的IC封装件的实施例的各方面的侧视图;
图8A-B说明了在用于图案化接触垫的制造过程的各阶段的IC封装件的实施例的各方面的侧视图;
图9是用于制造IC封装件的过程的实施例的流程图;以及
图10是用于制造IC封装件的过程的各种实施例流程图。
具体实施方式
现在将参照附图更全面地描述本发明的各种实施例。然而,本发明可以体现在许多不同形式,并且不应当被解释为限定于在此阐述的实施例;而是,提供实施例使得本公开将详尽和完整,并会将本发明的范围全面地传达给本领域技术人员。
现在参照图1,示出了例如可用于IC封装件制造过程的类型的金属带100。金属带100包括置于其上的多个器件区域101。在一些实施例中,金属带100可以是铜或其它金属或合金,并且可具有5mil、大于5mil或小于5mil的厚度。在各种实施例中,器件区域101可在尺寸上变化,并且在金属带100上的器件区域101的数量也可以变化。例如,在一些实施例中,在金属带100上的器件区域101的数量可以是从小于100到大于1000的任何数量。在IC制造过程期间,一个或多个IC芯片可被附着到每个器件区域101并且被封装在封装混合物之内。在各种实施例中,IC芯片可通过线焊被电耦合到器件区域101或以倒装芯片结构直接耦合到那里。IC制造过程也可包括使器件区域101彼此之间单个化(singulating)以形成多个IC封装件,该多个IC封装件可被配置为安装到外部器件,例如PCB。当IC封装件安装到PCB上时,IC芯片可通过置于IC封装件底部表面上的接触区域被电耦合到PCB。
现在参照图2A-2E,示出了在制造过程的各阶段的IC封装件的实施例的多个方面。出于描述目的,相对于单个IC封装件来描述制造过程,但在各种实施例中,制造过程的步骤可被应用到引线框架带的多个器件区域的一些或全部,例如图1中示出的金属带100。现在参照图2A,过程开始于未蚀刻的引线框架200,例如金属带的器件区域。在图2B中,引线框架200已经被部分地蚀刻以形成在其顶部表面限定了金属迹线222的凹进处226。在示出的实施例中,金属镀覆已经被添加到置于金属迹线222顶部表面上的接合区域218。接合区域218的金属镀覆可通过将可接合的或可焊接的材料施加到金属迹线222来形成,该材料可例如是电镀金属或包层金属,例如银(Ag)、金(Au)、锡(Sn)、铜(Cu)或其它可接合材料。在一些实施例中,金属迹线222的底部表面的部分可用可焊接材料来涂覆,例如金属镀覆。如在以下将更详细描述的,在本实施例中已经电镀了将稍后成为接触垫206的底部表面的区域。在图2C中,IC芯片204已经使用例如环氧树脂的粘合材料被固定到引线框架200的顶部表面,例如通过线焊214电耦合到接合区域218,并且已经施加封装混合物208(示为阴影区域)来封装IC芯片204和线焊214。此外,封装混合物208还已经被填充到凹进处226中,包括置于IC芯片204下面的凹进处226。
在图2D中,引线框架200的底部表面已经被蚀刻掉。在示出的实施例中,引线框架200已经跨过其整个底部表面而被蚀刻以移除其部分200a。在各种实施例中,整个底部表面的子集可被蚀刻掉。如在作为对比图2C的图2D中可见的,引线框架的厚度已经被减小。如将在以下更详细描述的,跨过从其整个底部表面而减小引线框架200的厚度,如果有的话,在稍后的部分蚀刻或图案化蚀刻期间将需要蚀刻掉更少的材料,这可以减少底切,由此改善了电连接性,并在一些实施例中,可允许形成更薄的接触垫。例如,在一些实施例中,引线框架200可具有大约4mil的厚度,并且厚度可以被减小大约1mil或更多。
现在参照图2E,引线框架200的底部表面已经被部分蚀刻以在其中形成图案。在各种实施例中,置于引线框架200的底部表面上的接触垫206可以用金属镀覆电镀。在各种实施例中,底部表面的蚀刻可包括与形成在引线框架200的顶部表面中的凹进处226相对应的引线框架200的蚀刻部分226a,以在那些区域处完全蚀刻穿过引线框架200,并且在一些位置处,暴露封装混合物208的底部表面。在各种实施例中,除了在凹进处226以下的金属迹线222之间的引线框架200的部分226a的区域之外,该蚀刻可包括移除一些金属迹线222的区域222a。在一些实施例中,保护涂层229可被添加到金属迹线222的底部表面的一部分。
现在参照图3A,示出了在引线框架300上安装IC芯片之前的引线框架300的顶视图。在示出的实施例中,引线框架300具有蚀刻到其顶部表面中的多个凹进处326(示为非阴影部分),其中凹进处326在引线框架300的顶部表面上形成多个金属迹线322(示为阴影部分)。金属迹线322可被形成具有任何尺寸的任何宽度,例如,在一些实施例中,金属迹线322的宽度可以是大约1.5mil,并且它们可以互相间隔开大约4mil。尽管示出的实施例具有特定图案,但任何数量的图案可以被蚀刻到引线框架300中。用于线焊到IC芯片的接合区域318可包括在引线框架300外围周围的金属迹线322的部分并且可包括在其上的金属镀覆(未示出)。出于描述的目的,置于引线框架300的底部表面上用于将IC芯片电耦合到PCB上对应的接触点的接触垫306的位置,已经被示为置于金属迹线322的与接合区域318的相对端的非阴影正方形。凹进处326之间的引线框架300的一些非蚀刻部分可被用于对安装在其上的IC芯片提供支撑,和/或提供电子路径以在引线框架300的顶部表面上的接合区域318和引线框架300的底部表面上的接触垫306之间路由信号。虽然示出的所有接触垫306相对于接合区域318被内部布置,但接触垫306的一些或全部可直接置于接合区域318之下,或可从接合区域318向外朝着引线框架300的外围来布置。
图3B是来自图3A的细节A的引线框架300的部分的放大横截面的侧视图。从这个视图,可看见被形成到引线框架300的顶部表面中的凹进处326,以及被置于其之间的金属迹线322和接合区域318。虽然示出的凹进处326具有特定深度和宽度,但在各种实施例中,凹进处326可以取决于设计标准而具有任何深度和任何宽度。在各种实施例中,当通过在引线框架300的顶部表面中部分地蚀刻图案来形成接合区域318和金属迹线322时,可能在移除了金属迹线322的侧面的部分322a的地方发生底切,由此使在上表面之下的金属迹线322的部分比上表面要窄。
现在参照图4A,示出了具有蚀刻到引线框架的顶部表面中的图案的引线框架400的实施例的顶视图。出于描述目的,示出了安装在其上的IC芯片404的轮廓。在该实施例中,已经通过蚀刻掉引线框架400的顶部表面的部分来形成凹进处426,以限定接合区域416和418以及金属迹线422。在示出的实施例中,管芯连接区域(DA区域)是在IC芯片404将被安装的区域下面的引线框架的部分,并且可包括管芯连接垫和金属迹线422的部分两者。
仍参照图4A,出于描述目的,在蚀刻步骤期间可被置于引线框架400的底部表面上的接触区域的区域轮廓被示为具有虚线的圆。如可见的,引线框架400的顶部表面已经被部分地蚀刻使得两行接合区域416和418已经被形成。在示出的实施例中,接合区域418内行的尺寸和形状与接合区域416外行的尺寸和形状不同。在示出的实施例中,没有金属迹线耦合到接合区域416的外行,因为如可见的,接合区域416被直接置于接触垫上。在这个方向上,接合区域416的中心线必须被间隔开与接触垫的中心线之间的距离相同的距离。然而,在内行中,接合区域418已经被更靠近地间隔,因为一些接触垫没有被直接置于对应的接合区域418下面。
现在参照图4B,示出了图4A的引线框架400的替代实施例。在这个实施例中,接合区域416的外行已经形成为实质上小于被示为直接置于其下面的接触垫406。
现在参照图5,示出了在制造过程的各阶段对应于图4A的细节A和细节B的横截面侧视图。在步骤s501,抗蚀刻材料被有选择地施加到金属引线框架500的顶部表面,并且凹进处526已经被部分地蚀刻到引线框架500的顶部表面中以在其中形成图案。在一些实施例中,抗蚀刻涂层可被有选择地施加到引线框架500的顶部和底部表面两者,如相对于接合区域516所示的。在一些实施例中,抗蚀刻涂层可以是金属镀覆,或可在凹进处526已经被形成后施加金属镀覆。在步骤s503,引线框架500的顶部表面已经用封装混合物508覆盖。在各种实施例中,线焊(未示出)可以在施加封装混合物508之前被接合到接合区域516和518。在步骤s505,引线框架500的底部表面已经被部分地蚀刻以移除其特定部分,以限定在其中具有侧壁506a的接触垫506。如可见的,限定接触区域506的蚀刻引线框架500的底部表面导致了其侧壁506a的部分被蚀刻掉或底切。
仍参照图5,对应细节A的侧视图示出了接触垫506被直接置于接合区域516之下,两者具有实质上相同的直径。时常地,PCB安装的要求规定了接触区域506的最小直径以及它们必须被间隔开的距离(间距)。因此,将接触区域506直接置于相应的接合区域516之下要求接合区域516满足那些相同的PCB的限制。相反,对应细节B的侧视图示出了被置于接合区域518a之下的两个外部接触垫506,而对应于接合区域518b的接触垫(未示出)与其远距离地布置并通过金属迹线522与其耦合。通过远距离地布置对应于接合区域518b的接触垫,接合区域518a和518b可具有比细节A中所示的接合区域516更小的宽度并更靠近地间隔,而且仍满足针对对应的接触垫506的PCB间隔要求。例如,在一些实施例中,接合区域518a和518b可具有大约2.5mil的宽度并可被间隔开大约4mil,而接触垫506可具有大约6mil的直径并被间隔开大约4mil或更多。
现在参照图6A和6B,示出了在两个不同IC封装件的制造过程的各阶段的IC封装件的侧视图。现在参照图6A,在步骤s601,示出了引线框架600的侧视图,具有在其上限定了多个接合区域的在其顶部表面中的多个凹进处,并具有对其添加的封装层。在步骤s603,涂层660已经被有选择地施加到引线框架600的底部表面,涂层例如是金属镀覆、抗蚀刻涂层或其它材料。在步骤s605,引线框架600的底部表面已经被部分地蚀刻以在其中形成凹进处,与在其上不具有有选择地涂层660的部分相对应。在示出的实施例中,凹进处限定了具有侧壁606a的多个接触垫,其中部分蚀刻引起在侧壁606a中的蚀刻底切。在各种实施例中,引线框架600越厚,底切将越深地延伸到接触垫的侧壁606a中。
现在参照图6B,在步骤s601’,示出了引线框架600的侧视图,具有在其上限定了多个接合区域的在其顶部表面中的多个凹进处,并具有对其添加的封装层。在示出的实施例中,引线框架600的底部部分600a已经被移除,由此将引线框架600的厚度从第一量减小到第二量。在各种实施例中,可通过机械或化学蚀刻或研磨过程来移除底部部分600a。在步骤s603’,涂层660已经被有选择地施加到引线框架600的底部表面,涂层例如是金属镀覆、抗蚀刻涂层或其它材料。在步骤s605’,引线框架600的底部表面已经被部分地蚀刻以移除没有被选择性涂层660所覆盖的引线框架600的部分,由此在引线框架600中形成凹进处。在示出的实施例中,凹进处限定了具有侧壁606a’的多个接触垫,其中部分蚀刻引起在侧壁606a’中的蚀刻底切。如可见的,由于从引线框架600的底部表面移除了该部分600a,侧壁606a’的底切量相对于图6A中示出的底切已经被减少。
现在参照图7A,示出了在制造过程的各阶段的金属引线框架700的横截面侧视图。在步骤s703,金属涂层760已经被有选择地施加到金属引线框架700的底部表面。在步骤s705,金属引线框架700的底部表面已经被部分地蚀刻以限定接触垫706,每个接触垫706具有在其的底部表面中形成的图案。在示出的实施例中,每个接触垫706具有在其中形成的凹痕763,凹痕763一般是抛物线形状的凹面。
现在参照图7B,更详细地描述图7A的接触垫706之一。在步骤s707,示出了接触区域706的透视图和侧视图,具有与其相对布置的焊接剂(出于描述目的示为焊球)。在各种实施例中,可使用焊料丝网印刷方法、浸焊、焊膏、焊球或其它焊接精加工过程来施加焊接剂765。如可见的,在接触垫706的底部表面中的凹痕763可适于为与焊接剂765接合而提供增加的表面面积。在各种实施例中,焊接剂765可以是焊球、焊丝、焊膏或其它附着材料。在步骤s709,焊接剂765已经被接合到接触垫706的凹痕763的表面。在一些实施例中,焊接剂765可在安装到PCB之前或在安装过程期间被施加到接触垫706。
现在参照图8A,示出了在制造过程的各阶段的金属引线框架800的横截面侧视图。在步骤s803,金属涂层860已经被有选择地施加到金属引线框架800的底部表面。在步骤s805,金属引线框架800的底部表面已经被有选择地蚀刻以限定接触垫806,每个接触垫806具有在其的底部表面中形成的图案。在示出的实施例中,每个接触垫806具有在其中形成的多个凹痕863。
现在参照图8B,更详细地描述图8A的接触垫806之一。在步骤s807,示出了接触垫806的透视图,具有与其相对布置的焊接剂865。如在此实施例中可见的,接触垫806的底部包括围绕凹坑形凹痕863a的环形通道凹痕863b。在步骤s809,焊接剂865已经被熔化来与接触垫806的凹痕863相符合。在各种实施例中,具有多个凹痕863在接触垫806和焊接剂865之间提供了增加的表面面积。
现在参照图9,示出了IC封装件制造过程900的实施例的流程图。该过程在步骤902以未蚀刻的引线框架开始,例如铜的金属带。在步骤904,引线框架在顶部表面上被部分地蚀刻以在其中创建在其上限定了金属迹线的凹进处。该部分蚀刻可由任何数量的蚀刻过程来执行,例如,用诸如光可成像环氧树脂的光可成像抗蚀刻剂的层来涂覆或层压引线框架的顶部表面。例如,可将光阻材料旋转涂覆到引线框架上,接着使用光工具将其曝光于紫外线,其中在显影过程中接着移除曝光的部分。抗蚀刻剂由此被图案化以在引线框架的顶部表面上提供凹进处。接着例如通过浸没或加压喷雾来蚀刻引线框架,以部分地图案化金属迹线。在一些实施例中,蚀刻可以是半蚀刻,使得在引线框架中形成的凹进处延伸穿过引线框架一半。例如,在4mil的引线框架中,半蚀刻将是2mil蚀刻。在各种实施例中,引线框架可被蚀刻多于或少于穿过引线框架的一半。例如,在一些实施例中,部分蚀刻可以达到大约3mil+/-0.5mil的深度。在蚀刻后,抗蚀刻剂可以被剥去。
在步骤906,部分蚀刻的引线框架可例如通过电镀在其顶部表面上的接合区域而被有选择地电镀。接合区域的金属镀覆可通过施加可接合材料到金属迹线来形成。在各种实施例中,表面粘着增强处理(“AE处理”),例如用于增加粘着力的粗糙化和/或清洁表面,可在金属镀覆之后。
在步骤908,使用粘合材料来将IC芯片安装到引线框架,粘合材料例如是环氧树脂。在IC芯片被安装到引线框架之后,IC芯片可例如通过线焊被电耦合到置于管芯连接区域外侧的接合区域。在各种实施例中,可利用倒装芯片结构,并且可不要求线焊。此后,在步骤910,施加模制混合物来封装IC芯片和线焊。在步骤912,蚀刻引线框架的底部表面。在一些实施例中,在步骤912不进行蚀刻。在一些实施例中,引线框架跨过其整个底部表面被蚀刻,由此减少引线框架的厚度。通过跨过其整个底部表面减少引线框架的厚度,在稍后的部分或图案化蚀刻期间需要蚀刻掉较少的材料(如果有的话),由此减少底切。在各种实施例中,在步骤912可仅例如以预定图案反蚀刻子集,而非整个底部表面。
在各种实施例中,过程900可在步骤912之后结束。在一些实施例中,过程900进行到步骤914。在一些实施例中,在过程900进行到步骤914之前,施加完整的金属镀覆到引线框架900的底部表面。在步骤914,有选择地用材料来涂覆引线框架的底部表面。在一些实施例中,涂覆材料可以是印刷在引线框架底部表面上的焊接掩膜。在曝光和显影焊接掩膜之后,过程900可结束。在一些实施例中,涂覆材料可以是施加到引线框架底部表面的抗蚀刻剂,例如蓝墨水印刷,以转移要用蚀刻剂来蚀刻的图案的图像,蚀刻剂例如是FeCL3。在一些实施例中,涂覆材料为金属镀覆,例如,NiPdAu镀覆,在步骤912之后被施加到引线框架的底部表面。在一些实施例中,过程900可在金属镀覆之后结束,可进行到上述的焊接掩膜印刷步骤,或可进行到上述的抗蚀刻剂步骤。
在一些实施例中,在已经用材料来涂覆引线框架的底部表面之后,过程900进行到步骤916。在步骤916,引线框架的底部表面被部分地蚀刻以在其中形成图案。在已经有选择地施加金属镀覆到引线框架的底部表面的实施例中,可以不需要抗蚀刻剂,可以不需要在金属镀覆上施加抗蚀刻剂,或可以在金属镀覆上施加抗蚀刻剂。在部分蚀刻之后,可执行“去渗色(de bleed)”步骤以移除蓝墨水突出物,如果有的话。在一些实施例中,如果施加的话,蓝墨水可被留在金属镀覆上或可被添加到金属镀覆以使金属镀覆免受稍后的处理步骤影响。在各种实施例中,底部表面的反蚀刻可包括蚀刻对应于形成在引线框架的顶部表面中的凹进处的引线框架的部分,以由此在那些区域完全蚀刻穿过引线框架,并由此暴露封装混合物的底部表面。在各种实施例中,反蚀刻可包括将除了在金属迹线间的引线框架区域之外的金属迹线的一些区域移除。在各种实施例中,反蚀刻可被重复多次,如可能是对于特定设计标准的需要。
在一些实施例中,可添加保护涂层到引线框架的底部表面的一部分。例如,在一些实施例中,在步骤918,可印刷焊接掩膜到金属迹线的底部表面的部分上以覆盖其暴露的部分。此后,过程900可包括在步骤920的化学去毛刺(de
flashing)以移除在接触区域上的任何抗焊剂,而在暴露的金属迹线上留下抗焊剂。抗焊剂可接着被固化,例如通过UV固化,因此抗焊剂将抵抗焊料和化学物。在步骤922,如果有的话,剩余蓝墨水可接着被剥离以暴露接触表面的区域,用于进一步表面安装处理,如果有的话。
现在参照图10,示出了图9的IC封装件制造过程900的可替换实施例的流程图。与图9的过程相似,示出的实施例的IC制造过程1000在步骤1002以未蚀刻的引线框架开始,之后是在步骤1004的部分蚀刻。在步骤1006,部分蚀刻的引线框架可有选择地在其顶部和底部表面两者上被电镀。接着,在步骤1008,IC芯片被安装到引线框架并与其电耦合。此后,在步骤1010施加模制混合物来封装IC芯片和线焊。在步骤1012,引线框架的底部表面被部分地蚀刻。在各种实施例中,在步骤1014,喷水或其它研磨过程可被应用到引线框架的底部表面。
在各种实施例中,过程1000可在步骤1014之后结束。在一些实施例中,过程1000进行到步骤1016并且在其上印刷焊接掩膜,然而在其它实施例中,过程1000可进行到1016’并且可施加抗焊剂。从步骤1016,与图9中的上述步骤相似,过程1000的各种实施例可包括化学去毛刺(de flash)(步骤1018)、UV固化(步骤1020)和/或蓝墨水剥离(步骤1022)。从步骤1016’,与图9中的上述步骤相似,过程1000的各种实施例可包括焊接掩膜印刷(步骤1018’)、曝光(步骤1020’)和/或显影(步骤1022’)。
尽管本发明的方法和系统的各种实施例已经结合附图被说明,并且在前述的详细说明书中被描述,将理解的是,本发明不被限制于公开的实施例,而是在不背离在此阐述的本发明的精神的情况下,能够有许多重新布置、修改和替换。
Claims (19)
1.一种形成IC封装件的方法,该方法包括:
提供具有第一值的厚度的金属引线框架;
图案化金属引线框架的顶部表面以在其中形成凹进处,该顶部表面凹进处限定了多个接合区域;
有选择地电镀顶部表面;
安装IC芯片到顶部表面上;
将IC芯片电耦合到多个接合区域;
在封装混合物中封装IC芯片;
通过从金属引线框架的整个底部表面移除一层金属来将金属引线框架的总厚度从第一值减小到第二值;
将焊接掩膜印刷在所述引线框架的所述底部表面上以便曝光和显影;
有选择地电镀金属引线框架的底部表面以在其上形成图案,该图案限定了金属引线框架要被蚀刻的部分;
有选择地蚀刻金属引线框架的该部分以在其底部表面中形成凹进处,该底部表面凹进处相对于引线框架的底部表面限定了具有侧壁的多个接触垫,该引线框架的底部表面在其中具有蚀刻底切;
其中通过将金属引线框架的厚度减小到第二量,来减小该底切的深度,以及
其中有选择地蚀刻形成了在多个接触垫的底部表面中的多个凹痕。
2.权利要求1的方法,其中有选择地蚀刻形成了至少一个环形通道,该至少一个环形通道环绕多个凹痕中的至少一个凹痕。
3.权利要求1的方法,以及进一步包括:
施加导电可焊接材料到多个凹痕。
4.权利要求1的方法,其中金属引线框架的厚度的第一值小于5mil。
5.权利要求1的方法,其中第一值和第二值之间的差大于1mil。
6.一种图案化集成电路(IC)封装件的底部表面的方法,该集成电路封装件的类型为具有安装到金属引线框架并电耦合到置于金属引线框架顶部表面上的接合区域的IC芯片,该IC芯片被封装在封装混合物中,该方法包括:
通过从金属引线框架的整个底部表面移除一层金属以暴露其表面来减小金属引线框架的厚度;
施加抗蚀刻剂材料到金属引线框架的暴露表面以在其上形成图案,该图案限定了金属引线框架要被蚀刻的部分;
有选择地蚀刻由该图案限定的金属引线框架的该部分以电隔离多个接触垫,并在多个接触垫的底部表面中形成多个凹痕,该多个接触垫具有侧壁,该侧壁在其中具有蚀刻底切;以及
其中通过从金属引线框架的整个底部表面实质上移除该层金属,来减小侧壁中的蚀刻底切的深度。
7.一种集成电路(IC)封装件,包括:
金属引线框架,具有在其顶部表面和底部表面上的凹进处的图案,在顶部表面上的凹进处限定了多个接合区域,以及在其底部表面上的凹进处限定了电耦合到接合区域的多个接触垫,每个接触垫具有蚀刻到其底部表面中的凹痕,其中在施加抗蚀刻剂层到金属引线框架之前,在金属引线框架的整个底部表面上移除一层金属引线框架,将焊接掩膜印刷在所述引线框架的所述底部表面上以便曝光和显影;
IC芯片,安装到金属引线框架并电耦合到接合区域,该IC芯片被封装在封装混合物中;以及
导电可焊接材料,填充每个接触垫的凹痕。
8.权利要求7的IC封装件,其中多个接触垫中的至少一个接触垫具有蚀刻到其底部表面中并且环绕凹痕的环形通道。
9.权利要求7的IC封装件,其中至少一个接合区域的表面面积小于与其电耦合的接触垫的表面面积。
10.权利要求7的IC封装件,其中蚀刻到至少一个接触垫中的凹痕抛物线形状的凹面。
11.一种图案化集成电路(IC)封装件的底部表面的方法,该集成电路封装件的类型为具有安装到金属引线框架并电耦合到置于金属引线框架顶部表面上的接合区域的IC芯片,该IC芯片被封装在封装混合物中,该方法包括:
施加焊接掩膜到IC封装件的金属引线框架的底部表面以在其上形成图案,该图案限定了金属引线框架要被蚀刻的部分;
有选择地蚀刻由该图案限定的金属引线框架的该部分以电隔离多个接触垫并在多个接触垫的底部表面中形成多个凹痕;
施加导电可焊接材料到多个接触垫的底部表面;以及
在施加抗蚀刻剂层到金属引线框架之前,在金属引线框架的整个底部表面上移除一层金属引线框架。
12.权利要求11的方法,其中施加抗蚀刻剂层包括施加金属镀覆。
13.权利要求11的方法,其中施加抗蚀刻剂层包括施加抗蚀刻剂层到金属引线框架的顶部表面和底部表面两者。
14.权利要求11的方法,其中施加抗蚀刻剂包括形成具有外部周边和内部周边的至少一个抗蚀刻剂环。
15.权利要求14的方法,其中有选择地蚀刻形成了由该环的外部周边所限定的多个接触垫的接触垫外边缘,以及形成由该环的内部周边所限制的凹痕。
16.权利要求14的方法,其中该外部周边和内部周边为圆周。
17.权利要求11的方法,其中施加抗蚀刻剂包括形成抗蚀刻剂的内环和与至少一个内环同心的抗蚀刻剂的外环。
18.权利要求17的方法,其中有选择地蚀刻形成了由该外环的外部周边所限定的多个接触垫的接触垫外边缘、由该内环的内部周边所限定的凹痕、以及由该内环和外环之间的区域所限定的环形通道。
19.权利要求11的方法,以及进一步包括:
从IC封装件带中单个化该IC封装件。
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2009
- 2009-11-26 US US13/389,935 patent/US9362138B2/en active Active
- 2009-11-26 KR KR1020127008136A patent/KR101668141B1/ko active IP Right Grant
- 2009-11-26 CN CN200980161204.0A patent/CN102576701B/zh not_active Expired - Fee Related
- 2009-11-26 WO PCT/CN2009/001320 patent/WO2011026261A1/en active Application Filing
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US20120181680A1 (en) | 2012-07-19 |
KR101668141B1 (ko) | 2016-10-20 |
US9362138B2 (en) | 2016-06-07 |
KR20120085761A (ko) | 2012-08-01 |
TWI431699B (zh) | 2014-03-21 |
TW201126618A (en) | 2011-08-01 |
WO2011026261A1 (en) | 2011-03-10 |
CN102576701A (zh) | 2012-07-11 |
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