CN102751190A - Channel type power metal oxide semi-conductor structure with fast switching capacity and manufacture method - Google Patents
Channel type power metal oxide semi-conductor structure with fast switching capacity and manufacture method Download PDFInfo
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- CN102751190A CN102751190A CN2011101040676A CN201110104067A CN102751190A CN 102751190 A CN102751190 A CN 102751190A CN 2011101040676 A CN2011101040676 A CN 2011101040676A CN 201110104067 A CN201110104067 A CN 201110104067A CN 102751190 A CN102751190 A CN 102751190A
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Abstract
Provided are a channel type power metal oxide semi-conductor structure with fast switching capacity and a manufacture method. The method includes the following steps: first, forming an epitaxial layer of a first electric conducting type on a substrate, and then, forming a plurality of gate structures in the epitaxial layer; forming a shallow doping area with the first electric conducting type on the surface of the epitaxial layer, and then forming a shielding structure on the shallow doping area; forming a plurality of well areas with a second electric conducting type in the epitaxial layer by using the shielding structure, and then forming a source doping area with the first electric conducting type on the surface of the well areas; doping concentration of the shallow doping area is smaller than that of the source doping area and the well areas, and the doping concentration of the shallow doping area is larger than that of the epitaxial layer. The channel type power metal oxide semi-conductor structure with the fast switching capacity and the manufacture method can effectively reduce forward voltage drop (VSD) of a source drain diode and obtain channel type power semi-conductors with the fast switching capacity and low switching power loss.
Description
Technical field
The present invention relates to a kind of groove-type power metal-oxide-semiconductor's structure and manufacturing approach thereof, relate in particular to the power mos structure and the manufacturing approach of the quick switching capability of a kind of tool.
Background technology
In the application of groove-type power metal-oxide-semiconductor (MOS), the performance of switch speed more and more is much accounted of, and the improvement of this characteristic can obviously improve the power loss when switching in the high-frequency circuit operation.Fig. 1 is the profile of traditional n channel gate groove type power metal oxygen half field effect transistor (MOSFET) structure.This structure by n type drain region 110, P type body 120, n type source region 130, the metal level 140 that is linked to source electrode, grid oxic horizon 150 to be constituted with grid polycrystalline structure 160.
When metal-oxide half field effect transistor (MOSFET) is become when opening circuit by conducting, can produce a reverse current, remove the minority carrier that exceeds the quata in the body diode (body diode) of metal-oxide half field effect transistor.Because traditional groove power semiconductor structure, its source are leaked diode forward pressure drop (V
SD) can be limited in 0.75 volts; Can't significantly reduce; Thereby need the long time remove the face of connecing to have more the minority carrier that exceeds the quata; Also therefore cause the limited ability of power MOSFET transistor (MOSFET) backward recovery (Reverse Recovery), and then influence the switch speed of power MOSFET transistor (MOSFET), the power loss when causing switching increases.
Therefore, seeking one has and has low source and leak diode forward pressure drop (V
SD) the groove power semiconductor structure, can not have influence on the breakdown voltage (BVDSS) and the reliability of metal-oxide half field effect transistor (MOSFET) element again, to overcome the many disadvantages of known technology, be the important problem in present technique field.
Summary of the invention
The technical problem that the present invention will solve is, to the deficiency of prior art, a kind of manufacturing approach of aqueduct type power semiconductor structure is provided, and diode forward pressure drop (V is leaked in the reduction source effectively
SD), can not have influence on the voltage endurance and the breakdown voltage (BVDSS) of grid oxic horizon again, and then obtain having the aqueduct type power semiconductor of quick switching capability and low power switched loss.
For solving the problems of the technologies described above, the present invention provides the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool, comprising: a substrate is provided earlier, and the epitaxial loayer that formation has one first conductivity type is on this substrate; Subsequently, form a plurality of grid structures in this epitaxial loayer; Next, form have this first conductivity type a shallow-layer doped region in the surface of this epitaxial loayer, and form a masking structure on this shallow-layer doped region; Then, a plurality of well regions that utilize this masking structure to form to have one second conductivity type in this epitaxial loayer, and form have this first conductivity type the one source pole doped region in the surface of well region.Wherein, the doping content of this shallow-layer doped region is less than the doping content of this source doping region and the doping content of this well region, and the doping content of this shallow-layer doped region is greater than the doping content of this epitaxial loayer.
The present invention also provides the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool, comprising: the epitaxial loayer of one first conductivity type, and a plurality of grid structures are positioned at this epitaxial loayer; The well region of a plurality of second conductivity types is positioned at this epitaxial loayer, and has a distance between this adjacent well region; The shallow-layer doped region of one first conductivity type, between this adjacent well region, a masking structure is on the shallow-layer doped region of this first conductivity type; And the source doping region of one first conductivity type is positioned at the surface of this well region; Wherein, between the shallow-layer doped region and this source doping region of this first conductivity type, there is the shallow-layer doped region of one second conductivity type; The degree of depth of this source electrode contact hole is greater than the degree of depth of this source doping region; The doping content of the shallow-layer doped region of this first conductivity type is less than the doping content of this source doping region, and the doping content of this shallow-layer doped region is greater than the doping content of this epitaxial loayer.
Above general introduction and ensuing detailed description are all exemplary in nature, are in order to further specify claim protection range of the present invention.And about other purposes of the present invention and advantage, will set forth in follow-up explanation and accompanying drawing.
Description of drawings
Fig. 1 is the profile of traditional n channel gate groove type power metal oxygen half field effect transistor (MOSFET) structure;
Fig. 2 A to Fig. 2 E is the embodiment one of the manufacture method of aqueduct type power semiconductor structure of the present invention;
Fig. 3 is the embodiment two of the manufacture method of aqueduct type power semiconductor structure of the present invention;
Fig. 4 A to Fig. 4 C is the embodiment three of the manufacture method of aqueduct type power semiconductor structure of the present invention.
[main element description of reference numerals]
Known technology:
N type drain region 110
N type source region 130
Grid oxic horizon 150
Grid polycrystalline structure 160
The present invention:
Epitaxial loayer 210,610
N type diffusion region 211,611
Gate dielectric 250,650
Grid polycrystalline structure 260,660
Polycrystalline structure 261,461,661
Shallow-layer doped region 270,270 ', 670,671
Dielectric layer 280,680
Masking structure 290,690
Well region 300
Source doping region 310,510
P type shallow-layer doped region 320
Dielectric structure 330,530,531
Source electrode contact hole 340,540
Contact doping district 350
Gate trench 780
Embodiment
Major technique characteristic of the present invention, be to form and a shallow-layer doped region of source doping region same conductivity between adjacent trap.When the power MOSFET transistor is become when opening circuit by conducting, this shallow-layer doped region can provide reverse current one paths, and diode forward pressure drop (V is leaked in the source that makes
SD) be reduced to about 0.1 volt～0.2 volt; So, reverse current can have more the minority carrier that exceeds the quata with the face of connecing fast and remove fast, significantly the backward recovery of bring to power metal-oxide half field effect transistor (Reverse Recovery) ability; When switching, avoid the too much consume of power in transistor.Structure of the present invention can avoid having influence on the voltage endurance and the breakdown voltage (BVDSS) of grid oxic horizon again, obtains having the high-reliability and the power MOSFET transistor of switching capability fast.
Fig. 2 A to Fig. 2 E is the embodiment one of the manufacture method of aqueduct type power semiconductor structure of the present invention.Shown in Fig. 2 A; One epitaxial loayer 210 (first conductivity type of present embodiment is an example with the n type) on substrate of elder generation's growth one first conductivity type; Subsequently; Etch a plurality of grooves in epitaxial loayer 210, and in groove, form a gate dielectric 250 and a grid polycrystalline structure 260 in regular turn, to form grid structure in epitaxial loayer 210.
Next, shown in Fig. 2 B, implant n type alloy earlier in epitaxial loayer 210, and carry out the thermal diffusion manufacturing, form a n type diffusion region 211.Subsequently, implant doping content greater than the n type alloy of epitaxial loayer 210, in the surface of epitaxial loayer 210, to form a shallow-layer doped region 270 with n type diffusion region 211.The doping content of above-mentioned n type diffusion region 211 in this n type diffusion region 211 that forms earlier, when follow-up well region is formed, shortens the distance of horizontal proliferation greater than the doping content of epitaxial loayer 210, and stays the electric current (I of source electrode to drain electrode
SD) path, the inessential step of this step can also be omitted.The doping content of above-mentioned shallow-layer doped region 270, greater than the doping content of n type diffusion region 211, and less than the doping content of well region.
Next, shown in Fig. 2 C, form a masking structure 290 in shallow-layer doped region 270 tops, this masking structure 290 can be used to define in the subsequent step position of well region and source doping region.The preferred embodiment of masking structure 290 of the present invention is to grow up a dielectric layer 280 earlier in epitaxial loayer 210 surfaces, subsequently, forms a polycrystalline structure 261 in dielectric layer 280 tops.With regard to a preferred embodiment; Can further in subsequent step,, link to source electrode with above-mentioned polycrystalline structure 261; Can be in shallow-layer doped region 270 tops; The current potential and the path of an equivalence are provided, help the power MOSFET transistor is become when opening circuit by conducting, remove the minority carrier that exceeds the quata fast.
Subsequently, shown in Fig. 2 D, utilize masking structure 290 for shielding, implant the second conductivity type alloy in epitaxial loayer 210, this second conductivity type dopant is an example with p type alloy, subsequently, carries out the thermal diffusion manufacturing, forms a p type well region 300.Next, implant n type alloy in well region, and carry out the thermal diffusion manufacturing.Because the doping content of n type alloy greater than p type well region 300, therefore can form a n type source doping region 310 in well region 300.Therefore after thermal diffusion step, n type alloy and p type alloy can be diffused into masking structure 290 belows, form the position of well region 300 and source doping region 310 among Fig. 2 D.In the present embodiment; Because the concentration of well region 300 is greater than the concentration of the shallow-layer doped region 270 (seeing among Fig. 2 C) that is formed at epitaxial loayer 210 surfaces originally; Therefore can form shallow-layer doped region 270 '; And a p type shallow-layer doped region 320 is between source doping region 310 and shallow-layer doped region 270 ', and this p type shallow-layer doped region 320 is positioned at the surface of well region 300, and its p type doping content is less than the doping content of well region 300.
Next, shown in Fig. 2 E, form a dielectric structure 330 on grid structure, and, form one source pole contact hole 340, to expose well region 300 and source doping region 310 by means of dielectric structure 330 and masking structure 290.Subsequently, in the below of source electrode contact hole 340, implant p type alloy, in order to form a contact doping district 350.At last, cover one deck source metal 360 in the top of contact hole 340 with masking structure 290.Because this source metal 360 connects source doping region 310 and polycrystalline structure 261 simultaneously, therefore, polycrystalline structure 261 is an equipotential with source electrode.Above-mentioned contact doping district 350 can be used to reduce the contact resistance of source metal 360 and well region 300, and the inessential step of this step can also be omitted.In the structure of the present invention, when the power MOSFET transistor is become when opening circuit by conducting, this shallow-layer doped region 270 ' and p type shallow-layer doped region 320 can be used as a passage of reverse current, and diode forward pressure drop (V is leaked in the source that makes
SD) be reduced to about 0.1 volt～0.2 volt, with backward recovery (Reverse Recovery) ability of bring to power metal-oxide half field effect transistor.
Fig. 3 is the embodiment two of the manufacture method of aqueduct type power semiconductor structure of the present invention.The difference of present embodiment and embodiment one is, forms dielectric structure 530 when the grid structure top, forms another dielectric structure 531 simultaneously in polycrystalline structure 461 tops.The existence of this dielectric structure 531 can stay source doping region 510 in a big way in polycrystalline structure 461 both sides.At last, again with polycrystalline structure 461 electrically to be linked to the source electrode electrode.All the other steps, all identical with embodiment one, do not repeat them here.
Fig. 4 A to Fig. 4 C is the embodiment three of the manufacture method of aqueduct type power semiconductor structure of the present invention.The difference of present embodiment and embodiment one is, with the step that forms shallow-layer doped region 670, in advance before forming grid structure.Shown in Fig. 4 A, form epitaxial loayer 610 after the step on the substrate, form n type diffusion region 611 (this step also can be omitted) in epitaxial loayer 610 earlier, subsequently, form shallow-layer doped region 670 in the surface of epitaxial loayer.
Next, shown in Fig. 4 B, form layer protective layer 770 earlier, and define the position of grid structure, subsequently, produce gate trench 780 in epitaxial loayer 610, with the zone of shallow-layer doped region 671 in the surface of epitaxial loayer 610.
Next, shown in Fig. 4 C, form dielectric layer 680 in shallow-layer doped region 671 tops; And form gate dielectric 650 simultaneously in gate trench 780, next, deposit a polysilicon layer (not shown) simultaneously in dielectric layer 680 and gate dielectric 650 tops; Subsequently; Impose the lithography manufacturing approach, remove unnecessary polysilicon layer, stay polycrystalline structure 661 and grid polycrystalline structure 660 at last.Present embodiment but, can also separately form two above-mentioned structures for producing grid structure and masking structure 690 simultaneously.After the step of above-mentioned completion shallow-layer doped region 671; Can impose the manufacturing approach of low temperature, carry out follow-up production stage, so can make shallow-layer doped region 671 be maintained at epi-layer surface; Avoid excess diffusion, obtain having the shallow-layer doped region 671 of preferable characteristic.
As stated, the present invention's preferable possible embodiments of having given an example only is used to describe the present invention yet those of ordinary skills it should be understood that this embodiment, and should not be read as restriction scope of the present invention.It should be noted, lift variation and displacement with this embodiment equivalence, all should be made as and be covered by in the category of the present invention.Therefore, protection scope of the present invention is as the criterion when defining with the claim protection range.
Claims (13)
1. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of tool is characterized in that, may further comprise the steps:
One substrate is provided;
Formation has an epitaxial loayer of one first conductivity type on this substrate;
Form a plurality of grid structures in this epitaxial loayer;
Formation has a shallow-layer doped region of this first conductivity type in the surface of this epitaxial loayer;
Form a masking structure on this shallow-layer doped region;
The a plurality of well regions that utilize this masking structure to form to have one second conductivity type are in this epitaxial loayer; And
The one source pole doped region that utilizes this masking structure to form to have this first conductivity type is in the surface of well region;
Wherein, the doping content of this shallow-layer doped region is less than the doping content of this source doping region and the doping content of this well region, and the doping content of this shallow-layer doped region is greater than the doping content of this epitaxial loayer.
2. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 1 is characterized in that, the step that forms this shallow-layer doped region is before forming these a plurality of grid structures.
3. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 2; It is characterized in that, form the step of this masking structure on this shallow-layer doped region and accomplish simultaneously with the step of these a plurality of grid structures of formation in this epitaxial loayer.
4. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 1 is characterized in that, wherein, this masking structure comprises:
One dielectric layer; And
One polycrystalline layer is positioned on this dielectric layer.
5. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 1 is characterized in that, also comprises:
Form one first dielectric structure on this grid structure;
Utilize this masking structure and this first dielectric structure to form the one source pole contact hole in this epitaxial loayer;
The contact doping district that forms one second conductivity type is in this source electrode contact hole below; And
Form a conductive layer on this source electrode contact hole and this masking structure;
Wherein, the degree of depth of this source electrode contact hole is greater than the degree of depth of this source doping region.
6. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 5 is characterized in that, forms the step of this first dielectric structure, forms one second dielectric structure simultaneously on this masking structure.
7. the manufacturing approach of the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 1 is characterized in that, forms before the step of this well region, and the diffusion region that forms one first conductivity type earlier is in this epitaxial loayer.
8. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of tool is characterized in that, comprising:
The epitaxial loayer of one first conductivity type;
A plurality of grid structures are positioned at this epitaxial loayer;
The well region of a plurality of second conductivity types is positioned at this epitaxial loayer, and has a distance between this adjacent well region;
The shallow-layer doped region of one first conductivity type is between this adjacent well region;
One masking structure is positioned on the shallow-layer doped region of this first conductivity type; And
The source doping region of one first conductivity type is positioned at the surface of this well region;
Wherein, the doping content of the shallow-layer doped region of this first conductivity type is less than the doping content of this source doping region, and the doping content of this shallow-layer doped region is greater than the doping content of this epitaxial loayer.
9. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 8 is characterized in that, also comprises: the shallow-layer doped region of one second conductivity type, and between the shallow-layer doped region and this source doping region of this first conductivity type.
10. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 8 is characterized in that the degree of depth of the shallow-layer doped region of this first conductivity type is less than the degree of depth of this source doping region.
11. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 8 is characterized in that this masking structure comprises:
One dielectric layer; And
One polycrystalline layer is positioned on this dielectric layer.
12. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 8 is characterized in that, also comprises:
The diffusion region of one first conductivity type, between adjacent this well region in position, and the diffusion region degree of depth of this first conductivity type is greater than the degree of depth of this source doping region, and the doping content of the diffusion region of this first conductivity type is greater than the doping content of this epitaxial loayer.
13. the aqueduct type power metal-oxide-semiconductor (MOS) structure of the quick switching capability of a kind of tool as claimed in claim 11 is characterized in that, also comprises: one second dielectric structure is positioned on this polycrystalline layer, wherein, and this polycrystalline layer electrically connect to one source pole electrode.
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Citations (6)
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| US5430315A (en) * | 1993-07-22 | 1995-07-04 | Rumennik; Vladimir | Bi-directional power trench MOS field effect transistor having low on-state resistance and low leakage current |
| US6103578A (en) * | 1997-02-10 | 2000-08-15 | Mitsubishi Denki Kabushiki Kaisha | Method for forming high breakdown semiconductor device |
| US6137122A (en) * | 1999-12-02 | 2000-10-24 | Analog And Power Electronics Corp. | Latch-up controllable insulated gate bipolar transistor |
| JP2002541660A (en) * | 1999-03-30 | 2002-12-03 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Method for manufacturing semiconductor device |
| US20050029618A1 (en) * | 2001-01-30 | 2005-02-10 | Marchant Bruce D. | Structure and method of forming a dual-trench field effect transistor |
| CN101501828A (en) * | 2006-08-10 | 2009-08-05 | 帝斯曼方案公司 | Jfet with built in back gate in either soi or bulk silicon |
-
2011
- 2011-04-22 CN CN201110104067.6A patent/CN102751190B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5430315A (en) * | 1993-07-22 | 1995-07-04 | Rumennik; Vladimir | Bi-directional power trench MOS field effect transistor having low on-state resistance and low leakage current |
| US6103578A (en) * | 1997-02-10 | 2000-08-15 | Mitsubishi Denki Kabushiki Kaisha | Method for forming high breakdown semiconductor device |
| JP2002541660A (en) * | 1999-03-30 | 2002-12-03 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Method for manufacturing semiconductor device |
| US6137122A (en) * | 1999-12-02 | 2000-10-24 | Analog And Power Electronics Corp. | Latch-up controllable insulated gate bipolar transistor |
| US20050029618A1 (en) * | 2001-01-30 | 2005-02-10 | Marchant Bruce D. | Structure and method of forming a dual-trench field effect transistor |
| CN101501828A (en) * | 2006-08-10 | 2009-08-05 | 帝斯曼方案公司 | Jfet with built in back gate in either soi or bulk silicon |
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Effective date of registration: 20170425 Address after: Hsinchu County, Taiwan, China Patentee after: Shuaiqun Microelectronic Co., Ltd. Address before: Chinese Taiwan New Taipei City Patentee before: Kexuan Microelectronic Co.,Ltd. |
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