CN102832142A - Manufacturing method for packaging structure - Google Patents
Manufacturing method for packaging structure Download PDFInfo
- Publication number
- CN102832142A CN102832142A CN2011101655825A CN201110165582A CN102832142A CN 102832142 A CN102832142 A CN 102832142A CN 2011101655825 A CN2011101655825 A CN 2011101655825A CN 201110165582 A CN201110165582 A CN 201110165582A CN 102832142 A CN102832142 A CN 102832142A
- Authority
- CN
- China
- Prior art keywords
- encapsulating structure
- manufacturing approach
- load plane
- inorganic substrate
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
Abstract
The invention provides a manufacturing method for a packaging structure. The manufacturing method comprises the following steps of: providing a tabular inorganic substrate with a bearing plane; forming an occlusion bonding part on the bearing plane; and forming an insulated frame on the occlusion bonding part on the bearing plane by an injection molding way, wherein the insulated frame is provided with a surrounding wall and a receiving space defined by the surrounding wall. Therefore, stronger bonding force can be formed between the inorganic substrate and the insulated frame, so that the insulated frame is prevented from dropping.
Description
Technical field
The present invention relates to a kind of manufacturing approach of encapsulating structure.
Background technology
Usually encapsulating structure can be provided with a framework earlier, and borrow this framework that packaging adhesive material is contained in framework, to avoid causing the packaging adhesive material overflow phenomena when carrying out a some glue operation on substrate.At present encapsulating structure has changed and has adopted like the carrier of the harder inorganic substrate of hardness such as ceramic substrate as chip; Inorganic substrate is tabular usually and its surface is shiny surface; When being combined with Insulating frame on the inorganic substrate, then Insulating frame comes off easily, thus; Promptly can't the packaging adhesive material point be distributed on the inorganic substrate, and only can packaging adhesive material be sprayed on the inorganic substrate to form this packing colloid through the mode of spraying through a glue mode.The packing colloid that forms with spraying method is easy to generate the problem that size inaccuracy and variable thickness cause again.
Therefore, the inventor realizes the problems referred to above and can improve, and specially concentrates on studies and binding isotherm, proposes a kind of reasonable in design and effectively improve the present invention of above-mentioned disappearance finally.
Summary of the invention
The embodiment of the invention provides a kind of manufacturing approach of encapsulating structure, and it can make has stronger adhesion between inorganic substrate and the Insulating frame, Insulating frame can not come off.
The embodiment of the invention provides a kind of manufacturing approach of encapsulating structure, may further comprise the steps:
One flat inorganic substrate is provided, and this inorganic substrate has a load plane;
On this load plane, form an interlock and follow portion; And
Utilize the mode of ejection formation to form an Insulating frame in the interlock portion of following of this load plane, this Insulating frame has a surrounding wall and and defines the accommodation space that forms by this surrounding wall.
The manufacturing approach of encapsulating structure of the present invention, wherein, this interlock portion of following is the groove that is recessed to form in this load plane.
The manufacturing approach of encapsulating structure of the present invention, wherein, this interlock portion of following is the metal level that is formed at this load plane with plating mode.
The manufacturing approach of encapsulating structure of the present invention, wherein, this interlock portion of following is the sandblast layer that is formed at this load plane with the sandblast mode.
The manufacturing approach of encapsulating structure of the present invention, wherein, this inorganic substrate is ceramic substrate or silicon substrate.
The manufacturing approach of encapsulating structure of the present invention, wherein, this ceramic substrate is an aluminium nitride substrate.
The manufacturing approach of encapsulating structure of the present invention; Wherein, The manufacturing approach of encapsulating structure comprises that also one is arranged at the solid brilliant routing step of the load plane of this inorganic substrate with a chip and two leads, and this chip is electrically connected at this inorganic substrate through this two lead.
The manufacturing approach of encapsulating structure of the present invention; Wherein, The manufacturing approach of encapsulating structure comprises that also one utilizes some glue mode that one packaging adhesive material point is distributed in this accommodation space to form the sealing step of a packing colloid, and this packing colloid envelopes this chip and this two lead.
The present invention has following beneficial effect: the present invention is combined with Insulating frame on inorganic substrate; Make packaging adhesive material receive containing of surrounding wall; And be limited in the accommodation space; Avoid causing the packaging adhesive material overflow phenomena, and have stronger adhesion between inorganic substrate and the Insulating frame, Insulating frame can not come off from inorganic substrate.
For further understanding characteristic of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing, yet shown in accompanying drawing only provide reference and the explanation usefulness, be not to be used for the present invention is limited.
Description of drawings
Fig. 1 is the schematic perspective view one of the first embodiment of the present invention;
Fig. 2 is the schematic perspective view two of the first embodiment of the present invention;
Fig. 3 is the schematic perspective view three of the first embodiment of the present invention;
Fig. 4 is the schematic perspective view four of the first embodiment of the present invention;
Fig. 5 is the schematic perspective view one of the second embodiment of the present invention;
Fig. 6 is the schematic perspective view two of the second embodiment of the present invention.
The main element symbol description
10 inorganic substrates
11 load planes
Portion is followed in 12 interlocks
Portion is followed in 12 ' interlock
20 Insulating frames
21 surrounding walls
22 accommodation spaces
30 chips
40 leads
50 packing colloids
Embodiment
[first embodiment]
See also Fig. 1 to shown in Figure 3, the present invention provides a kind of manufacturing approach of encapsulating structure, and this manufacturing approach may further comprise the steps:
Aluminium nitride substrate) or silicon substrate (one) a flat inorganic substrate 10 (as shown in Figure 1) is provided, wherein this inorganic substrate 10 (for example:, but do not limit can be ceramic substrate.In addition, this inorganic substrate 10 has a load plane 11.
(2) on this load plane 11, form an interlock and follow portion 12 (as shown in Figure 2).In the present embodiment, it is a plurality of grooves that are recessed to form in this load plane 11 that portion 12 is followed in this interlock, and its compartment of terrain is distributed in the appropriate location of this load plane 11.
(3) utilize the mode of ejection formation to follow portion's 12 formation, one Insulating frame 20 (as shown in Figure 3) in the interlock of this load plane 11, this Insulating frame 20 has a surrounding wall 21 and at least one accommodation space 22 that forms that defined by this surrounding wall 21.The quantity of accommodation space 22 does not have qualification, in the accompanying drawing be with two be example explanation, certainly, accommodation space 22 also can only be provided with one.Thus, can produce an encapsulating structure through above-mentioned steps.
Please cooperate and consult shown in Figure 4ly, the manufacturing approach of encapsulating structure of the present invention also comprises a solid brilliant routing step and a sealing step.Wherein should solid brilliant routing step be the load plane 11 that a chip 30 and two leads 40 is arranged at this inorganic substrate 10, this chip 30 be electrically connected at this inorganic substrate 10 through this two lead 40.This chip 30 and this two lead 40 are contained in this accommodation space 22.And this sealing step is to utilize some glue mode that one packaging adhesive material point is distributed in this accommodation space 22 forming a packing colloid 50, and this packing colloid 50 envelopes this chip 30 and this two lead 40.
For instance, chip 30 is a light-emitting diode chip for backlight unit, and packaging adhesive material is the fluorescent glue material that contains phosphor powder, and packing colloid 50 then is the fluorescent colloid, and thus, the prepared encapsulating structure of the present invention is a package structure for LED.
In view of the above, when putting the cloth packaging adhesive material with a glue mode, packaging adhesive material receives the surrounding wall 21 of Insulating frame 20 and contains, and spacing in accommodation space 22, so packaging adhesive material can not produce the phenomenon of overflow.And; The embodiment of the invention is to utilize the mode of ejection formation directly to form this Insulating frame 20 at inorganic substrate 10; And the load plane 11 of inorganic substrate 10 is formed with interlock and follows portion 12 (being groove here); Form the then zone of non-flat forms thus, follow strength, make Insulating frame 20 can not come off with the interlock that strengthens between inorganic substrate 10 and the Insulating frame 20.
[second embodiment]
See also Fig. 5 and shown in Figure 6, be second embodiment of the manufacturing approach of encapsulating structure of the present invention, wherein components identical still adopts identical label to represent with first embodiment, the difference of this second embodiment and first embodiment be in:
It is the metal level that is formed at this load plane 11 with plating mode that portion 12 ' is followed in this interlock, or is formed at the sandblast layer of this load plane 11 with the sandblast mode.Thus, form the then regional of non-flat forms, follow strength, can reach the effect identical with first embodiment with the interlock that strengthens between inorganic substrate 10 and the Insulating frame 20 at load plane 11.
From the above; The embodiment of the invention is combined with Insulating frame on inorganic substrate; Make packaging adhesive material receive containing of surrounding wall, and be limited in the accommodation space, avoid causing the packaging adhesive material overflow phenomena; And have stronger adhesion between inorganic substrate and the Insulating frame, Insulating frame can not come off from inorganic substrate.
The above is merely preferable possible embodiments of the present invention, non-so limitation protection scope of the present invention.
Claims (8)
1. the manufacturing approach of an encapsulating structure is characterized in that, may further comprise the steps:
One flat inorganic substrate is provided, and this inorganic substrate has a load plane;
On this load plane, form an interlock and follow portion; And
Utilize the mode of ejection formation to form an Insulating frame in the interlock portion of following of this load plane, this Insulating frame has a surrounding wall and and defines the accommodation space that forms by this surrounding wall.
2. the manufacturing approach of encapsulating structure as claimed in claim 1 is characterized in that, this interlock portion of following is the groove that is recessed to form in this load plane.
3. the manufacturing approach of encapsulating structure as claimed in claim 1 is characterized in that, this interlock portion of following is the metal level that is formed at this load plane with plating mode.
4. the manufacturing approach of encapsulating structure as claimed in claim 1 is characterized in that, this interlock portion of following is the sandblast layer that is formed at this load plane with the sandblast mode.
5. the manufacturing approach of encapsulating structure as claimed in claim 1 is characterized in that, this inorganic substrate is ceramic substrate or silicon substrate.
6. the manufacturing approach of encapsulating structure as claimed in claim 5 is characterized in that, this ceramic substrate is an aluminium nitride substrate.
7. the manufacturing approach of encapsulating structure as claimed in claim 1; It is characterized in that; The manufacturing approach of encapsulating structure comprises that also one is arranged at the solid brilliant routing step of the load plane of this inorganic substrate with a chip and two leads, and this chip is electrically connected at this inorganic substrate through this two lead.
8. the manufacturing approach of encapsulating structure as claimed in claim 7; It is characterized in that; The manufacturing approach of encapsulating structure comprises that also one utilizes some glue mode that one packaging adhesive material point is distributed in this accommodation space to form the sealing step of a packing colloid, and this packing colloid envelopes this chip and this two lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101655825A CN102832142A (en) | 2011-06-14 | 2011-06-14 | Manufacturing method for packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011101655825A CN102832142A (en) | 2011-06-14 | 2011-06-14 | Manufacturing method for packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN102832142A true CN102832142A (en) | 2012-12-19 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2011101655825A Pending CN102832142A (en) | 2011-06-14 | 2011-06-14 | Manufacturing method for packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102832142A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113078252A (en) * | 2021-03-17 | 2021-07-06 | 江门市迪司利光电股份有限公司 | Packaging method of LED chip |
| CN115295498A (en) * | 2022-10-10 | 2022-11-04 | 合肥中恒微半导体有限公司 | High-temperature-resistant IGBT power module |
Citations (6)
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|---|---|---|---|---|
| CN2543199Y (en) * | 2002-03-26 | 2003-04-02 | 胜开科技股份有限公司 | Encapsulation structure for image sensing chip |
| CN1571128A (en) * | 2004-04-30 | 2005-01-26 | 王鸿仁 | Method for manufacturing image sensor base plate |
| US20050211991A1 (en) * | 2004-03-26 | 2005-09-29 | Kyocera Corporation | Light-emitting apparatus and illuminating apparatus |
| CN1237629C (en) * | 2000-08-23 | 2006-01-18 | 奥斯兰姆奥普托半导体有限责任公司 | Optoelectronic component and method for the production thereof, module and device comprising a module of this type |
| CN101359636A (en) * | 2007-07-31 | 2009-02-04 | 昆山达鑫电子有限公司 | Encapsulation construction of electronic component and encapsulation method thereof |
| CN101877318A (en) * | 2009-04-30 | 2010-11-03 | 赫克斯科技股份有限公司 | Frame type direct copper-ceramic bonding plate and manufacturing method thereof |
-
2011
- 2011-06-14 CN CN2011101655825A patent/CN102832142A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1237629C (en) * | 2000-08-23 | 2006-01-18 | 奥斯兰姆奥普托半导体有限责任公司 | Optoelectronic component and method for the production thereof, module and device comprising a module of this type |
| CN2543199Y (en) * | 2002-03-26 | 2003-04-02 | 胜开科技股份有限公司 | Encapsulation structure for image sensing chip |
| US20050211991A1 (en) * | 2004-03-26 | 2005-09-29 | Kyocera Corporation | Light-emitting apparatus and illuminating apparatus |
| CN1571128A (en) * | 2004-04-30 | 2005-01-26 | 王鸿仁 | Method for manufacturing image sensor base plate |
| CN101359636A (en) * | 2007-07-31 | 2009-02-04 | 昆山达鑫电子有限公司 | Encapsulation construction of electronic component and encapsulation method thereof |
| CN101877318A (en) * | 2009-04-30 | 2010-11-03 | 赫克斯科技股份有限公司 | Frame type direct copper-ceramic bonding plate and manufacturing method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113078252A (en) * | 2021-03-17 | 2021-07-06 | 江门市迪司利光电股份有限公司 | Packaging method of LED chip |
| CN115295498A (en) * | 2022-10-10 | 2022-11-04 | 合肥中恒微半导体有限公司 | High-temperature-resistant IGBT power module |
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| PB01 | Publication | ||
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| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20121219 |