CN102832183A - Outer-pin-free flat semiconductor package structure adopting elastic device - Google Patents
Outer-pin-free flat semiconductor package structure adopting elastic device Download PDFInfo
- Publication number
- CN102832183A CN102832183A CN2012103405496A CN201210340549A CN102832183A CN 102832183 A CN102832183 A CN 102832183A CN 2012103405496 A CN2012103405496 A CN 2012103405496A CN 201210340549 A CN201210340549 A CN 201210340549A CN 102832183 A CN102832183 A CN 102832183A
- Authority
- CN
- China
- Prior art keywords
- pin
- elastic
- wafer
- semiconductor package
- flat semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention discloses an outer-pin-free flat semiconductor package structure adopting an elastic device. The outer-pin-free flat semiconductor package structure comprises a lead frame, a chip, a connection sheet, an elastic heat dissipation plate and colloid, wherein the colloid covers the lead frame, the chip and the elastic heat dissipation plate; and the bottom surface of a chip seat, the outer surfaces of inner pins and the top surface of the elastic heat dissipation plate are exposed from the colloid. With the adoption of the elastic heat dissipation plate, elastic semiconductor package is realized; glue is prevented from overflowing from the top of the elastic heat dissipation plate, and the chip cannot be crushed by pressure produced by die assembly of an upper die and a lower die during package; the chip is effectively protected, and the yield of the package structure is improved; the chip seat can be used as a chip carrier and a bottom heat dissipation plate; with the elastic heat dissipation plate and the chip seat at the bottom, an effect of dissipating heat from two surfaces is achieved; the heat dissipation effect of the package structure is relatively good; and the outer-pin-free flat semiconductor package structure is suitable for integration and relatively high in minimization.
Description
Technical field
The present invention relates to the semiconductor packaging field, particularly relate to a kind of outer flat semiconductor package of pin of nothing that adopts elastic device.
Background technology
Semiconductor packages is meant the process that obtains individual chips through the wafer of test according to product type and functional requirement processing.Encapsulation process is: be cut into little wafer from wafer after through scribing process; Mount diced wafer on the island of corresponding frame substrate with glue then; Utilize ultra-fine plain conductor or electroconductive resin that the bond pad of wafer is connected to the respective pins of substrate again, and constitute desired circuit; And then to wafer independently with plastic casing packaging protection in addition.
Along with developing rapidly of microelectric technique, the increase of integrated circuit complexity requires semiconductor package to have littler profile, higher performance.
In the semiconductor package of prior art; Lead frame is one of element of using always; And be applied to multiple encapsulating products, with the type of lead frame, quad flat package can be divided into the quad flat package of I type pin, the quad flat package and the square flat non-pin encapsulation of J type pin; The pin of the lead frame of square flat non-pin encapsulation does not exceed the edge of encapsulating structure, so it has smaller volume.In addition; The square flat non-pin encapsulation has short signaling path and reaches signal transmission speed faster, yet the fin of quad flat non-leaded package structure can only be arranged on the surface of encapsulating structure, therefore; Do not establish heat abstractor; At single face fin is set, along with the miniaturization of semiconductor package and the increase of complexity, the radiating effect of above-mentioned radiator structure has satisfied not the requirement of existing semiconductor package.
Summary of the invention
The objective of the invention is to avoid weak point of the prior art and provide a kind of nothing that adopts elastic device the outer flat semiconductor package of pin; Its good heat dissipation effect; Help the miniaturization of semiconductor package and integrated; The protection wafer is not damaged by pressure when the injection moulding matched moulds, when injection moulding, also can prevent the glue that overflows simultaneously.
The object of the invention is realized through following technical scheme:
A kind of outer flat semiconductor package of pin of nothing that adopts elastic device comprises:
Lead frame comprises at least one wafer holder and a plurality of wafer holder pin on every side that is positioned at, and interior pin has inner surface and outer surface;
Wafer, wafer are positioned at the upper surface of wafer holder, and electrically connect with interior pin;
Brace, wafer is connected through brace with interior pin, one section upper surface that is fixed in wafer of brace, its another section is affixed with the inner surface of interior pin;
The elastic heat dissipating plate, the elastic heat dissipating plate is fixed in the upper surface of brace;
Colloid, colloid are coated on lead frame, wafer and elastic heat dissipating plate, and the end face of the bottom surface of wafer holder, the outer surface of interior pin, elastic heat dissipating plate all exposes to colloid.
Further, the elastic heat dissipating plate comprises heating panel and elastic foot, and elastic foot is fixed in heating panel.
Further, elastic foot is set to the elastic foot of two zigzags, is respectively the elastic foot of first zigzag and the elastic foot of second zigzag, and wherein, the elastic foot of first zigzag oppositely is provided with, and the elastic foot forward of second zigzag is provided with; One end of the top of the elastic foot of first zigzag and heating panel joins, and the top of the elastic foot of second zigzag and the other end of heating panel join.
Further, the one-body molded setting of the elastic foot of heating panel and zigzag.
Further, the top edge of heating panel offers the anti-overflow glue groove that prevents excessive glue.
Further, the elastic heat dissipating plate is the metallic spring heating panel.
Further, engage between said wafer and the wafer holder fixing.
Further, it is protruding that the top edge of the bottom edge of wafer holder and interior pin is equipped with the retaining that prevents the steam entering.
Further, brace is a copper sheet.
Further, between wafer holder and the wafer, between wafer and the brace, between brace and the elastic heat dissipating plate, engage affixed between brace and the interior pin.
Beneficial effect of the present invention:
A kind of outer flat semiconductor package of pin of nothing that adopts elastic device of the present invention; Adopt that elastic heat dissipating is firm and hard to have showed flexible semiconductor packages; In the pressure crushing that prevents that the elastic heat dissipating plate top surface from producing when overflowing when more having guaranteed that wafer is in encapsulation in the glue not by upper and lower mould matched moulds; Effectively protect wafer, improved the yield of encapsulating structure; Wafer holder not only can but also can be used as the heating panel of bottom as the supporting body of wafer; The structure of the wafer holder of employing elastic heat dissipating plate and bottom has obtained the effect of two-sided heat radiation; Make the encapsulating structure radiating effect better, be more suitable for the no pin flat packaging structure integrated, that degree of miniaturization is higher.
Description of drawings
Utilize accompanying drawing that the present invention is further specified, but the content in the accompanying drawing does not constitute any restriction of the present invention.
Fig. 1 is a kind of outer flat semiconductor package front view of pin of nothing that adopts elastic device of the present invention;
Fig. 2 is the structural representation at A-A place among Fig. 1;
Fig. 3 is the end view of Fig. 1;
Fig. 4 is a kind of structural representation that adopts outer another visual angle of the flat semiconductor package of pin of nothing of elastic device of the present invention.
In Fig. 1 to Fig. 4, include:
Lead frame 100, wafer holder 110, interior pin 120,
Wafer 300,
Elastic heat dissipating plate 400, heating panel 410, elastic foot 420,
Colloid 500,
Brace 700,
Embodiment
In conjunction with following examples the present invention is described further.
A kind of non-exterior pin semiconductor flat packaging structure that adopts elastic device of the present invention; Like Fig. 1 to shown in Figure 4 comprising: lead frame 100 comprises at least one wafer holder 110 and a plurality of pins 120 that are positioned at around the wafer holder 110, and interior pin 120 has inner surface and outer surface.Wafer 300 is positioned at the upper surface of wafer holder 110, and electrically connects with interior pin 120.Wafer 300 is connected through brace 700 with interior pin 120, one section upper surface that is fixed in wafer 300 of brace 700, and its another section is affixed with the inner surface of interior pin 120.Elastic heat dissipating plate 400 is fixed in the upper surface of brace 700.Colloid 500, colloid 500 are coated on lead frame 100, wafer 300, elastic heat dissipating plate 400, and the outer surface of the bottom surface of wafer holder 110, interior pin 120, the end face of elastic heat dissipating plate 400 expose to colloid 500.Elastic heat dissipating plate 400 is used for the heat that wafer 300 produces is derived the encapsulating structure outside, and interior pin 120 is used for being electrically connected with other elements.
Concrete, before the encapsulating encapsulation, upper and lower mould needs first matched moulds; Produce pressure between patrix and the counterdie during matched moulds; If want to obtain the outer pin flat packaging structure of nothing of two-sided heat radiation, the heating panel 410 on wafer 300 tops need tightly be close to patrix, exposes the purpose of colloid 500 outsides with heating panel 410 end faces after reaching encapsulating; And need not increase, yet the heating panel 410 of rigidity receives the pressure of upper and lower mould easily and wafer 300 is crushed when matched moulds except that glue process.Therefore; Adopt elastic heat dissipating plate 400 can avoid the phenomenon of crushing wafer 300 when upper and lower mould matched moulds to produce; And can reach heating panel 410 end faces and patrix inner surface are tightly got together, prevent the glue that overflows during encapsulating, directly obtain the outer pin flat packaging structure of nothing of two-sided heat radiation; Make the radiating effect maximization, reduce and remove glue process.
Elastic heat dissipating plate 400 comprises heating panel 410 and elastic foot 420, and elastic foot 420 is fixed in heating panel 410 bottom surfaces.
The elastic foot 420 one-body molded settings of heating panel 410 and zigzag.Elastic heat dissipating plate 400 can form through bending for a sheet metal.
The top edge of heating panel 410 offers the anti-overflow glue groove 600 that prevents excessive glue.Further prevent the excessive glue of end face of heating panel 410 effectively.
Elastic heat dissipating plate 400 is a metallic spring heating panel 400.Metal heat-conducting efficient is high, good heat dissipation effect, and good forming effect, and have better elastic deformation recovery property.
Engaging material through tin ball 800 or other between wafer 300 and the wafer holder 110 engages and fixes.Wafer holder 110 first can be used as the carrier of bearing wafer 300, and second can be used as the bottom heating panel, realizes the effect of two-sided heat radiation with the elastic heat dissipating plate 400 on wafer 300 tops, and the 3rd as interior pin.
The top edge of the top edge of wafer holder 110 and interior pin 120 is equipped with the retaining protruding 610 that prevents that steam from getting into.Prevent that steam from getting into packaging body, improves reliability of products.
Wafer 300 is connected through brace 700 with interior pin 120, and one section of brace 700 is positioned between wafer 300 upper surfaces and the elastic heat dissipating plate 400, and its another section is affixed with the inner surface of interior pin 120.Pin 120 is provided with more flexible and changeable in making.
Between wafer holder 110 and the wafer 300, between wafer 300 and the brace 700, between brace 700 and the elastic heat dissipating plate 400, affixed between brace 700 and the interior pin 120 through grafting material.Internal structure firmly connects, and is convenient to encapsulating encapsulation, makes the structural integrity after the encapsulation good, stable performance.
What should explain at last is: more than be merely the preferred embodiments of the present invention; Be not limited to the present invention; Although the present invention has been carried out detailed explanation with reference to embodiment; For a person skilled in the art, it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. the outer flat semiconductor package of pin of nothing that adopts elastic device is characterized in that, comprising:
Lead frame comprises at least one wafer holder and a plurality of said wafer holder pin on every side that is positioned at, and said interior pin has inner surface and outer surface;
Wafer, said wafer is positioned at the upper surface of said wafer holder, and electrically connects with said interior pin;
Brace, said wafer is connected through said brace with said interior pin, one section upper surface that is fixed in said wafer of said brace, its another section is affixed with the inner surface of said interior pin;
The elastic heat dissipating plate, said elastic heat dissipating plate is fixed in the upper surface of said brace;
Colloid, said colloid are coated on said lead frame, said wafer and said elastic heat dissipating plate, and the bottom surface of said wafer holder, the outer surface of said interior pin, the end face of said elastic heat dissipating plate all expose to said colloid.
2. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 1, it is characterized in that: said elastic heat dissipating plate comprises heating panel and elastic foot, and said elastic foot is fixed in said heating panel.
3. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 2; It is characterized in that: said elastic foot is set to the elastic foot of two zigzags; Be respectively the elastic foot of first zigzag and the elastic foot of second zigzag; Wherein, the elastic foot of said first zigzag oppositely is provided with, and the elastic foot forward of said second zigzag is provided with; One end of the top of the elastic foot of said first zigzag and said heating panel joins, and the top of the elastic foot of said second zigzag and the other end of said heating panel join.
4. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 3 is characterized in that: the one-body molded setting of the elastic foot of said heating panel and said zigzag.
5. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 2, it is characterized in that: the top edge of said heating panel offers the anti-overflow glue groove that prevents excessive glue.
6. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 1, it is characterized in that: said elastic heat dissipating plate is the metallic spring heating panel.
7. the outer flat semiconductor package of pin of a kind of nothing that adopts elastic device according to claim 1 is characterized in that: engages between said wafer and the wafer holder and fix.
8. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 1, it is characterized in that: it is protruding that the top edge of the bottom edge of said wafer holder and said interior pin is equipped with the retaining that prevents the steam entering.
9. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 1, it is characterized in that: said brace is a copper sheet.
10. a kind of outer flat semiconductor package of pin of nothing that adopts elastic device according to claim 9; It is characterized in that: between said wafer holder and the wafer; Between said wafer and the brace; Between said brace and the elastic heat dissipating plate, engage affixed between said brace and the interior pin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210340549.6A CN102832183B (en) | 2012-09-14 | 2012-09-14 | Outer-pin-free flat semiconductor package structure adopting elastic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210340549.6A CN102832183B (en) | 2012-09-14 | 2012-09-14 | Outer-pin-free flat semiconductor package structure adopting elastic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102832183A true CN102832183A (en) | 2012-12-19 |
| CN102832183B CN102832183B (en) | 2015-01-07 |
Family
ID=47335251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210340549.6A Active CN102832183B (en) | 2012-09-14 | 2012-09-14 | Outer-pin-free flat semiconductor package structure adopting elastic device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102832183B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI505417B (en) * | 2013-01-22 | 2015-10-21 | Uunup Technology Co Ltd | A heat sink for semiconductor wafer device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1374693A (en) * | 2001-03-09 | 2002-10-16 | 矽品精密工业股份有限公司 | Semiconductor package with heat dissipating structure |
| US20050029657A1 (en) * | 2000-12-22 | 2005-02-10 | Broadcom Corporation | Enhanced die-up ball grid array and method for making the same |
| CN202839586U (en) * | 2012-09-14 | 2013-03-27 | 杰群电子科技（东莞）有限公司 | Outer-pin-free flat semiconductor package structure adopting elastic device |
-
2012
- 2012-09-14 CN CN201210340549.6A patent/CN102832183B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050029657A1 (en) * | 2000-12-22 | 2005-02-10 | Broadcom Corporation | Enhanced die-up ball grid array and method for making the same |
| CN1374693A (en) * | 2001-03-09 | 2002-10-16 | 矽品精密工业股份有限公司 | Semiconductor package with heat dissipating structure |
| CN202839586U (en) * | 2012-09-14 | 2013-03-27 | 杰群电子科技（东莞）有限公司 | Outer-pin-free flat semiconductor package structure adopting elastic device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI505417B (en) * | 2013-01-22 | 2015-10-21 | Uunup Technology Co Ltd | A heat sink for semiconductor wafer device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102832183B (en) | 2015-01-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105655310B (en) | Encapsulating structure, electronic equipment and packaging method | |
| US9859250B2 (en) | Substrate and the method to fabricate thereof | |
| KR100374629B1 (en) | A power semiconductor package for thin and small size | |
| CN101752329B (en) | Top-side cooled semiconductor package with stacked interconnection plates and method | |
| CN215220710U (en) | Semiconductor device with a plurality of semiconductor chips | |
| KR20190045374A (en) | Laminated semiconductor die assembly with high efficiency thermal path and molded underfill | |
| CN107078127B (en) | Power semiconductor device and method for manufacturing the same | |
| CN106898591A (en) | A kind of multi-chip framework encapsulation structure of radiating and preparation method thereof | |
| US20100230792A1 (en) | Premolded Substrates with Apertures for Semiconductor Die Packages with Stacked Dice, Said Packages, and Methods of Making the Same | |
| US20140117525A1 (en) | Power module package and method of manufacturing the same | |
| CN108417499A (en) | Cavity package structure and its manufacturing method | |
| CN202839586U (en) | Outer-pin-free flat semiconductor package structure adopting elastic device | |
| JP2018113399A (en) | Manufacturing method for circuit component and circuit component | |
| CN102832183A (en) | Outer-pin-free flat semiconductor package structure adopting elastic device | |
| CN103943613B (en) | The manufacture method of semiconductor devices and semiconductor devices | |
| CN103441085B (en) | A kind of flip-chip BGA package method | |
| US7433199B2 (en) | Substrate structure for semiconductor package and package method thereof | |
| US10840172B2 (en) | Leadframe, semiconductor package including a leadframe and method for forming a semiconductor package | |
| CN103441106A (en) | Chip flip-mounting BGA encapsulating structure | |
| JP2014019086A (en) | Molding die, substrate sucking die, resin sealing device, and method for manufacturing resin sealed electronic component | |
| CN103824820B (en) | Leadframe area array package technology | |
| CN107749408B (en) | Elastic heat conducting piece exposed packaging structure | |
| CN202549841U (en) | Semiconductor module | |
| TWI514051B (en) | Backlight structure and method for manufacturing the same | |
| CN103441080A (en) | Chip front-mounting BGA encapsulating method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |