CN102856161A - Production method for metal-oxide-metal capacitor (MOM) - Google Patents
Production method for metal-oxide-metal capacitor (MOM) Download PDFInfo
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- CN102856161A CN102856161A CN2012101108669A CN201210110866A CN102856161A CN 102856161 A CN102856161 A CN 102856161A CN 2012101108669 A CN2012101108669 A CN 2012101108669A CN 201210110866 A CN201210110866 A CN 201210110866A CN 102856161 A CN102856161 A CN 102856161A
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Abstract
The invention discloses a production method for an MOM. The method includes depositing a first low K-value dielectric layer on a substrate; depositing a silicon nitride layer on the first low K-value dielectric layer through a deposition and oxygen-containing gas processing method, wherein the silicon nitride layer comprises a first silicon nitride layer of an MOM area and a second silicon nitride layer of a non-MOM area; etching the second silicon nitride layer; depositing a second low K-value dielectric layer above the non-MOM area; photoetching the first silicon nitride layer to form a first metallic channel, and thinning the first silicon nitride layer; depositing a silicon oxide layer on the first silicon nitride layer through a deposition and oxygen-containing gas processing method and etching the silicon oxide in a horizontal direction to form a silicon oxide- silicon nitride-silicon oxide structure; etching the second low K-value dielectric layer to form a second metallic channel; and performing metal filling process on the first and second metallic channels. According to the method, electrical characteristics of the capacitor are improved, and electricity uniformity is improved.
Description
Technical field
The present invention relates to microelectronic, relate in particular to the manufacture method of a kind of metal-multilevel insulator-metal capacitor.
Background technology
Capacitor is the important composition unit in the integrated circuit, is widely used in memory, microwave, and radio frequency, smart card is in the chips such as high pressure and filtering.The capacitor constructions that widely adopts in chip is the metal-insulator-metal type (MIM) that is parallel to silicon chip substrate.Wherein metal be manufacture craft easily with metal interconnected the technique mutually copper, aluminium etc. of compatibility, insulator then is the dielectric substance of the high-ks (k) such as silicon nitride, silica.The performance of improving the high-k dielectric material is one of main method that improves capacitor performance.
Plasma enhanced chemical vapor deposition method (PECVD, Plasma Enhanced Chemical Vapor Deposition) is because of the low thin film deposition that is widely used in the metal interconnected technique of its depositing temperature.High k value insulator silicon nitride can utilize the PECVD method to react generation by silane and ammonia under plasma ambient.High k value insulator oxide silicon can utilize the PECVD method to react generation by silane and nitrous oxide under plasma ambient.
The stability of the silazine link in the silicon nitride film (Si-N) is weaker than the silicon oxygen bond (Si-O) in the silicon oxide film.Cause under high voltage, the leakage current of silicon nitride film capacitor is larger.
And along with the minimizing of chip size, and performance is to the demand of large electric capacity, and how obtaining highdensity electric capacity under limited area becomes a problem that haves a great attraction.Along with the continuous progress of semiconductor integrated circuit manufacturing technology, performance also is accompanied by device miniaturization, microminiaturized process when constantly promoting.More and more advanced processing procedure requires to realize device as much as possible in as far as possible little zone, obtains high as far as possible performance.
Summary of the invention
For the problem of above-mentioned existence, the purpose of this invention is to provide the manufacture method of a kind of metal-multilevel insulator-metal capacitor.The method is a kind of method that realizes larger electric capacity in less chip area perpendicular to the metal-oxide-metal (MOM) of silicon chip substrate, and the process that metal-silicon nitride-metal M OM capacitor is made in the two steps circulation that utilizes PECVD deposited silicon nitride-oxygen-containing gas to process, effectively reduce the si-h bond (Si-H) that remains in the silicon oxide film, improved the performance of metal-oxide silicon-metal MOM capacitor.
The objective of the invention is to be achieved through the following technical solutions:
The manufacture method of a kind of metal-multilevel insulator-metal capacitor wherein, may further comprise the steps:
One substrate is provided;
At described substrate deposition one deck the first low dielectric coefficient medium layer, described the first low dielectric coefficient medium layer comprises that metal-oxide-metal is made the zone and nonmetal-oxide-metal is made the zone;
The mode that adopts deposition step and oxygen-containing gas treatment step to loop, at described the first low-k (low K value) dielectric layer deposition one deck silicon nitride layer, described silicon nitride layer comprises first silicon nitride layer in metal-oxide-metal zone and the second silicon nitride layer of nonmetal-oxide-metallic region;
Etching is removed described the second silicon nitride layer;
Described nonmetal-oxide-metallic region above deposit again one deck the second low-k (low K value) dielectric layer;
Carry out lithographic patterning technique at described the first silicon nitride layer, in described the first silicon nitride layer, form the first metallic channel, and described the first silicon nitride layer is carried out etching, in the horizontal direction described the first silicon nitride layer of attenuate;
The mode that adopts deposition step and oxygen-containing gas treatment step to loop, at described first silicon nitride layer surface deposition one deck silicon oxide layer, and the described silicon oxide layer of etching is removed the silica on the horizontal direction, formation silica-silicon-nitride and silicon oxide structure;
Described the second low-k of etching (low K value) dielectric layer forms the second metallic channel;
Carry out metal filled technique to described the first metallic channel and described the second metallic channel.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, described oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, in the endless form of described deposition step and oxygen-containing gas treatment step, the gas flow that oxygen-containing gas is processed is 2000 to 6000sccm, and treatment temperature is 300 ℃ to 600 ℃.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, in the endless form of described deposition step and oxygen-containing gas treatment step, described deposition step using plasma enhanced chemical vapor deposition processes.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, in the using plasma enhanced chemical vapor deposition processes of the step of cvd silicon oxide, its reacting gas comprises silane and nitrous oxide, wherein, the flow of described silane is at 25sccm to 600sccm, the flow of described nitrous oxide is 9000sccm-20000sccm, the span of the ratio of the flow of described silane and described nitrous oxide is 1:15 to 1:800, and rate of film build is 10 nm/minute to 5000 nm/minute.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, in the step of deposited silicon nitride, the using plasma enhanced chemical vapor deposition processes, its reacting gas comprises silane and ammonia, reacts the generation silicon nitride film in plasma environment.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor, wherein, in the endless form of described deposition step and oxygen-containing gas treatment step, the deposit thickness of each silicon nitride or silica is 1 nanometer to 10 nanometer.
The manufacture method of above-mentioned metal-multilevel insulator-metal capacitor wherein, carries out comprising in the metal filled processing step diffusion impervious layer deposition, copper plating, the copper metal layer chemical mechanical milling tech step of the copper that carries out copper wiring technique.
Compared with the prior art, beneficial effect of the present invention is:
The present invention is by making MOM capacitor, capping oxidation silicon oxide layer on silicon nitride layer, improved between the insulator film Atom in conjunction with bond stability, and, method by using plasma enhanced chemical vapor deposition method and oxygen-containing gas processing method loop has reduced the si-h bond that remains in the silicon nitride film effectively.Thereby effectively improved the electric capacity of layer inner capacitor, and effectively improved each electrical characteristics such as puncture voltage, leakage current of MIM capacitor, improved the electricity uniformity between each device.
Description of drawings
Fig. 1 is the schematic process flow diagram of metal-multilevel insulator of the present invention-metal capacitor manufacture method.
Fig. 2 A-Fig. 2 H is respectively the processing step decomposing state schematic diagram of metal-multilevel insulator of the present invention-metal capacitor manufacture method.
Embodiment
The invention will be further described below in conjunction with schematic diagram and concrete operations embodiment.
As shown in Fig. 1 and Fig. 2 A-2H, the manufacture method of a kind of metal-multilevel insulator of the present invention-metal capacitor specifically comprises the following steps:
Step S1 a: substrate 1 is provided, and at substrate 1 deposition one deck the first low-k (low K value) dielectric layer 2, these the first low dielectric coefficient medium layer 2 surfaces comprise metal-oxide-metal (MOM) zone 21 and nonmetal-oxide-metal (non-MOM) zone 22;
Step S2: at surface deposition one deck silicon nitride layer 3 of the first low-dielectric constant layer 2, this silicon nitride layer 3 is included in the first silicon nitride layer 31, it is positioned at metal-oxide-metal (MOM) zone the 21 and second silicon nitride layer 32, and it is positioned at nonmetal-oxide-metal (non-MOM) zone.In this step, the mode that using plasma enhanced chemical vapor deposition method and oxygen-containing gas processing method loop, carry out the deposition of silicon nitride 3, i.e. using plasma enhanced chemical vapor deposition method deposited silicon nitride 3 at first, then adopt the oxygen-containing gas processing method to process, and then carry out plasma enhanced chemical vapor deposition method deposited silicon nitride 3, thereafter, carrying out oxygen-containing gas processes again, so loop, until reach needed silicon nitride layer 3, silicon nitride layer 3 by in plasma reaction chamber by silane and ammonia, and with N
2As being written into gas, react the generation silicon nitride, form this silicon nitride layer 3.
In the oxygen-containing gas processing method, oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide, and the gas flow that oxygen-containing gas is processed is 2000 to 6000sccm, and treatment temperature is 300 ℃ to 600 ℃.
After deposited silicon nitride layer 3, can utilize chemical mechanical milling tech, remove unnecessary silicon nitride.
Step S3: etching is removed the second silicon nitride layer 32, exposes the first dielectric coefficient medium layer 22 that is positioned at nonmetal-oxide-metal (non-MOM) zone;
Step S4: above nonmetal-oxide-metallic region, namely above this first dielectric coefficient medium layer 22, deposit again one deck the second low dielectric coefficient medium layer 4;
Step S5: according to the figure of MOM capacitor, etching the first silicon nitride layer 31, in the first silicon nitride 31, form the first metallic channel 311, this first metallic channel 311 can for a plurality of all with the metallic channel that is arranged in this first silicon nitride layer 31, this step also comprises in the horizontal direction attenuate the first silicon nitride layer 31, namely reduces the width of the first silicon nitride layer 31 between this first metallic channel 311.
Step S6: the mode that adopts deposition step and oxygen-containing gas treatment step to loop, at the first silicon nitride layer 31 surface deposition one deck silicon oxide layers 5, in this step, its reacting gas of plasma enhanced chemical vapor deposition comprises silane and nitrous oxide, wherein, in carrying out technical process, the flow of silane is at 25sccm to 600sccm, the flow of nitrous oxide is 9000sccm-20000sccm, and the span of the ratio of the flow of silane and described nitrous oxide is 1:15 to 1:800, rate of film build is 10 nm/minute to 5000 nm/minute, and the deposit thickness of each silica is 1 nanometer to 10 nanometer.
In the oxygen-containing gas processing method, oxygen-containing gas comprises gas flow that nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide oxygen-containing gas process 2000 to 6000sccm, and treatment temperature is 300 ℃ to 600 ℃.
By the method, at the surface deposition of each direction of ground floor nitration case 31 one deck silicon oxide layer 5, then, etching oxidation silicon, thereby remove silica on the horizontal direction, form silica-silicon-nitride and silicon oxide structure;
Step S6: etching the second low dielectric coefficient medium layer 4 forms the second metallic channel 41 at the second low dielectric coefficient medium layer 4;
Step S7: carry out metal filled technique to the first metallic channel 311 and the second metallic channel 41, fill metal 6 to the first metallic channel 311 and the second metallic channel 41.
In this step, diffusion impervious layer deposition, the copper that carries out comprising in the metal filled processing step copper that carries out respectively copper wiring technique among the first metallic channel 311 and the second metallic channel 41 is electroplated, copper metal layer chemical mechanical milling tech step, thereby has finished the making of copper-connection and metal-multilevel insulator-metal (MOM) capacitor.
More than specific embodiments of the invention are described in detail, but the present invention is not restricted to specific embodiment described above, it is just as example.To those skilled in the art, any equivalent modifications and alternative also all among category of the present invention.Therefore, not breaking away from impartial conversion and the modification of having done under the spirit and scope of the present invention, all should contain within the scope of the invention.
Claims (8)
1. the manufacture method of metal-multilevel insulator-metal capacitor is characterized in that, may further comprise the steps:
One substrate is provided;
At described substrate deposition one deck the first low dielectric coefficient medium layer, described the first low dielectric coefficient medium layer comprises that metal-oxide-metal is made the zone and nonmetal-oxide-metal is made the zone;
The mode that adopts deposition step and oxygen-containing gas treatment step to loop, at described the first low dielectric coefficient medium layer deposition one deck silicon nitride layer, described silicon nitride layer comprises first silicon nitride layer in metal-oxide-metal zone and the second silicon nitride layer of nonmetal-oxide-metallic region;
Etching is removed described the second silicon nitride layer;
Described nonmetal-oxide-metallic region above deposit again one deck the second low dielectric coefficient medium layer;
Carry out lithographic patterning technique at described the first silicon nitride layer, in described the first silicon nitride layer, form the first metallic channel, and described the first silicon nitride layer is carried out etching, in the horizontal direction described the first silicon nitride layer of attenuate;
The mode that adopts deposition step and oxygen-containing gas treatment step to loop, at described first silicon nitride layer surface deposition one deck silicon oxide layer, and the described silicon oxide layer of etching is removed the silica on the horizontal direction, formation silica-silicon-nitride and silicon oxide structure;
Described the second low dielectric coefficient medium layer of etching forms the second metallic channel;
Carry out metal filled technique to described the first metallic channel and described the second metallic channel.
2. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor is characterized in that, described oxygen-containing gas comprises nitric oxide, nitrous oxide, carbon monoxide and carbon dioxide.
3. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor, it is characterized in that, in the endless form of described deposition step and oxygen-containing gas treatment step, the gas flow that oxygen-containing gas is processed is 2000 to 6000sccm, and treatment temperature is 300 ℃ to 600 ℃.
4. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor, it is characterized in that, in the endless form of described deposition step and oxygen-containing gas treatment step, described deposition step using plasma enhanced chemical vapor deposition processes.
5. the manufacture method of metal-multilevel insulator as claimed in claim 4-metal capacitor, it is characterized in that, in the using plasma enhanced chemical vapor deposition processes of the step of cvd silicon oxide, its reacting gas comprises silane and nitrous oxide, wherein, the flow of described silane is at 25sccm to 600sccm, the flow of described nitrous oxide is 9000sccm-20000sccm, the span of the ratio of the flow of described silane and described nitrous oxide is 1:15 to 1:800, and rate of film build is 10 nm/minute to 5000 nm/minute.
6. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor, it is characterized in that, in the step of deposited silicon nitride, the using plasma enhanced chemical vapor deposition processes, its reacting gas comprises silane and ammonia, reacts the generation silicon nitride film in plasma environment.
7. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor is characterized in that, in the endless form of described deposition step and oxygen-containing gas treatment step, the deposit thickness of each silicon nitride or silica is 1 nanometer to 10 nanometer.
8. the manufacture method of metal-multilevel insulator as claimed in claim 1-metal capacitor, it is characterized in that, carry out comprising in the metal filled processing step diffusion impervious layer deposition, copper plating, the copper metal layer chemical mechanical milling tech step of the copper that carries out copper wiring technique.
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| CN2012101108669A CN102856161A (en) | 2012-04-17 | 2012-04-17 | Production method for metal-oxide-metal capacitor (MOM) |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050132549A1 (en) * | 2001-11-16 | 2005-06-23 | Wong-Cheng Shih | Method for making metal capacitors with low leakage currents for mixed-signal devices |
| US20050221575A1 (en) * | 2002-12-02 | 2005-10-06 | Taiwan Semiconductor Manufacturing Company | Novel method to fabricate high reliable metal capacitor within copper back-end process |
| CN102394216A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Metal-oxide-metal capacitor manufacturing method |
| CN102394217A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Manufacturing method of metal- silicon nitride-metal capacitor |
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- 2012-04-17 CN CN2012101108669A patent/CN102856161A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050132549A1 (en) * | 2001-11-16 | 2005-06-23 | Wong-Cheng Shih | Method for making metal capacitors with low leakage currents for mixed-signal devices |
| US20050221575A1 (en) * | 2002-12-02 | 2005-10-06 | Taiwan Semiconductor Manufacturing Company | Novel method to fabricate high reliable metal capacitor within copper back-end process |
| CN102394216A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Metal-oxide-metal capacitor manufacturing method |
| CN102394217A (en) * | 2011-11-30 | 2012-03-28 | 上海华力微电子有限公司 | Manufacturing method of metal- silicon nitride-metal capacitor |
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Application publication date: 20130102 |