CN103072939B - A kind of Temperature-controlldeep deep silicon etching method - Google Patents

A kind of Temperature-controlldeep deep silicon etching method Download PDF

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Publication number
CN103072939B
CN103072939B CN201310009037.6A CN201310009037A CN103072939B CN 103072939 B CN103072939 B CN 103072939B CN 201310009037 A CN201310009037 A CN 201310009037A CN 103072939 B CN103072939 B CN 103072939B
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etching
machine
photoresist
temperature
isotropism
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CN103072939A (en
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林红
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Beijing Jinshengweina Technology Co., Ltd.
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BEIJING JINSHENGWEINA TECHNOLOGY Co Ltd
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Abstract

The present invention provides a kind of Temperature-controlldeep deep silicon etching method, and for sense coupling machine, the method includes: positive photoresist graphic making step, anisotropic etching step, isotropism depositing step, removes photoresist step;It is characterized in that, the method uses and cools down and use cryogenic liquid as circulating cooling liquid in the many places of described etching machine, thus obtain low temperature, and described anisotropic etching step and isotropism depositing step alternating cyclical etch are to complete under the cryogenic conditions of the plasma etching room of etching machine.The invention has the beneficial effects as follows that Temperature-controlldeep deep silicon etching method makes the anisotropic etching step in alternately etching extend, isotropism depositing step shortens, thus improves etch rate, and vertical etch is easy to control, and makes the selection ratio of photoresist be greatly improved.

Description

A kind of Temperature-controlldeep deep silicon etching method
Technical field
The invention belongs to micro-nano technology field, particularly a kind of deep silicon etching method making MEMS (MEMS).
Background technology
Micro-nano graph process technology, is the important means making all chips, so countries in the world all take much count of its application and development.In recent years, along with the upgrading of each electronic product, micro-nano graph process technology is proposed requirements at the higher level, particularly the live width of dry etching and the degree of depth are proposed the requirement (grade) of renewal.The deepest silicon etching method has two kinds: 1) etch and protect cycle alternation to carry out with sidewall, the purpose of deep silicon etching is realized through repeatedly cycle alternation etching.This deep silicon etching method Application comparison is extensive.Shortcoming: sidewall and etching surface have decorative pattern rough, etches and protects verticality to be difficult to control to, protect excessive, and etch rate is slack-off, protects the most laterally etched perpendicularity bad.2) freeze-etching method, the gas using etching is SF6, silicon chip back side liquid nitrogen cools down, and only etches a step and is achieved that vertical deep silicon etching.The advantage of this method is: vertical etch is easy to control, and etch rate also ratio is comparatively fast.Shortcoming is: cooling down comparatively laborious, cost is higher, so the most this method does not use.
Summary of the invention
The present invention is in order to improve etch rate and effect, and reduces cost, it is provided that a kind of Temperature-controlldeep deep silicon etching method.
The technical solution used in the present invention is to provide a kind of Temperature-controlldeep deep silicon etching method, and for sense coupling machine, the method includes: positive photoresist graphic making step, anisotropic etching step, isotropism depositing step, removes photoresist step;It is characterized in that, the method uses and cools down and use cryogenic liquid as circulating cooling liquid in the many places of described etching machine, thus obtain low temperature, and described anisotropic etching step and isotropism depositing step alternating cyclical etch are to complete under the cryogenic conditions of the plasma etching room of etching machine.
Further, the low temperature of described etching chamber is 0-7 DEG C.
Further, described etching machine includes: main frame, radio-frequency power supply cabinet, electrical control cubicles, gas holder, circulating cooling machine, computer and operating board;Wherein the core component of main frame is plasma source, and it is formed one by plane variable-pitch propeller type inductance coil and high-frequency ceramic medium, and described ceramic dielectric is presented herein below plasma etching room;Between inductively coupled plasma electrode (upper electrode) and radio-frequency electrode (bottom electrode), annular gas flow allotter is installed.
Further, the many places cooling of described etching machine is to arrange cooling line at radio-frequency electrode, etching chamber sidewall, etching gas path pipe.
Further, circulate in described cooling line is cryogenic liquid;Described cryogenic liquid uses ethylene glycol.
Further, between silicon chip and radio-frequency electrode, also put one layer of graphite felt and be beneficial to heat conduction.
Further, the comprising the concrete steps that of described method:
(1) positive photoresist graphic making step:
Be on 400u2 inch silicon wafer at thickness, coat the photoresist of 2 10u, expose, develop after make required figure on a photoresist.
(2) anisotropic etching step:
The described etching chamber that the silicon chip carrying out figure is put on described sense coupling machine alternately etches, and wherein temperature control etching chamber process conditions are temperature: 13 DEG C, pressure: 5 6Pa;Etching gas SF6Flow 130 150sccm, upper electrode power 800 900W, lower electrode power 40 50W, etch period 10 14 seconds;
(3) isotropism depositing step:
Deposited gas C4F8And CHF3, C4F8Flow: 80 90sccm, CHF3Flow: 5 15sccm;Upper electrode power 500 700W, lower electrode power 0 10W, deposition time 8 10 seconds;
Described etch step and depositing step alternate cycles are carried out, and the time is 18 24 seconds, alternate cycles 30 150 times.
(4) photoresist step is removed:
The silicon chip that will have etched, is placed on ultrasonic waves for cleaning in acetone soln, and Wafer Cleaning is clean, dries.
The invention has the beneficial effects as follows that Temperature-controlldeep deep silicon etching method makes the anisotropic etching step in alternately etching extend, isotropism depositing step shortens, thus improves etch rate, and vertical etch is easy to control, and makes the selection ratio of photoresist be greatly improved.
Accompanying drawing explanation
Fig. 1 is the process chart of the present invention;
Fig. 2 is the temperature control etching chamber schematic diagram of the present invention;
Fig. 3 is the shape appearance figure after the deep silicon etching of the present invention;
Fig. 4 is the verticality of side wall after etching in the present invention and smoothness schematic diagram.
Detailed description of the invention
The method of the present invention uses sense coupling machine to complete, and this etching machine is that domestic ICP equipment enters production line operation the earliest.This etching machine structure includes: main frame, radio-frequency power supply cabinet, electrical control cubicles, gas holder, circulating cooling machine, computer and operating board.Wherein the core component of main frame is plasma source, and it is formed one by plane variable-pitch propeller type inductance coil and high-frequency ceramic medium, and ceramic dielectric is presented herein below plasma etching room.The drum-shaped sidewall of described etching chamber has imbedded intensive cooling line.Etching chamber bottom is the radio-frequency electrode having imbedded cooling line, covers the graphite felt that one layer of heat conduction is good, constitute sample stage on radio-frequency electrode.
Between inductively coupled plasma electrode (upper electrode) and radio-frequency electrode (bottom electrode), annular gas flow allotter is installed.This machine simple in construction performance is excellent.
The technological process of the present invention includes: positive photoresist graphic making step, anisotropic etching step, isotropism depositing step, removes photoresist step.
Wherein anisotropic etching step and isotropism depositing step alternating cyclical etch are the technique completed under the cryogenic conditions of temperature control etching chamber.Cooling line has been imbedded inside temperature control etching chamber sidewall and bottom electrode, the etching gas circuit outer wall outside etching chamber, also it is wrapped cooling line.
In above cooling line, circulation is not water, but cryogenic liquid (ethylene glycol), its feature is not freeze below 0 DEG C, so can obtain low temperature (0 7 DEG C).Its participation makes the anisotropic etching step in alternately etching extend, and isotropism depositing step shortens, thus improves etch rate, and vertical etch is easy to control, and makes the selection ratio of photoresist be greatly improved.
It addition, in order to solve to be etched on silicon chip the heat accumulation produced for a long time, put one layer of graphite felt (Heat Conduction Material) between silicon chip and radio-frequency electrode (bottom electrode).Present invention process is simple and easy to control.Etching surface and sidewall flat smooth.
[embodiment 1]
This embodiment comprises the following steps:
(1) photoetching offset plate figure making step:
It is on 400u2 inch silicon wafer at thickness, coats photoresist, thickness: 2u, with photo-etching machine exposal, development, make required figure on a photoresist;
(2) anisotropic etching step:
The temperature control etching chamber that the silicon chip carrying out figure is put on described sense coupling machine alternately etches, and etching chamber temperature is 2 DEG C, and pressure is 5Pa.Process conditions: upper electrode power 850W, lower electrode power 40W, etching gas SF6Flow 140sccm, etch period 10 seconds.
(3) isotropic plasma depositing step:
This step is used for making sidewall protecting film, its process conditions: deposited gas C4F8Flow be 85sccm and CHF3Flow be 5sccm, upper electrode power 600W, lower electrode power 0W, deposition time 8 seconds.
Step (2) and (3) alternating cyclical etch, alternate cycles 34 times, etching depth 22u;
This embodiment etches without removing photoresist, it is therefore an objective to observe the pattern of glue.As shown in Figure 3;
[embodiment 2], this embodiment comprises the following steps:
(1) photoetching offset plate figure making step:
It is on 400u2 inch silicon wafer at thickness, coats photoresist, thickness: 3.5u, with photo-etching machine exposal, glue is made required figure;
(2) anisotropic etching step:
The temperature control etching chamber that the silicon chip carrying out figure is put on sense coupling machine alternately etches, and etches indoor temperature 2 DEG C, pressure 5.5Pa.Process conditions: upper electrode power 900W, lower electrode power 45W, etching gas SF6, flow 150sccm, etch period 14 seconds.
(3) isotropic plasma deposition step:
This step is used for making sidewall protecting film, its process conditions deposited gas C4F8And CHF3Flow be respectively 80sccm and 10sccm, upper electrode power 700W, lower electrode power 0W, deposition time 10 seconds.
Step (2) and (3) alternating cyclical etch, alternate cycles 125 times.
(4) photoresist step is removed:
The silicon chip alternately etched, putting in acetone soln, ultrasound wave removes photoresist, and Wafer Cleaning is clean, dries.
Measuring etching depth with step instrument is 105u, observes section pattern with SEM.As shown in Figure 4.
Due to the fact that and take above technical scheme, it has the advantage that 1) deep silicon etching perpendicularity is good;2) deep silicon vertical etch control accuracy is high;3) deep silicon vertical etch selects ratio high;4) deep silicon vertical etch depth-to-width ratio is high;5) being applied to home equipment, cost performance is higher.

Claims (4)

1. a Temperature-controlldeep deep silicon etching method, for sense coupling machine, the method includes: positive photoresist graphic making step, anisotropic etching step, isotropism depositing step, removes photoresist step;It is characterized in that, the method uses and cools down and use cryogenic liquid as circulating cooling liquid in the many places of described etching machine, thus obtain low temperature, and described anisotropic etching step and isotropism depositing step alternating cyclical etch are to complete under the cryogenic conditions of the plasma etching room of etching machine;
Described etching machine includes: main frame, radio-frequency power supply cabinet, electrical control cubicles, gas holder, circulating cooling machine, computer and operating board;Wherein the core component of main frame is plasma source, and it is formed one by plane variable-pitch propeller type inductance coil and high-frequency ceramic medium, and described ceramic dielectric is presented herein below plasma etching room;Installing annular gas flow allotter between inductively coupled plasma electrode and radio-frequency electrode, described inductively coupled plasma electrode is upper electrode, and described radio-frequency electrode is bottom electrode;
The many places cooling of described etching machine is to arrange cooling line at radio-frequency electrode, etching chamber sidewall, etching gas path pipe;
In described cooling line, circulation is cryogenic liquid;
Described cryogenic liquid uses ethylene glycol.
Method the most according to claim 1, it is characterised in that the low temperature of described etching chamber is 0-7 DEG C.
Method the most according to claim 1, it is characterised in that also put one layer of graphite felt between silicon chip and radio-frequency electrode and be beneficial to heat conduction.
Method the most according to claim 1, it is characterised in that comprising the concrete steps that of described method:
(1) positive photoresist graphic making step:
Be on 400um2 inch silicon wafer at thickness, coat the photoresist of 2 10um, expose, develop after make required figure on a photoresist;
(2) anisotropic etching step:
The described etching chamber that the silicon chip carrying out figure is put on described sense coupling machine alternately etches, and wherein temperature control etching chamber process conditions are temperature: 13 DEG C, pressure: 5 6Pa;Etching gas SF6Flow 130 150sccm, upper electrode power 800 900W, lower electrode power 40 50W, etch period 10 14 seconds;
(3) isotropism depositing step:
Deposited gas C4F8And CHF3, C4F8Flow: 80 90sccm, CHF3Flow: 5 15sccm;Upper electrode power 500 700W, lower electrode power 0 10W, deposition time 8 10 seconds;Described etch step and depositing step alternate cycles are carried out, and the time is 18 24 seconds, alternate cycles 30 150 times;
(4) photoresist step is removed:
The silicon chip that will have etched, is placed on ultrasonic waves for cleaning in acetone soln, and Wafer Cleaning is clean, dries.
CN201310009037.6A 2013-01-10 2013-01-10 A kind of Temperature-controlldeep deep silicon etching method Active CN103072939B (en)

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CN104347390B (en) * 2013-07-31 2017-06-27 中微半导体设备(上海)有限公司 A kind of method of plasma etching substrate
CN104465336B (en) * 2014-12-02 2017-05-17 国家纳米科学中心 Low-frequency BOSCH deep silicon etching method
CN105399045B (en) * 2015-10-27 2018-08-07 国家纳米科学中心 A method of preparing black silicon using photoresist and low-temperature plasma etching

Citations (5)

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US5501893A (en) * 1992-12-05 1996-03-26 Robert Bosch Gmbh Method of anisotropically etching silicon
US6063233A (en) * 1991-06-27 2000-05-16 Applied Materials, Inc. Thermal control apparatus for inductively coupled RF plasma reactor having an overhead solenoidal antenna
CN1551302A (en) * 2003-05-13 2004-12-01 ���������ƴ���ʽ���� Upper electrode and plasma processing device
CN101572231A (en) * 2009-06-03 2009-11-04 南京航空航天大学 Method and device for forming vertical through hole in semiconductor
CN102431960A (en) * 2011-12-07 2012-05-02 华中科技大学 Silicon through hole etching method

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Publication number Priority date Publication date Assignee Title
JP5539436B2 (en) * 2012-04-26 2014-07-02 パナソニック株式会社 Plasma processing apparatus and plasma processing method

Patent Citations (5)

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US6063233A (en) * 1991-06-27 2000-05-16 Applied Materials, Inc. Thermal control apparatus for inductively coupled RF plasma reactor having an overhead solenoidal antenna
US5501893A (en) * 1992-12-05 1996-03-26 Robert Bosch Gmbh Method of anisotropically etching silicon
CN1551302A (en) * 2003-05-13 2004-12-01 ���������ƴ���ʽ���� Upper electrode and plasma processing device
CN101572231A (en) * 2009-06-03 2009-11-04 南京航空航天大学 Method and device for forming vertical through hole in semiconductor
CN102431960A (en) * 2011-12-07 2012-05-02 华中科技大学 Silicon through hole etching method

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