CN103280508B - A kind of wafer scale LED encapsulation method - Google Patents
A kind of wafer scale LED encapsulation method Download PDFInfo
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- CN103280508B CN103280508B CN201310197548.5A CN201310197548A CN103280508B CN 103280508 B CN103280508 B CN 103280508B CN 201310197548 A CN201310197548 A CN 201310197548A CN 103280508 B CN103280508 B CN 103280508B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
Abstract
The present invention relates to a kind of wafer scale LED encapsulation method, belong to technical field of semiconductor encapsulation.Its method comprises step: provide the LED chip with positive and negative electrode (110) (100); The silicon body (200) that a surface arranges silicon-base cavity (210), another surface arranges silicon through hole (220) is provided; Conductive electrode (300) is set in described silicon-base cavity (210); By LED chip (100) upside-down mounting on conductive electrode (300); The interior filling photoluminescent layers (400) of described silicon-base cavity (210), described photoluminescent layers (400) covers the exiting surface of LED chip (100); Single wafer scale LED encapsulation structure is formed by the method for wafer cutting and separating.The invention provides that a kind of thermal resistance is low, perfect heat-dissipating, improving extraction efficiency, encapsulation overhead are low, effectively can widen the wafer scale LED encapsulation method of the application of LED.
Description
Technical field
The present invention relates to a kind of wafer scale LED encapsulation method, belong to technical field of semiconductor encapsulation.
Background technology
The sound day of entire society to energy-saving and cost-reducing appealing is high, and so-called " ten ten thousand, cities " engineering is also being carried out by country, its object is to, by advancing LED illumination technology, effectively reduce power consumption.But compared with existing fluorescent tube, the packaging cost of current LED itself carries out energy-saving and cost-reducing biggest obstacle, its price be the 2-3 of fluorescent tube doubly, thus become the object that industry is chased with the LED illumination technology of fluorescent tube quite or more low cost.
Current LED is mainly carried out with single form, is about to the LED chip after cutting by a mounted substrate (as metallic support, lead frame, ceramic substrate, metal substrate), then by carry out lead-in wire interconnected, by a some glue; Because nearly all work step is all carry out with single, production efficiency is lower, and production cost is higher; Meanwhile, there is the problem that radiating control difficulty, light efficiency are not high, this seriously constrains the application of LED.
Summary of the invention
The object of the invention is to the deficiency overcoming current encapsulation method, provide that a kind of thermal resistance is low, perfect heat-dissipating, improving extraction efficiency, encapsulation overhead are low, effectively can widen the wafer scale LED encapsulation method of the application of LED.
The object of the present invention is achieved like this: a kind of wafer scale LED encapsulation method, comprises step:
The LED chip with positive and negative electrode is provided;
Silicon body is provided, a surface of described silicon body arranges silicon-base cavity, described silicon-base cavity inwall and the some layer insulatings of bottom deposit, the formation reflector, surface of described insulating barrier, reflector bottom described silicon-base cavity is formed reflector opening, arrange conductive electrode in described silicon-base cavity, described conductive electrode forms in the opening of reflector;
There is provided carrier disk, bonding is carried out by bonding material in the above-mentioned surface of described carrier disk and silicon body;
Another surface of described silicon-base cavity is by grinding, etching method forms several silicon through holes, depositing several layers insulating protective layer in described silicon through hole, described insulating protective layer covers the above-mentioned surface of silicon body simultaneously, utilize photoetching, development, the methods such as etching and/or laser drilling are by the insulation protection layer open of silicon via top, expose conductive electrode, covering metal line layer on insulating protective layer, described metallic circuit layer also covers the above-mentioned surface of the conductive electrode exposed, and disconnect in the corresponding below in the both positive and negative polarity gap of electrode, by photoetching process at metallic circuit layer surface-coated circuit sealer, and optionally form circuit sealer opening,
By disk solution bonding technology carrier disk from silicon body sur-face peeling;
By LED chip upside-down mounting in silicon-base cavity, described electrode is connected with conductive electrode, fills photoluminescent layers in described silicon-base cavity, and described photoluminescent layers covers the exiting surface of LED chip, and the exiting surface of described photoluminescent layers is plane, cambered surface or sphere;
Single wafer scale LED encapsulation structure is formed by the method for wafer cutting and separating.
Further, described conductive electrode is formed in silicon-base cavity by sputtering, photoetching and/or electroplating technology.
Further, described conductive electrode does not contact with reflector.
Further, described silicon-base cavity is formed by photoetching process and/or etching process.
Further, described insulating barrier adopts gluing or plasma enhanced chemical vapor deposition method to be deposited on silicon-base cavity inwall and bottom.
Further, described reflector adopts magnetron sputtering or electron beam evaporation method to be formed on insulating barrier.
Further, described reflector opening is by reflector bottom silicon-base cavity of the technique of photoetching and/or corrosion is formed.
Further, described insulating protective layer adopts gluing or plasma enhanced chemical vapor deposition method to be deposited on another surface of silicon body.
Further, described metallic circuit layer is covered on insulating protective layer by sputtering, photoetching and/or electric plating method.
Further, described upside-down mounting mode is the mode of upside-down mounting backflow or thermocompression bonding.
The invention has the beneficial effects as follows:
The positive and negative electrode of LED chip of the present invention passes through conductive electrode upside-down mounting in silicon-base cavity, the metallic circuit layer of filling in the silicon through hole that the face battle array communicated with conductive electrode is arranged, increase area of dissipation, increase heat dissipation channel, reduce the thermal resistance of LED overall package, improve the radiating rate of LED chip, improve the reliability of product; The photoluminescent layers of the use resin-encapsulated of the top setting of LED chip, contributes to the light extraction efficiency improving LED chip, the especially photoluminescent layers of its spherical shape, the also beam angle of extending LED; Main technique of the present invention all realizes in wafer scale mode, and therefore production cost is lower, and package dimension can be less, thus effectively can widen the application of LED.
Accompanying drawing explanation
Fig. 1 is the flow chart of a kind of wafer scale LED encapsulation method of the present invention.
Fig. 2 to Fig. 9 is the schematic diagram of a kind of wafer scale LED encapsulation method of one embodiment of the invention.
In figure:
LED chip 100
Electrode 110
Silicon body 200
Silicon-base cavity 210
Insulating barrier 211
Reflector 212
Reflector opening 213
Silicon through hole 220
Insulating protective layer 221
Metallic circuit layer 222
Circuit sealer 223
Circuit sealer opening 224
Conductive electrode 300
Photoluminescent layers 400
Carrier disk T1
Bonding material T2.
Embodiment
Be a kind of wafer scale LED encapsulation method of the present invention see Fig. 1, Fig. 1, its technological process is as follows:
Perform step S101: provide the LED chip 100 that positive and negative electrode 110 is set;
Perform step S102: provide silicon body 200, a surface of silicon body 200 arranges silicon-base cavity 210, arranges several conductive electrodes 300 in silicon-base cavity 210, and another surface of silicon-base cavity 210 arranges silicon through hole 220;
Perform step S103: by LED chip 100 upside-down mounting on conductive electrode 300;
Perform step S104: fill photoluminescent layers 400 in silicon-base cavity 210, photoluminescent layers 400 covers the exiting surface of LED chip 100;
Perform step S105: form single wafer scale LED encapsulation structure by the method for wafer cutting and separating.
The embodiment of a kind of wafer scale LED encapsulation method of the present invention
As shown in Figure 2, silicon body 200 forms by photoetching and/or etching technics the silicon-base cavity 210 that several LED chips 100 are enough placed in space, adopt gluing or plasma enhanced chemical vapor deposition method depositing several layers insulating barrier 211 at silicon-base cavity 210 inwall and bottom, the material of insulating barrier 211 can be the inorganic insulating material such as silica, silicon nitride or the organic insulating material such as silica gel, organic resin.
As shown in Figure 3, magnetron sputtering or electron beam evaporation method is adopted to form reflector 212 at silicon-base cavity 210 inwall, open reflector opening 213 by the technique of photoetching and/or corrosion in the bottom of silicon-base cavity 210 again, and form conductive electrode 300 by sputtering, photoetching and/or electroplating technology in reflector opening 213.The material of conductive electrode 300 is copper/tin, gold/tin etc., and its shape, large I require to determine according to electrode 110 situation of LED chip 100 or actual package.For improving reflectivity, material can be adopted to be the metallic reflector of the metallic reflective material such as aluminium, titanium or silver.When adopting metallic reflector, for preventing LED chip 100 short circuit, conductive electrode 300 does not contact with metallic reflector, can set up error-proof structure if desired.
As shown in Figure 4, adopt the method for wafer bonding, silicon body 200 and carrier disk T1 bonding material T2 are carried out interim bonding.Carrier disk T1 can be transparent glass or common silicon chip; Bonding material T2 can be organic gel class, also can be metal.
As shown in Figure 5, adopt grinding, etching method at silicon body 200 back side, several silicon through holes 220 are offered in the place of corresponding conductive electrode 300, and the shape of silicon through hole 220 is straight hole, inclined hole or the hole of falling Y shape, illustrates in figure with inclined hole.The top of silicon through hole 220 is the lower surface of conductive electrode 300, and described silicon through hole 220 battle arrays are arranged and are covered with the back side of the silicon body 200 corresponding to whole conductive electrode 300; Adopt gluing or plasma enhanced chemical vapor deposition method deposition insulating protective layer 221 at silicon through hole 220 sidewall and silicon body 200 back side, the material of insulating protective layer 221 can be the inorganic insulating material such as silica, silicon nitride or the organic insulating material such as silica gel, organic resin.
As shown in Figure 6; utilize photoetching development, the top insulating protective layer 221 of silicon through hole 220 opens by the method for etching or laser drilling; expose conductive electrode 300; and then on insulating protective layer 221, cover single or multiple lift metallic circuit layer 222 with sputtering, photoetching and/or electric plating method; described metallic circuit layer 222 also covers the surface of the conductive electrode 300 exposed; and disconnect in the below in the both positive and negative polarity gap of electrode 110, to avoid positive and negative electrode 110 short circuit of LED chip 100.The telecommunications of the LED chip 100 on conductive electrode 300 breath is transferred to the back side of silicon body 200 by metallic circuit layer 222.
As shown in Figure 7, by photoetching process at metallic circuit layer 222 surface-coated circuit sealer 223, and optionally form circuit sealer opening 224.Circuit sealer 223 covers all silicon through holes 220 and peripheral space thereof, and circuit sealer opening 224 exposes the signal output part of metallic circuit layer 222, and the mode can selected solder paste application according to attachment process or plant ball realizes welding.Described metallic circuit layer 222 is single or multiple lift metal, and its material is titanium/copper, titanium tungsten/copper, titanium tungsten/gold etc.
As shown in Figure 8, by disk solution bonding technology carrier disk T1 from silicon body 200 sur-face peeling; Adopt the mode of upside-down mounting backflow or thermocompression bonding that the electrode 110 on LED chip 100 is welded together with conductive electrode 300.
As shown in Figure 9, adopt mould whole disk to be carried out to the technique of disk injection moulding, in silicon-base cavity 210, fill photoluminescent layers 400, photoluminescent layers 400 covers the exiting surface of LED chip 100, and the exiting surface of photoluminescent layers 400 is plane, cambered surface or sphere.Described photoluminescent layers 400 is the mixed layer of organic silica gel and luminescence generated by light thing, and concrete component is debugged according to the bright dipping after chip and encapsulation, and object improves the light emission rate of LED.Wherein, the especially beam angle of the photoluminescent layers 400 of its convex spherical shape also extending LED, as shown in FIG..Finally, single wafer scale LED encapsulation structure is formed by the method for wafer cutting and separating.
The main technique of a kind of wafer scale LED encapsulation method proposed by the invention all realizes in wafer scale mode, and therefore production cost is lower, and package dimension can be less, thus effectively can widen the application of LED.
Claims (10)
1. a wafer scale LED encapsulation method, comprises step:
The LED chip with positive and negative electrode (110) (100) is provided;
Silicon body (200) is provided, a surface of described silicon body (200) arranges silicon-base cavity (210), described silicon-base cavity (210) inwall and the some layer insulatings of bottom deposit (211), the formation reflector, surface (212) of described insulating barrier (211), the reflector (212) of described silicon-base cavity (210) bottom is upper forms reflector opening (213), arrange conductive electrode (300) in described silicon-base cavity (210), described conductive electrode (300) forms in reflector opening (213);
There is provided carrier disk (T1), described carrier disk (T1) carries out bonding with a surface of described silicon body (200) by bonding material (T2);
Another surface of described silicon-base cavity (210) is by grinding, etching method forms several silicon through holes (220), the interior depositing several layers insulating protective layer (221) of described silicon through hole (220), described insulating protective layer (221) covers another surface of described silicon-base cavity (210) simultaneously, utilize photoetching, development, the insulating protective layer (221) at silicon through hole (220) top is opened by the methods such as etching and/or laser drilling, expose conductive electrode (300), at the upper covering metal line layer (222) of insulating protective layer (221), described metallic circuit layer (222) also covers the surface of the above-mentioned conductive electrode (300) exposed, and disconnect in the corresponding below in the both positive and negative polarity gap of electrode (110), by photoetching process at metallic circuit layer (222) surface-coated circuit sealer (223), and optionally form circuit sealer opening (224),
By disk solution bonding technology carrier disk (T1) from silicon body (200) sur-face peeling;
By LED chip (100) upside-down mounting in silicon-base cavity (210), described electrode (110) is connected with conductive electrode (300), photoluminescent layers (400) is filled in described silicon-base cavity (210), described photoluminescent layers (400) covers the exiting surface of LED chip (100), and the exiting surface of described photoluminescent layers (400) is plane, cambered surface or sphere;
Single wafer scale LED encapsulation structure is formed by the method for wafer cutting and separating.
2. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described conductive electrode (300) is formed in silicon-base cavity (210) by sputtering, photoetching and/or electroplating technology.
3. a kind of wafer scale LED encapsulation method according to claim 1 and 2, is characterized in that: described conductive electrode (300) does not contact with reflector (212).
4. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described silicon-base cavity (210) is formed by photoetching process and/or etching process.
5. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described insulating barrier (211) adopts gluing or plasma enhanced chemical vapor deposition method to be deposited on silicon-base cavity (210) inwall and bottom.
6. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described reflector (212) adopt magnetron sputtering or electron beam evaporation method to be formed on insulating barrier (211).
7. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described reflector opening (213) is above formed in the reflector (212) of silicon-base cavity (210) bottom by the technique of photoetching and/or corrosion.
8. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described insulating protective layer (221) adopts gluing or plasma enhanced chemical vapor deposition method to be deposited on another surface of silicon body (200).
9. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described metallic circuit layer (222) is covered on insulating protective layer (221) by sputtering, photoetching and/or electric plating method.
10. a kind of wafer scale LED encapsulation method according to claim 1, is characterized in that: described upside-down mounting mode is the mode of upside-down mounting backflow or thermocompression bonding.
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| TW201607080A (en) * | 2014-08-08 | 2016-02-16 | 兆陽材料科技有限公司 | Method of encapsulating light emitting diodes |
| JP7266961B2 (en) * | 2015-12-31 | 2023-05-01 | 晶元光電股▲ふん▼有限公司 | light emitting device |
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| US6531328B1 (en) * | 2001-10-11 | 2003-03-11 | Solidlite Corporation | Packaging of light-emitting diode |
| CN101807657A (en) * | 2009-02-18 | 2010-08-18 | Lg伊诺特有限公司 | Light emitting device package and lighting system including the same |
| CN102403413A (en) * | 2010-09-19 | 2012-04-04 | 常州普美电子科技有限公司 | LED (Light-Emitting Diode) heat dissipation base plate, LED packaging structure, and manufacturing method of LED heat dissipation base plate and LED packaging structure |
| CN102832331A (en) * | 2012-08-24 | 2012-12-19 | 江阴长电先进封装有限公司 | Wafer level LED packaging structure |
| CN103022307A (en) * | 2012-12-27 | 2013-04-03 | 江阴长电先进封装有限公司 | Wafer-level LED packaging method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100719072B1 (en) * | 2005-10-28 | 2007-05-16 | (주) 아모센스 | Method of formating an incline of ceramic of a LED package |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6531328B1 (en) * | 2001-10-11 | 2003-03-11 | Solidlite Corporation | Packaging of light-emitting diode |
| CN101807657A (en) * | 2009-02-18 | 2010-08-18 | Lg伊诺特有限公司 | Light emitting device package and lighting system including the same |
| CN102403413A (en) * | 2010-09-19 | 2012-04-04 | 常州普美电子科技有限公司 | LED (Light-Emitting Diode) heat dissipation base plate, LED packaging structure, and manufacturing method of LED heat dissipation base plate and LED packaging structure |
| CN102832331A (en) * | 2012-08-24 | 2012-12-19 | 江阴长电先进封装有限公司 | Wafer level LED packaging structure |
| CN103022307A (en) * | 2012-12-27 | 2013-04-03 | 江阴长电先进封装有限公司 | Wafer-level LED packaging method |
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