CN103325729A - Copper interconnection structure manufacturing method - Google Patents
Copper interconnection structure manufacturing method Download PDFInfo
- Publication number
- CN103325729A CN103325729A CN2013102358948A CN201310235894A CN103325729A CN 103325729 A CN103325729 A CN 103325729A CN 2013102358948 A CN2013102358948 A CN 2013102358948A CN 201310235894 A CN201310235894 A CN 201310235894A CN 103325729 A CN103325729 A CN 103325729A
- Authority
- CN
- China
- Prior art keywords
- layer
- copper
- ruthenium
- alloy
- period
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention belongs to the process technical field of the micro-electronic field, and particularly relates to a structure, alloy and the manufacturing process of the structure and alloy, wherein copper interconnection of the structure and copper interconnection of the alloy are achieved through the atom layer depositing technology. According to the manufacturing process, the metal interconnection of the Ru/Cu alloy is achieved by the ALD technology on the basis of a traditional TaN/Ta diffusion impervious layer. The traditional TaN/Ta diffusion impervious layer is deposited on an etching impervious layer and low-dielectric-constant filler. The diffusion impervious layer is achieved through the ALD technology as well so as to ensure the continuity and the consistency of the technology process. By virtue of the advantages of the ALD technology, the manufacturing process can accurately control the component ratio of the Ru/Cu alloy, and meanwhile does not lose the effects of the Ru serving as the seed crystal layer of the Cu. The manufacturing process can ensure adhesion between metal and the diffusion impervious layer and adjust the component ratio of the alloy at will through the process parameters of atom layer deposition so as to achieve the proper performance.
Description
Technical field
The invention belongs to the deep submicron integrated circuit field of interconnect technologies, be specifically related to a kind of preparation method of copper interconnection structure.
Background technology
Atomic layer deposition (Atomic Layer Deposition, ALD) be a kind of advanced person's the chemical vapour deposition film preparation method from restraint-type, accurate film thickness control ability with atomic level is particularly suitable in deep submicron process realizing growth and the lamination of various materials.Atomic layer deposition both can have been realized the growth of diffusion impervious layer, also can realize the growth of metal alloy simultaneously, adopted this technology to be particluarly suitable for characteristic size less than in the interconnection process after 45 nm, and complicated substrat structure and laminated construction are accurately controlled.
In the deep submicron integrated circuit copper wiring technique, the diffusion of copper can cause the performance of semiconductor device impaired, therefore need play isolation and improve adhering effect at the outer parcel of copper interconnecting line one deck diffusion impervious layer.Adopt the double-decker of atomic layer deposition tantalum nitride/tantalum effectively to address this problem.Metal Ru is a kind of material that has very much prospect, not only can serve as diffusion impervious layer, can also guarantee and the good adhesion of metallic copper that metal Ru itself also is good conductor simultaneously.Mode by atomic layer deposition realizes that the alloy of metal Ru seed crystal and metal Ru-metallic copper can take full advantage of the various advantages of metal Ru, solves the technical barrier of deep-submicron copper-connection.
Summary of the invention
The object of the present invention is to provide a kind of preparation method of novel copper interconnection structure, be intended to solve the diffusion barrier problem of deep-submicron copper-connection.
The preparation method of copper interconnection structure provided by the invention, be on the basis on the double-decker barrier layer of tantalum nitride/tantalum, utilize diffusion barrier and the seed crystal characteristics of metal Ru, adopt atomic layer deposition technology deposit ruthenium/copper alloy, guarantee continuity and the consistency of all technologies simultaneously.Tantalum nitride/tantalum barrier layer thickness wherein is respectively 3-5 nm and 2-5 nm.The inculating crystal layer thickness of metal Ru is 5-10 nm.The calculating of component specifically can be represented by following formula group:
Q Total=
Q Cu+
Q Ru , (alloy total content)
At% (Cu)=
Q Cu /
Q Total , (the component percentages content of copper)
At% (Ru)=
Q Ru / Q Total , (the component percentages content of ruthenium)
Q Cu =GPC Cu *
n Cu*
N 1, (copper component computing formula)
Q Ru =GPC Ru * (
n Ru*
N 1+
N 2), (ruthenium component computing formula).
Wherein
Q TotalBe the total content of alloy,
Q CuBe the content of Cu in the alloy,
Q Ru Be the content of Ru in the alloy,
N 1Represent the period of ruthenium/copper composite bed,
N 2The period of ruthenium inculating crystal layer,
n CuWith
n RuRepresent copper layer period and ruthenium layer period in the composite bed respectively,
GPC CuWith
GPC RuRepresent the growth rate of copper and ruthenium respectively.As shown in Figure 5, by controlling the period of ruthenium/copper composite bed
N 1Period with the ruthenium inculating crystal layer
N 2, and copper layer period in each composite bed
n CuWith ruthenium layer period
n RuCan control the component of ruthenium/copper alloy, thereby change the performance of alloy.
Copper interconnection structure preparation method proposed by the invention, concrete steps are as follows:
(1) adopt RCA technology to clean monocrystalline substrate;
(2) on monocrystalline substrate, form one deck etching barrier layer, low dielectric constant insulation dielectric layer successively;
(3) define through hole, contact hole by photoetching process, etching technics, and the figure of metal valley;
(4) on the formed circular foundation of above-mentioned steps, utilize the thick tantalum of the thick tantalum nitride of atomic layer deposition technology growth 3-5 nm and 2-5 nm as diffusion impervious layer, regrowth one layer thickness is that the metal Ru of 5-10 nm is as the inculating crystal layer of ruthenium/copper alloy on diffusion impervious layer then;
(5) adopt CMP (Chemical Mechanical Polishing) process leveling wafer surface at last.
In the step (4), adopt the atomic layer deposition technology, by control reaction alternating sequence and period, component and the performance of control ruthenium/copper alloy are embodied in the period by control ruthenium/copper composite bed
N 1Period with the ruthenium inculating crystal layer
N 2, and copper layer period in each composite bed
n CuWith ruthenium layer period
n RuCan control the component of ruthenium/copper alloy, thereby change the performance of alloy.
Low dielectric constant insulation dielectric layer material can be SiO described in the step (2)
2, SiOF, SiCOH or porous SiC OH.
The present invention has the following advantages:
1, the structure that proposes of the present invention and the method advantage that taken full advantage of the atomic layer deposition technology to metal interconnected alloy, all adopts the atomic layer deposition technology from the diffusion impervious layer to the inculating crystal layer, guarantees continuity and the consistency of all technologies;
2, having utilized metal Ru both as inculating crystal layer, again as the barrier layer, also is a plurality of advantages of alloy conductor simultaneously;
3, the atomic layer deposition technology can realize that the accurate control of each layer thickness and the component of alloy accurately control.
Description of drawings
The sectional view of the groove that Fig. 1 etching forms.
Fig. 2 deposit tantalum nitride/tantalum is as the sectional view of diffusion impervious layer.
Sectional view after Fig. 3 deposited alloys.
Sectional view after Fig. 4 leveling.
Fig. 5 controls the component of thickness and the alloy of inculating crystal layer by the period of atomic layer deposition growth.
Number in the figure: 101 expression monocrystalline substrate, 102 expressions are the barrier layer, 103 expression medium with low dielectric constant, 104 expression tantalum nitride layers, 105 expression tantalum layers, 106 expression ruthenium/copper alloy layers.
Embodiment
Below with reference to accompanying drawing embodiments of the present invention are described.In the description of back, identical Reference numeral is represented identical assembly, and it is repeated in this description omission.
Fig. 1-Fig. 4 described the groove finished from etching to the barrier layer overall process to alloy-layer to leveling, be overall procedure of the present invention.Fig. 5 has represented to control by the period of atomic layer deposition growth the method for the component of inculating crystal layer and alloy, is committed step of the present invention.Obtain best diffusion barrier and interconnection performance, should control
N 2Make that the thickness of ruthenium inculating crystal layer is 5-10 nm, to guarantee enough adhesivenesses and certain diffusion barrier effect, control
n CuWith
n RuMake the interconnect resistivity minimum, electromigration effect is the most weak, control
N 1Realize filling fully the effect of metal valley.Particularly,
N 1,
N 2,
n CuWith
n RuVariation can realize by revising atomic layer deposition technology controlling and process program code, specifically comprise corresponding reaction cycle number, temperature and participate in reactive material.For the effect of the thickness, composite bed thickness and the filling groove that reach best inculating crystal layer, should by the suitable growth rate of preliminary test acquisition (
GPC), thereby determine
N 2Value.
Above-described embodiment is of the present invention giving an example, although disclose most preferred embodiment of the present invention and accompanying drawing for the purpose of illustration, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various replacements, variation and modification all are possible.Therefore, the present invention should not be limited to most preferred embodiment and the disclosed content of accompanying drawing.
Claims (4)
1.. the preparation method of a copper interconnection structure is characterized in that on the basis on the double-decker barrier layer of deposit tantalum nitride/tantalum, adopts atomic layer deposition technology deposit ruthenium/copper alloy; Wherein, the tantalum nitride/tantalum barrier layer thickness is respectively 3-5 nm and 2-5 nm; The inculating crystal layer thickness of metal Ru is 5-10 nm; Period by control deposit ruthenium
N 2And the period of deposit ruthenium/copper
N 1, and copper layer period
n CuWith ruthenium layer period
n RuThereby, the constituent content of control ruthenium/copper alloy.
2. the preparation method of copper interconnection structure according to claim 1 is characterized in that concrete steps are as follows:
(1) adopt RCA technology to clean monocrystalline substrate;
(2) on monocrystalline substrate, form one deck etching barrier layer, low dielectric constant insulation dielectric layer successively;
(3) define through hole, contact hole by photoetching process, etching technics, and the figure of metal valley;
(4) on the formed circular foundation of above-mentioned steps, utilize the thick tantalum of the thick tantalum nitride of atomic layer deposition technology growth 3-5 nm and 2-5 nm as diffusion impervious layer, regrowth one layer thickness is that the metal Ru of 5-10 nm is as the inculating crystal layer of ruthenium/copper alloy on diffusion impervious layer then;
(5) adopt CMP (Chemical Mechanical Polishing) process leveling wafer surface at last.
3. the preparation method of copper interconnection structure according to claim 2 is characterized in that in the step (4), by control
N 1,
N 2, and
n CuWith
n RuRealize the inculating crystal layer component of ruthenium/copper alloy and the regulation and control of thickness.
4. the preparation method of copper interconnection structure according to claim 1 is characterized in that in the step (2), low dielectric constant insulation dielectric layer material is SiO
2, SiOF, SiCOH or porous SiC OH.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2013102358948A CN103325729A (en) | 2013-06-16 | 2013-06-16 | Copper interconnection structure manufacturing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2013102358948A CN103325729A (en) | 2013-06-16 | 2013-06-16 | Copper interconnection structure manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN103325729A true CN103325729A (en) | 2013-09-25 |
Family
ID=49194399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2013102358948A Pending CN103325729A (en) | 2013-06-16 | 2013-06-16 | Copper interconnection structure manufacturing method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103325729A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103745971A (en) * | 2013-12-19 | 2014-04-23 | 复旦大学 | Integrated circuit copper interconnection structure and preparation method thereof |
CN109300783A (en) * | 2018-09-13 | 2019-02-01 | 清华大学 | A kind of cmp method of the metal interconnection line using ruthenium barrier layer |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1708845A (en) * | 2002-10-31 | 2005-12-14 | 英特尔公司 | Forming a copper diffusion barrier |
US20060153973A1 (en) * | 2002-06-04 | 2006-07-13 | Applied Materials, Inc. | Ruthenium layer formation for copper film deposition |
US20080085611A1 (en) * | 2006-10-09 | 2008-04-10 | Amit Khandelwal | Deposition and densification process for titanium nitride barrier layers |
US20090078916A1 (en) * | 2007-09-25 | 2009-03-26 | Applied Materials, Inc. | Tantalum carbide nitride materials by vapor deposition processes |
US20090087982A1 (en) * | 2007-09-28 | 2009-04-02 | Applied Materials, Inc. | Selective ruthenium deposition on copper materials |
US20090142474A1 (en) * | 2004-12-10 | 2009-06-04 | Srinivas Gandikota | Ruthenium as an underlayer for tungsten film deposition |
-
2013
- 2013-06-16 CN CN2013102358948A patent/CN103325729A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060153973A1 (en) * | 2002-06-04 | 2006-07-13 | Applied Materials, Inc. | Ruthenium layer formation for copper film deposition |
CN1708845A (en) * | 2002-10-31 | 2005-12-14 | 英特尔公司 | Forming a copper diffusion barrier |
US20090142474A1 (en) * | 2004-12-10 | 2009-06-04 | Srinivas Gandikota | Ruthenium as an underlayer for tungsten film deposition |
US20080085611A1 (en) * | 2006-10-09 | 2008-04-10 | Amit Khandelwal | Deposition and densification process for titanium nitride barrier layers |
US20090078916A1 (en) * | 2007-09-25 | 2009-03-26 | Applied Materials, Inc. | Tantalum carbide nitride materials by vapor deposition processes |
US20090087982A1 (en) * | 2007-09-28 | 2009-04-02 | Applied Materials, Inc. | Selective ruthenium deposition on copper materials |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103745971A (en) * | 2013-12-19 | 2014-04-23 | 复旦大学 | Integrated circuit copper interconnection structure and preparation method thereof |
CN109300783A (en) * | 2018-09-13 | 2019-02-01 | 清华大学 | A kind of cmp method of the metal interconnection line using ruthenium barrier layer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102543835B (en) | Opening filling method | |
TWI619171B (en) | Barrier layers | |
CN102856299B (en) | Interconnection barrier structure and method | |
CN102569032B (en) | Method for manufacturing inductance element by overlapping multiple layers of metalized thin films | |
US9269615B2 (en) | Multi-layer barrier layer for interconnect structure | |
TWI232539B (en) | Method for forming intermetal dielectric | |
CN108336062B (en) | Preparation method of Cu interconnection integrated circuit high-entropy alloy diffusion barrier layer | |
CN102315163A (en) | Manufacturing method of ultralow-dielectric-constant film copper-interconnecting layer | |
US8957519B2 (en) | Structure and metallization process for advanced technology nodes | |
CN102437104B (en) | Manufacturing method of integrated circuit having a portion of redundant through holes and integrated circuit | |
TWI638423B (en) | Adhesion layer for through silicon via metallization | |
CN103325729A (en) | Copper interconnection structure manufacturing method | |
US20120153478A1 (en) | Liner layers for metal interconnects | |
CN103560124A (en) | Through silicon via (TSV) structure and manufacture method thereof | |
CN102903699A (en) | Copper interconnecting structure and preparation method thereof | |
CN103972156B (en) | Semiconductor interconnection structure and preparation method thereof | |
CN102082119B (en) | Method for selectively depositing tungsten contact hole or through hole | |
CN102832198A (en) | Copper interconnection structure adopting novel alloy seed crystal layer and preparation method of structure | |
CN104979268B (en) | The forming method of laminated construction and the forming method of interconnection structure | |
CN102437105B (en) | Method for producing integrated circuit having partial redundant through holes and integrated circuit | |
CN103325770A (en) | Integrated circuit copper interconnection structure and preparation method thereof | |
CN102446847B (en) | Full photoresistance dual damascene method capable of reducing sheet resistance of copper interconnection | |
JP2005038999A (en) | Method of manufacturing semiconductor device | |
CN103545292A (en) | TSV structure and manufacturing method thereof | |
CN102693958A (en) | Copper interconnection structure adopting novel diffusion impervious layer and preparation method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20130925 |