CN103413837A - MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof - Google Patents

MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof Download PDF

Info

Publication number
CN103413837A
CN103413837A CN2013102843765A CN201310284376A CN103413837A CN 103413837 A CN103413837 A CN 103413837A CN 2013102843765 A CN2013102843765 A CN 2013102843765A CN 201310284376 A CN201310284376 A CN 201310284376A CN 103413837 A CN103413837 A CN 103413837A
Authority
CN
China
Prior art keywords
germanium
dielectric
adopt
film
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013102843765A
Other languages
Chinese (zh)
Inventor
卢红亮
谢章熠
耿阳
张卫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fudan University
Original Assignee
Fudan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fudan University filed Critical Fudan University
Priority to CN2013102843765A priority Critical patent/CN103413837A/en
Publication of CN103413837A publication Critical patent/CN103413837A/en
Pending legal-status Critical Current

Links

Images

Abstract

The invention belongs to the field of micro electronics and particularly relates to an MOS capacitor of a germanium based high dielectric constant insulated medium and a preparation method thereof. According to the MOS capacitor, the semiconductor substrate is made of n type germanium (Ge), a mixed structure of high dielectric constant Al2O3 films and TiO2 films is employed as insulated medium, the Al2O3 films are the beginning and ending films of a laminated structure, and a metal/insulator/germanium semiconductor structure is formed finally. According to the MOS capacitor and the preparation method, the atomic layer deposition technology is employed to prepare the germanium high dielectric constant insulated medium, the insufficiency of thermal stability and solubility in water of a germanium intrinsic oxide can be effectively solved, and a broad prospect is provided for the development of a novel device.

Description

Mos capacitance device of a kind of germanium base high-k dielectric and preparation method thereof
Technical field
The invention belongs to microelectronic, be specifically related to mos capacitance device of a kind of germanium base high-k dielectric and preparation method thereof.
Background technology
CMOS (Complementary Metal Oxide Semiconductor) (Complementary Metal-Oxide-Semiconductor based on silicon (Si), CMOS) device faces increasing bottleneck and restriction when channel dimensions further reduces, and the mobility of silicon is not enough to meet the more device performance requirement of high speed, low-power consumption simultaneously.Than silicon, the electronics of germanium and hole mobility are respectively 2.6 times and 4.2 times of silicon, and can further improve mobility by the strained Germanium technology.Simultaneously, the hole mobility of germanium is maximum in IV family and III-V family semiconductor.Germanium oxide (GeO x, x=1,2) as the native oxide of germanium, there is thermal stability and with water, react soluble problem.The research of germanium base high-k dielectric becomes the key point of germanium base device.
Summary of the invention
The object of the invention is to mos capacitance device proposed a kind of high-k dielectric and preparation method thereof.
The mos capacitance device of the high-k dielectric that the present invention proposes, be to adopt N-shaped germanium (Ge) as Semiconductor substrate, adopts the Al of high-k 2O 3Film and TiO 2The film mixed structure is as dielectric, and with Al 2O 3Film finishes, and forms metal/insulator/Ge semiconductor structure.
The preparation method of the mos capacitance device of the high-k dielectric that the present invention proposes, adopt atomic layer deposition technology (Atomic Layer Deposition, ALD), and concrete steps are as follows:
(1) at first with acetone soln immersion, supersonic cleaning germanium (Ge) substrate surface, stain to remove organic substance;
(2), after acetone treatment, adopt the hydrofluoric acid solution of dilution to soak to remove surperficial natural oxidizing layer;
(3) the Ge substrate is placed in the reaction chamber of atomic layer deposition, according to shown in Figure 1, successively at Ge surface deposition Al 2O 3Film, deposit Al afterwards 2O 3/ TiO 2Mixed film alternately, finally deposit Al again 2O 3Film;
(4) adopt the method for physical sputtering with the germanium wafer back side, to form the aluminium electrode on dielectric.
Adopt photoelectron spectroscopy (XPS), transmission electron microscope (TEM), ellipsometer test (Spectroscopic Ellipsometry), electric impedance analyzer (Impedance Analyzer) to characterize respectively chemical bond and the chemical constituent of dielectric, atom level film Cross Section Morphology, optical property, electric property.
The present invention has the following advantages:
1, Al 2O 3Have the automatically cleaning left and right to the germanium surface, can effectively suppress the formation of germanium oxide, and the obstruction germanium atom spreads in the high-k dielectric.
2, Al 2O 3Al 3+With TiO 2Intrinsic defect form p-type and N-shaped compensates mutually, thereby improve the leakage current characteristic of dielectric.
3, adopt Al 2O 3With the aluminium electrode contact, guarantee the good contact of metal and dielectric.
4, test obtains the relative dielectric constant of dielectric up to 16 left and right.
The atomic layer deposition technology be development in recent years get up a kind of from the restraint-type chemical vapour deposition (CVD), be particularly suitable in little live width integrated circuit technology forming various metal oxide dielectric films.The present invention proposes a kind of New insulated medium composition structure and, based on the technological process of atomic layer deposition, is the core component in high-speed low-power-consumption semiconductor device of future generation---and the development of mos capacitance device provides broad prospect.
The accompanying drawing explanation
The pellicular cascade structural diagrams of the high-k dielectric that Fig. 1 the present invention proposes.
The transmission electron microscope sectional view of the high-k dielectric that Fig. 2 the present invention proposes.
The interface chemical bonding of the high-k dielectric that Fig. 3 the present invention proposes characterizes.
The capacitance-voltage curve of Fig. 4 mos capacitance device of the present invention and hysteresis characteristic curve.
Embodiment
Below with reference to accompanying drawing, embodiments of the present invention are described.In the description of back, identical Reference numeral means identical assembly, and it is repeated in this description omission.
Atomic layer deposition involved in the present invention is to adopt argon gas as carrier gas and purgative gas, and reaction temperature is set as 150-300 oC.Al 2O 3And TiO 2Precursors be respectively Al (CH 3) 3-H 2O and Ti (OCH (CH 3) 2) 4-H 2O.Al 2O 3The circular response time is: Al (CH 3) 3And H 2Each 0.1-0.5 s of O time, purgative gas time 1.0-2.0 s.TiO 2The circular response time is: Ti (OC 2H 5) 4Time 1.0-2.0 s, H 2O time 5.0-10.0 s, purgative gas time 5.0-10.0 s.
Above-described embodiment is of the present invention giving an example, although disclose for the purpose of illustration most preferred embodiment of the present invention and accompanying drawing, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various replacements, variation and modification are all possible.Therefore, the present invention should not be limited to most preferred embodiment and the disclosed content of accompanying drawing.

Claims (3)

1. the mos capacitance device of a germanium base high-k dielectric, is characterized in that: adopt N-shaped germanium (Ge) as Semiconductor substrate, adopt the Al of high-k 2O 3Film and TiO 2The film mixed structure is as dielectric, and with Al 2O 3Film starts and finishes, and forms metal/insulator/Ge semiconductor structure.
2. the preparation method of the mos capacitance device of germanium base high-k dielectric as claimed in claim 1, adopt the atomic layer deposition technology, it is characterized in that concrete steps are as follows:
(1) at first with acetone soln immersion, supersonic cleaning germanium substrate surface, stain to remove organic substance;
(2) adopt the hydrofluoric acid solution of dilution to soak to remove surperficial natural oxidizing layer;
(3) the germanium substrate is placed in the reaction chamber of atomic layer deposition, successively at Ge surface deposition Al 2O 3Film, deposit Al afterwards 2O 3/ TiO 2Mixed film alternately, finally deposit Al again 2O 3Film;
(4) adopt the method for physical sputtering with the germanium wafer back side, to form the aluminium electrode on dielectric.
3. the preparation method of the mos capacitance device of germanium base high-k dielectric according to claim 1, while it is characterized in that atomic layer deposition, adopt argon gas as carrier gas and purgative gas, and reaction temperature is 150-300 ℃; Al 2O 3And TiO 2Precursors be respectively Al (CH 3) 3-H 2O and Ti (OCH (CH 3) 2) 4-H 2O; Al 2O 3The circular response time is: Al (CH 3) 3And H 2Each 0.1-0.5 s of O time, purgative gas time 1.0-2.0 s; TiO 2The circular response time is: Ti (OC 2H 5) 4Time 1.0-2.0 s, H 2O time 5.0-10.0 s, purgative gas time 5.0-10.0 s.
CN2013102843765A 2013-07-08 2013-07-08 MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof Pending CN103413837A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013102843765A CN103413837A (en) 2013-07-08 2013-07-08 MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013102843765A CN103413837A (en) 2013-07-08 2013-07-08 MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof

Publications (1)

Publication Number Publication Date
CN103413837A true CN103413837A (en) 2013-11-27

Family

ID=49606835

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013102843765A Pending CN103413837A (en) 2013-07-08 2013-07-08 MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof

Country Status (1)

Country Link
CN (1) CN103413837A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020153579A1 (en) * 2001-04-19 2002-10-24 Nec Corporation Semiconductor device with thin film having high permittivity and uniform thickness
CN1964075A (en) * 2006-12-07 2007-05-16 复旦大学 An erasable metal-insulator-silicon capacitor structure with high density
CN101673772A (en) * 2009-09-24 2010-03-17 复旦大学 Erasable metal-insulator-silicon capacitor structure
CN102509734A (en) * 2011-11-08 2012-06-20 复旦大学 Method for preparing Ge-based MOS (metal-oxide semiconductor) capacitor by using ALD (atomic layer deposition)
US20130122683A1 (en) * 2011-11-07 2013-05-16 Elpida Memory, Inc Blocking layers for leakage current reduction in dram devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020153579A1 (en) * 2001-04-19 2002-10-24 Nec Corporation Semiconductor device with thin film having high permittivity and uniform thickness
CN1964075A (en) * 2006-12-07 2007-05-16 复旦大学 An erasable metal-insulator-silicon capacitor structure with high density
CN101673772A (en) * 2009-09-24 2010-03-17 复旦大学 Erasable metal-insulator-silicon capacitor structure
US20130122683A1 (en) * 2011-11-07 2013-05-16 Elpida Memory, Inc Blocking layers for leakage current reduction in dram devices
CN102509734A (en) * 2011-11-08 2012-06-20 复旦大学 Method for preparing Ge-based MOS (metal-oxide semiconductor) capacitor by using ALD (atomic layer deposition)

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
CHI ON CHUI: "《Atomic Layer Deposition of High-k Dielectric for Germanium MOS Applications—Substrate Surface Preparation》", 《IEEE ELECTRON DEVICE LETTERS》 *
CHI ON CHUI: "《Germanium MOS Capacitors Incorporating Ultrathin High-k Gate Dielectric》", 《IEEE ELECTRON DEVICE LETTERS》 *
J.-Y. JASON LIN: "《Reduction in Specific Contact Resistivity to n+ Ge Using TiO2 Interfacial Layer》", 《IEEE ELECTRON DEVICE LETTERS》 *
XUE-FEI LI: "《Band alignment and interfacial properties of atomic layer deposited (TiO2)x(Al2O3)1−x gate dielectrics on Ge》", 《APPLIED PHYSICS A》 *
XUE-FEI LI: "《Band alignment and interfacial properties of atomic layer deposited (TiO2)x(Al2O3)1−x gate dielectrics on Ge》", 《APPLIED PHYSICS A》, 5 July 2011 (2011-07-05), pages 763 - 767 *
ZHAO MEI: "《Effective interface passivation of a Ge/HfO2 gate stack using ozone pre-gate treatment and ozone ambient annealing》", 《JOURNAL OF SEMICONDUCTORS》 *

Similar Documents

Publication Publication Date Title
Black et al. Surface passivation of c-Si by atmospheric pressure chemical vapor deposition of Al2O3
CN102332395B (en) Method for selectively depositing gate oxides and gate electrodes
CN101425457B (en) High dielectric constant grid dielectric material forming method and a semiconductor device
CN101447420A (en) Method for preparing high-dielectric-coefficient grid medium membrane hafnium silicon oxygen nitrogen
Fukuda et al. Low-Temperature Formation of High-Quality $\hbox {GeO} _ {2} $ Interlayer for High-$\kappa $ Gate Dielectrics/Ge by Electron-Cyclotron-Resonance Plasma Techniques
US9831084B2 (en) Hydroxyl group termination for nucleation of a dielectric metallic oxide
Zhao et al. Formation and elimination mechanism of thermal blistering in Al2O3/Si system
CN102543751A (en) Preparation method of Ge-based Metal Oxide Semiconductor (MOS) device with sub-nanometer equivalent to oxide thickness
CN101800178B (en) Preparation method of hafnium silicon aluminum oxygen nitrogen high-dielectric constant gate dielectric
Yan et al. Characterization of thin Al2O3/SiO2 dielectric stack for CMOS transistors
TWI413185B (en) A method for forming an interfacial passivation layer in the ge semiconductor
CN102024707B (en) Method for manufacturing GaAs-based metal oxide semiconductor (MOS) device
CN101962758B (en) Method for forming Hf-based gate medium film on germanium substrate by atomic layer deposition at low temperature
US20120264311A1 (en) Surface treatment method for germanium based device
CN102492932B (en) In-situ surface passivation method in ALD (atomic layer deposition) production of GaAs-based MOS (Metal Oxide Semiconductor) devices
CN102064103A (en) High-k gate dielectric layer manufacture method
CN103413837A (en) MOS capacitor of germanium based high dielectric constant insulated medium and preparation method thereof
CN105336596A (en) Preparation method for high-dielectric-constant interface layer
CN103745923A (en) Method for growing gate dielectric on gallium nitride substrate and electrical performance testing method
Dao et al. Optimized surface passivation of n and p type silicon wafers using hydrogenated SiNx layers
Liang et al. Annealing effect on electrical properties of high-k MgZnO film on silicon
CN102543844B (en) Method for manufacturing semiconductor device structure and semiconductor device structure
Li et al. Effect of annealing on interfacial and band alignment characteristics of HfO2/SiO2 gate stacks on Ge substrates
Rusli et al. Effects of annealing on low dielectric constant carbon doped silicon oxide films
US9006088B2 (en) Method for forming semiconductor gate structure and semiconductor gate structure

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20131127