CN103456650B - Eyespot training method for wire bond and relevant semiconductor processing operation - Google Patents

Eyespot training method for wire bond and relevant semiconductor processing operation Download PDF

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Publication number
CN103456650B
CN103456650B CN201310305538.9A CN201310305538A CN103456650B CN 103456650 B CN103456650 B CN 103456650B CN 201310305538 A CN201310305538 A CN 201310305538A CN 103456650 B CN103456650 B CN 103456650B
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eyespot
semiconductor device
shape
pad
region
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CN103456650A (en
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M·T·迪莱
王志杰
P·M·利斯特
D·索德
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Kulicke and Soffa Industries Inc
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Kulicke and Soffa Industries Inc
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Priority claimed from CN200780001638.5A external-priority patent/CN101443151B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061Disposition
    • H01L2224/0612Layout
    • H01L2224/06179Corner adaptations, i.e. disposition of the bonding areas at the corners of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector

Abstract

A kind of method for wire bonding operation taught eyepoint is provided.The method includes: (1) selects one group of shape to be used as eyespot from semiconductor device region, (2) using at least one of is that this eyespot trained by seam welder: (a) sample semiconductor device, or the tentation data that (b) is relevant with this semiconductor device.This training step includes the position defining each shape relative to another.

Description

Eyespot training method for wire bond and relevant semiconductor processing operation
The application is Application No. " 200780001638.5 ", the invention submitted on June 19th, 2008 The divisional application of entitled " for the eyespot training method of wire bond and relevant semiconductor processing operation ".
To Cross-Reference to Related Applications
The application is Application No. PCT/US2007/063850 submitted on March 13rd, 2007 The National Phase in China application of PCT application, is here incorporated herein by reference this international application.
Technical field
The present invention relates to wire bonding systems, more particularly, it relates to the improvement in wire bonding systems Eyespot (eyepoint) training method.
Background technology
United States Patent (USP) No.5,119,436 and No.6,869,869 relate to wire bonding systems and multi view system System, is incorporated herein by reference entire contents.
In the process and encapsulation process of semiconductor device, it is frequently used the training utilizing visual system Operation.Such as, at a collection of semiconductor device (such as, as the semiconductor core being arranged in lead frame This device of sheet) on carry out wire bond operation before, it usually needs the eyespot of " training " sample device (or Multiple eyespots).By " training " described sample device, by some physics relevant to this sample device Data store (such as, in the memorizer of wirebond machine).In batch will during device processing These physical datas are as benchmark, such as, with in batch the half of guarantee to be processed (such as, by wire bond) In conductor device, each device is properly positioned or is directed at.
Therefore, in wire bond operating environment, wirebond machine uses visual system (such as, pattern recognition System or PRS) find the pattern (such as, eyespot, reference point etc.) previously trained, in order to inciting somebody to action (such as, at semiconductor device after semiconductor device is placed at welding position and before welding filament Before welding filament between part and the lead frame supporting this semiconductor device) alignment of semiconductor devices. Traditional approach is to carry out taught eyepoint based on sample device on a wire bonding machine, and wherein operator utilize training Window aims at the target area on sample device.Some routine techniques (such as algorithm) is used to combine vision System scans targeted eyepoint.
A kind of conventional teaching technique utilizes normalized gray scale related system (NGCS) to scan sample This device (such as, the selected part of sample device).By this technology, at each position, base The content detected in visual system is to distribute gray value.Such as, the welded disc of semiconductor device is scanned Time, gray value is distributed to scanned position.After the desired region is scanned, storage ash Angle value storehouse (is associated with corresponding scan position).When such actual semiconductor device is carried out During wire bond, visual system detect each scanned position gray value, and by these gray values and those The gray value being stored in storehouse in the training process compares.
Another kind of conventional teaching technique relates to scanned samples device (such as, the selected portion of sample device Point), and detect each edge (namely be based on the pattern match at edge) defined in scanned region. By this technology, based on the content detected by the visual system of each position, logarithm value carries out fixed Justice.Such as, when scanning the welded disc of semiconductor device, marginal value is distributed to scanned position. After the desired region is scanned, storage marginal value storehouse (being associated with corresponding scan position). When such actual semiconductor device is carried out wire bond, visual system detects each scanned position Marginal value, and those values of being stored in storehouse during these numerical value and training are compared.
Use in these conventional methods any one, for wanting each device of wire bond to provide weighting Point, mark therein is the function being trained to sample device compared with the practical devices wanting wire bond.As Really this mark exceedes certain threshold value, then this device is acceptable, and will processed (example Such as wire bond);If but this mark is less than described threshold value, does not the most just go on and is automatically brought into operation. For example, it is possible to tell operator by this relatively low mark.Furthermore, it is possible to attempt follow-up location or eye Point obtains acceptable mark.Further, it is also possible to attempt alternate algorithm or recover sequence.
Unfortunately, all there is a lot of problem in each technology in these routine techniquess.Semiconductor device Practical situation be to have different visions from the different components of same batch (or different batches) Attribute, even if they are identical devices and have identical electrical functional properties.Such as, device with The surface color of device or texture may be different.This change may originate from same device difference supplier The slight change of manufacturing process used.These changes frequently result in device in terms of contrast and reflectance Show totally different (nonlinear change of such as reflectance).Accordingly, because these change (such as, due to Want the difference between the reflectance of wire bond parts and training sample device), utilize traditional mode matching technique The weighting branch obtained is relatively low.Therefore, although generally utilize mark to ignore the searching result of mistake, But normal mode matching technique (such as NGCS system, pattern matching system based on edge etc.) Mark will be caused to be less than threshold value, and even for processing further, this device is acceptable. Bring by this change (such as, surface different) between device between semiconductor device another Individual problem is, the average time (i.e. MTBA) between manpower intervention is the shortest, causes automatic wire bond to set Standby productivity ratio is relatively low.
Accordingly, it would be desirable to be modified to the eyespot training method that semiconductor device processes, and use this Plant the method that eyespot processes semiconductor device.
Summary of the invention
Exemplary embodiment according to the present invention, it is provided that for a kind of taught eyepoint of wire bond operation Method.This method includes: (1) selects one group of shape from semiconductor device region, uses Make eyespot, use (a) sample semiconductor device or (b) relevant with this semiconductor device with (2) Tentation data at least one, train this eyespot for wirebond machine.Such as, these tentation datas Can be available data (such as cad data, historical data etc.), it is also possible to be this training step The tentation data before determined.This training step includes the position defining each shape relative to another Put.
Another exemplary embodiment according to the present invention, it is provided that a kind of method operating wirebond machine. This method includes: (1) selects one group of shape from semiconductor device region, as eyespot, (2) (a) sample semiconductor device or (b) predetermined number relevant with this semiconductor device are used At least one according to, trains this eyespot for wirebond machine.This training step includes defining each shape Shape is relative to another position.This method also includes: (3) will be by the first quasiconductor of wire bond Device is directed to the precalculated position of described wirebond machine, and (4) use the visual system of this wirebond machine to sweep Retouching the selected portion of this first semiconductor device, selected portion is corresponding to being trained to eyespot.
Accompanying drawing explanation
By reading in conjunction with the accompanying detailed description below, it is possible to be best understood by the present invention.Should Emphasizing, traditionally, parts different in figure is out-of-proportion.On the contrary, for clarity sake, no It is arbitrarily expanded or reduced with the size of part.These accompanying drawings include:
Fig. 1 be the present invention exemplary embodiment in semiconductor device a part top view;
Fig. 2 be the present invention exemplary embodiment in the top view of second half conductor device part;
Fig. 3 is that the exemplary embodiment of the present invention includes that second half conductor device of eyespot is a part of Top view;
Fig. 4 be the present invention exemplary embodiment in semiconductor device shown in the covered Fig. 3 in specific region The top view of that part of part;
Fig. 5 is that the exemplary embodiment of the present invention includes that second half conductor device of eyespot is a part of Top view;
Fig. 6 be the present invention exemplary embodiment in be selected as semiconductor device one shown in Fig. 5 of eyespot The top view of part;
Fig. 7 be the present invention exemplary embodiment in the revision of eyespot of semiconductor device shown in Fig. 5 This;
Fig. 8 be the present invention exemplary embodiment in semiconductor device shown in the covered Fig. 7 in specific region The top view of that part of part;
Fig. 9 is that the exemplary embodiment of the present invention includes that second half conductor device of eyespot is a part of Top view;
Figure 10 be the present invention exemplary embodiment in be selected as semiconductor device one shown in Fig. 9 of eyespot The top view of part;
Figure 11 be the present invention exemplary embodiment in the revision of semiconductor device eyespot shown in Fig. 9 This;
Figure 12 be the present invention exemplary embodiment in quasiconductor shown in the covered Figure 11 in specific region The top view of that part of device;
Figure 13 is that the exemplary embodiment of the present invention includes that second half conductor device of eyespot is a part of Top view;
Figure 14 be the present invention exemplary embodiment in be selected as semiconductor device shown in Figure 13 of eyespot The top view of a part;
Figure 15 be the present invention exemplary embodiment in the correction of eyespot of semiconductor device shown in Figure 13 Version;
Figure 16 be the present invention exemplary embodiment in quasiconductor shown in the covered Figure 15 in specific region The top view of that part of device;
Figure 17 is that the exemplary embodiment of the present invention includes that second half conductor device of eyespot is a part of Top view;
Figure 18 be the present invention exemplary embodiment in quasiconductor shown in the covered Figure 17 in specific region The top view of device eyespot part;
Figure 19 is the top view that the exemplary embodiment of the present invention includes the semiconductor device of two eyespots Figure;
Figure 20 be the present invention exemplary embodiment in be welded to lead frame semiconductor device a part Top view;
Figure 21 is the flow process of the method being wire bond operation training eyespot in the exemplary embodiment of the present invention Figure;And
Figure 22 be the present invention exemplary embodiment in the flow chart of wirebond machine method of work.
Detailed description of the invention
Exemplary embodiment according to the present invention, it is provided that a kind of method, special for generating based on geometry The pattern levied, this pattern is for location and/or alignment of semiconductor devices in wire welding equipment.The method A kind of technology of definition, for utilizing the invariant features of pattern in semiconductor chip surface to generate eyespot.This The method of kind can improve at the semiconductor device with certain change (change of such as surface reflectivity) The robustness of the described pattern of upper searching.Furthermore, it is possible to (such as use such as cad data with synthesising pattern This available data) build generated eyespot, it is also possible to from actual parts of images, extract institute The eyespot generated.It is different from traditional PRS system (such as grayscale pattern coupling, geometrical pattern Join), method proposed by the invention can capture the invariant features in image effectively.With routine techniques Compare, for tackling the change of device in automatic wire bonding production environment, use this invariant features (with And the mutual relation between these invariant features) model set up (is such as stored in the storage of wirebond machine In device) more robust.
The eyespot using various exemplary methods disclosed herein to generate, can serve as in PRS Dominant eye point or back-up eyepoint, such as, use in eyepoint teaching process obtain pad information (or Other geological information or shape information).Generated eyespot (and half can be selected as follows The region of conductor chip): (1) is by selecting on the semiconductor device with good pad geological information One region (such as including pad vertical row and the region of pad horizontal line), is automatically selected by PRS; And/or (2) when selecting to have this region of desired pad information at least partially through operation The intervention of personnel selects.
In PRS automatically generates the example of eyespot, can be by off-line programing instrument etc. from described device Number of packages according to (such as cad data) obtain shape (such as, any type of bond pad shapes, as rectangle, Octagon, circle etc.) with the relative position of shape.Can also use after observing sample device Visual system, automatically extracts these shapes (and relative position of these shapes).If able to obtain The numeral obtaining described device chip sufficiently complete describes (the most predetermined device data), it is possible to use one Algorithm selects the suitable shape/feature for covering in described eyespot, then will choosing with described algorithm The shape/feature selected binds together (the relative position such as, using described shape/feature).Use The method, using the teaching of the invention it is possible to provide " no visual training " processes (i.e. off-line programing method), and this process is less Need or need not wirebond machine self study.It is of course possible to need to use this off-line procedure and wire bond Sample device on machine confirms the eyespot training out.In this no visual training system, it is possible to Reduce the demand to wirebond machine optical system.This is because wirebond machine usually uses the visual system of complexity, Sometimes amplification can change, and is trained;But, if using the data being pre-existing in, It is trained in no visual mode, it becomes possible to reduce the complexity (and cost) of this visual system. Such as, using two amplifications, (two optical systems, such as " high magnification system " and " low Times amplification system ") conventional wirebond machine in, it is possible to from wirebond machine, save high magnification system.This is Because high magnification system be generally used for obtaining the image detail being trained to region, such as adjacent pad it Between less (such as, size is equivalent to sub-pixel) gap.Some according to the present invention is exemplary Embodiment, uses " no visual " training method can need not these details (such as owing to high power is put The cost reason of big system).
In utilizing operator to intervene the example generating eyespot, can be by motor system accurately Calibrate PRS to assist operator.Such as, motor system and PRS system can be based on by grasping Make the parameter that personnel provide, perform training managing (such as pad training managing).Such as, (1) cannot Obtain when properly describing of semiconductor device, and/or (2) include not having the several of better definition when eyespot What, during feature, can adopt in this way.This training managing may need, and such as, moves successively To the shape/feature of each needs, and from the image of the shape/feature needed, obtain the data of needs. Once complete the training to whole shape/feature, it is possible to utilize the combination of the shape/feature trained, And they area/location in the infrastructural frame set up respectively, set up eyespot.
No matter how eyespot generates, after the teaching process, can obtain in PRS internal system Obtain shape information, such as pad size, pad locations, shape, polarity and other attribute.Additionally, In addition to described single shape information (the most single bond pad shape information), from described motor system and/or Use in the calculating that described PRS system is carried out, it is also possible to obtain between these shapes (such as these Between pad) geometrical relationship.
As described above, in training region (such as eyespot), the shapes/pads that synthesis creates is permissible Replace the information (namely image based on dish model) about true shape/dish.More specifically, logical Cross and use the data (such as available data, such as cad data) relating to semiconductor device being obtained in that, The shapes/pads that this synthesis creates is provided.This synthesis create shapes/pads can be given average shape/ The more preferable expression of dish, because it includes that whole common characteristics of multiple shapes/pads (and are likely not to have Some defect of sample device, the most just can utilize these defects to carry out taught eyepoint).Furthermore, it is possible to Use suitable covering technique, to remove some region of scope selected by semiconductor device, for difference Device, these regions are different.Further, it is also possible to use a kind of technology, relative to other of device Region, this technology gives the specific region (peripheral pad area of such as chip) of semiconductor device With more power, so that eyespot more robust.
The shape being included in the eyespot according to present invention generation includes, such as, and bond pad shapes, structure Become the pad group of pattern, traditional eyepoint shapes (such as cross, circle, square etc.), there is definition shape Arbitrary surfaces feature etc. on the circuit of shape and/or different chip.Further, it is also possible to by two or more These (or other) exemplary shape are combined, to be included in generated eyespot.
The most different schemes can be included, such as: (1) can be pre-for setting up the algorithm of eyespot First determine minimal number of shape/feature in algorithm, and the shape/feature of this predetermined quantity is completed instruction When practicing, algorithm can be transferred to another part of process, such as, calculate the shape/feature being trained to relative In infrastructural frame and/or mutual position;(2) given shape/feature needed in the training process is defined, If thus this feature location is failed, can cause defining eyespot failure;(3) weighting system is used, So based on its respective importance or predictability, provide power, this weighting for given shape/feature System is for defining the score value of processed semiconductor device;(4) if select eyespot to be included in In whole shape/feature of needs, it is possible in single the regarding of visual system (such as image camera) In, then single searching operation can be used to position eyespot;(5) if the feature needed can not be complete Portion, in visual field, can position each feature (each pad of such as eyespot), afterwards, by combination The data of each location feature, it is possible to obtain whole training pattern and (such as include the phase of each feature To position);And/or (6) are in the training stage, apply multiple (being probably redundancy) training algorithm, To improve reliability.Within the scope of the invention, can use these schemes (etc.) any group Close.
Fig. 1 be semiconductor device 100 part top view (depicted portion is viewed from above, The lower left of semiconductor chip).Semiconductor device 100 includes the multiple pads being arranged in around device. Such as these pads include pad 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100h, 100i, 100j, 100k, 100l and 100m.Semiconductor device 100 also includes circuit region 102 He Circuit region 104.As it is known by the man skilled in the art, the circuit region (such as half on semiconductor device Conductor chip) wiring diagram, wire etc. can be included.
For process on a wire bonding machine semiconductor device 100(for example, weld device 100 pad and Wire loop between second welding position, wherein the second welding position can be the welding of installing device 100 Lead-in wire on framework), for the eyespot of wirebond machine training before needing to use, it is directed on a wire bonding machine and partly leads Body device 100.Certainly, this alignment needs to apply other semiconductor processing techniques various, including such as Stud bumps, sheet are to sheet wire bond, the end of a thread/wire loop inspection etc..
As it has been described above, different components can present different qualities in actual semiconductor device, even if it Be identical device.Such as Fig. 2 is the top view of another semiconductor device 200 part.To the greatest extent Pipe is to be provided by the manufacturer different from device 100 shown in Fig. 1, but from the angle of wirebond machine, Semiconductor device 200 remains the device identical with semiconductor device 100 shown in Fig. 1.With quasiconductor The pad of device 100 is similar, and semiconductor device 200 includes multiple pad, such as pad 200a, 200b, 200c, 200d, 200e, 200f, 200g, 200h, 200i, 200j, 200k, 200l and 200m. Additionally, similar to the circuit region 102 and 104 of semiconductor device 100, semiconductor device 200 wraps Include circuit region 202 and 204.From the point of view of visual system, the circuit region of semiconductor device 100 102 and 104 look like single component or the region with total physical appearance;But, due to two The surface of device (namely device 100 and device 200) is different, and same visual system can be by quasiconductor The circuit region 202 and 204 of device 200 is seen as and is included many independent sectors.Such as such as Fig. 2 institute Show, circuit region 202 is regarded as and includes part 202a, 202b and 202c etc..Equally, circuit region Territory 204 includes part 204a, 204b and 204c etc..
Therefore, when semiconductor device 100 and semiconductor device 200 are carried out same operation, Due to one of multiple potential reasons (such as surface color, superficial makings etc.), visual system can be by it Regard diverse as.It is now assumed that use the part half including circuit region 102 or 104 Conductor device 100, is trained the eyespot of wire bond operation.Use is trained by semiconductor device 100 When eyespot processes (such as wire bond) semiconductor device 200, a lot of problem (such as quasiconductor can be caused The mark of device 200 is less than threshold value, i.e. allows to accept this device and is further processed;Half The MTBA of this device of conductor device 200 is the lowest etc.).
According to some exemplary embodiment of the present invention, will not change between device with eyespot For the purpose of select eyespot, and do not consider the difference such as surface color/texture.Such as can be from semiconductor device One group of shape of a regional choice be used as eyespot.It is wirebond machine training when using sample semiconductor device During eyespot, define each shape position relative to another.
Such as Fig. 3 illustrates that the eyespot of the exemplary embodiment according to the present invention selects.Fig. 3 illustrates half Conductor device 30, including multiple pads, such as pad 300a, 300b, 300c, 300d, 300e, 300f, 300g, 300h, 300i, 300j, 300k, 300l and 300m.Additionally, respectively with partly lead The circuit region 102/104 of body device 100/200 is similar with 202/204, and semiconductor device 300 includes Circuit region 302 and 304.Due to different components circuit region 302 and 304 it may happen that change (as Confirmed by comparator device 100 and 200), therefore, in selected eyespot 310, ignore this A little regions.Eyespot 310 includes pad group 306(string pad, including pad 300h, 300i, 300j, 300k, 300l and 300m) and pad group 308(a line pad, including pad 300a, 300b, 300c, 300d, 300e, 300f, 300g).Some feature (wheel profile of the most each pad of eyespot 310 Shape, pad and the interval etc. between another) will not change between device, therefore, it is possible to provide The more training managing (with the follow up scan to the practical devices more robust wanting wire bond) of robust.
Although it should be noted that the region in dotted line in eyespot 310(Fig. 3 above) as a example by Eyespot is described, but it is to be understood that eyespot 310 can only include some shape/feature in region, Such as bond pad shapes and some pad relevant position in region 310.Illustrated and described herein Multiple exemplary embodiments of the present invention are exactly such.
Although additionally, exemplary eyepoint 310 includes the bond pad shapes organizing the pad in 306 and 308 (and not including the shape of circuit region 302 and 304), but circuit region can be included in eyespot The contour shape of one or both of 302 and 304.In this eyespot, may deposit between device and device Circuit region between potential internal differences (in such as Fig. 1, circuit region 102 compares Fig. 2 Difference between middle circuit region 202), do not interfere with training managing (and follow-up searching processes), Because only including the contour shape of described circuit region in this eyespot.
In some applications, solder pad of semiconductor device can include " probe labelling ", they for The visual system of wirebond machine is visible.This probe labelling is not unified.Such as due to typically Semiconductor wafer testing mode, part probe labelling may (such as horizontal direction) prolong in one direction Stretch, and other probe labelling may (such as vertical direction) extend in another direction.Probe on pad Labelling these change, also result in conventional eyepoint training system go wrong (such as find mark relatively Low problem, MBTA problem etc.).
According to some exemplary embodiment of the present invention, from eyespot, ignore/get rid of the inner area of pad Territory, so can fully eliminate the problem relevant to some change (such as probe labelling).Such as this A little regions can (1) be scanned, but does not considers in scoring process, and (2) are scanned, but In scoring process, give relatively low power, and/or (3) are not scanned.It is clear consequently that When mentioning some region (the such as shadow region, such as interior of bond pads or other shadow region) of device, " do not include ", " ignoring ", the saying (or similar saying) of " eliminating " and/or " covering ", it is not necessary to meaning Taste from scan process that (the such as scan process during training, processes by the actual device of wire bond Scan process during part) get rid of described region.
Therefore, Fig. 4 shows some is selected (the most predetermined, Real-time and Dynamic determines etc.) Eyespot 310 is compared from eyespot 310a(in region, and compared with eyespot 310a, eyespot 310 has some district , such as eyespot 310 does not ignores the interior section of pad from eyespot) in the quasiconductor that neglects Device 300.These selected areas are that shade/oblique line is (namely from eyespot training managing in the diagram Shadow region " is hidden ", wherein (1) by algorithm configuration for not scan these regions, and/or (2) algorithm is configured, so that edge/feature that " covering " intra-zone exists does not affects total score Number calculates).As shown in Figure 4, the inside of each pad is marked as shade, so that described inside is not wrapped Include in taught eyepoint.More specifically, from eyespot 310a, ignore the inside 300a1 of pad 300a. For the inside 300b1 of pad 300b, the inside 300c1 of pad 300c, the inside of pad 300d The inside 300f1 of the inside 300e1 of 300d1, pad 300e, pad 300f, pad 300g's is interior The inside 300i1 of the inside 300h1 of portion 300g1, pad 300h, pad 300i, pad 300j's The inside 300l1 and pad 300m of the inside 300k1, pad 300l of internal 300j1, pad 300k Inside 300m1, be also so.
The region outside actual pad is also included, in order to for (1) taught eyepoint in eyespot 310a The pad of 310a (shape of pad and respective position in such as eyespot 310a), and (2) are follow-up sweeps Retouch eyespot 310a, reduce error, and the region positioning these shapes is provided.More specifically, in weldering Dish row 306 surrounding provides non-hatched area 306a, provides non-hatched area around pad rows 308 308a.By providing the region around these, by increasing capacitance it is possible to increase the accurate wheel of each pad in taught eyepoint The probability of wide position (with they mutual outline position).
Fig. 5 be the present invention exemplary embodiment in the top view of semiconductor device 500 part, Semiconductor device 500 includes the region 510 of selected eyespot to be included.Semiconductor device 500 includes Multiple pads.As it is shown in figure 5, around semiconductor device 500, it is provided that the first assembly welding dish (bag Include pad 500a, 500b, 500c, 500d, 500e, 500f, 500g, 500h, 500i, 500j, 500k、500l、500m、500n、500o、500p、500q、500r、500s、500t、500u And 500v), provide inside first group simultaneously the second assembly welding dish (include pad 502a, 502b, 502c, 502d、502e、502f、502g、502h、502i、502j、502k、502l、502m、502n、 502o、502p、502q、502r、502s、502t、502u、502v、502w、502x、502y、 502z and 502aa).Semiconductor device 500 also includes reference point 504.
Fig. 6 is the eyespot of selected semiconductor device to be included 500, semiconductor device 500 The detailed view in region 510.Region 510 include pad 500a, 500b, 500c, 500d, 500e, 500f、500k、500l、500m、500o、502g、502h、502i、502j、502k、502l、 502m, 502n, 502o, 502p, 502q and reference point 504.It should be noted that, pad 502n and 502o includes the visual system for carrying out pad scanning visible certain not normal (such as stain, difference Reflectance, visible flaw etc.).If semiconductor device 500(includes pad 502n and 502o Not normal) be used as sample device, to train the eyespot of wirebond machine, then use by semiconductor device When the eyespot of 500 training processes (such as wire bond) actual semiconductor device, a lot of problem (example can be caused As the mark of processed semiconductor device is less than threshold value, carry out even if this device can be accepted Process further;The MTBA of device such as semiconductor device 500 is the lowest etc.).
According to some exemplary embodiment of the present invention, can be by the datum about semiconductor device It is fixed to be used for assisting according to (such as cad data, draw, the computer scanning drawn, available data etc.) Ocular prosthesis point.Such as can define eyespot by these data, otherwise, if using sample device to instruct Practice this eyespot, then this eyespot potentially includes some defect of sample semiconductor device.More specifically, Given data (such as cad data, draw, the computer scanning drawn, available data etc.) is permissible For definition eyespot as shown in Figure 7.It should be noted that, semiconductor device 500 as shown in Figure 7 Region 510 does not include that pad 502n's and 502o is not normal.By to include the region 510 shown in Fig. 7 The eyespot of shape start that (described eyespot uses given data to be defined, and real on a wire bonding machine Before border training sample device 500), eyespot 510 by original definition for there is no some defect.Hereafter, (such as use as shown in Figure 6 when on a wire bonding machine defined eyespot 510 being carried out hands-on There is in pad 502n and 502o not normal sample device 500), can neglect in training managing Slightly some defect, because during training on a wire bonding machine, the only total information of confirmatory sample device (pad that such as eyespot 510 includes and the shape of reference point and relative position).Therefore, by profit With (1) about the given data of semiconductor device, the sample device trained on a wire bonding machine in conjunction with (2) Part, it is provided that the eyespot of improvement.
Fig. 8 illustrates the eyespot 510a improved further of semiconductor device 500.More specifically, The selected area of this part of semiconductor device 500 is ignored from eyespot 510a.These selected areas exist Fig. 8 is marked as shade and (from eyespot training managing, described shadow region namely " can be hidden " Territory).As shown in Figure 8, the inside of each pad is marked as shade so that described inside not included in In the eyespot being trained to.More specifically, from eyespot 510a, ignore the inside 500a1 of pad 500a. For inside 500b1, the inside 500c1 of pad 500c of pad 500b, and each pad 500d, 500e、500f、500k、500l、500m、500n、500o、502g、502h、502i、502j、 The inside of 502k, 502l, 502m, 502n, 502o, 502p and 502q, too.Equally, ginseng The inside 504a1 of examination point 504 is also neglected from eyespot 510a.Other shadow region represents, example As having the region of inconsistent texture/reflectance between device and device.Therefore, described shadow region will not Impact is by the mark by the device of wire bond.
Additionally, also include the region outside actual pad (with reference point shape) in eyespot 510a, To be shape/relevant position (such as pad of eyespot 510a of the feature of (1) taught eyepoint 510a With the shape of reference point and respective position), and (2) later scanning of eyepoint 510a, reduce error, And the region positioning described shape is provided.More specifically, around pad 500a, nonshaded area is provided Territory 500a2, provides non-hatched area 500b2 around pad 500b.For each pad 500c, 500d, 500e、500f、500k、500l、500m、500n、500o、502h、502i、502j、502k、 502l, 502m, 502n, 502o, 502p and 502q provide (shown in fig. 8) this non-shadow Region.Equally, around reference point 504, non-hatched area 504a2 is provided.By providing around these Region, by increasing capacitance it is possible to increase in taught eyepoint, the exact outline of each pad and reference point is (mutual with them Between outline position) probability.
Fig. 9 be the present invention exemplary embodiment in the top view of semiconductor device 600 part, Semiconductor device 600 includes the selected region 610 including eyespot.Semiconductor device 600 includes many Individual pad.As it is shown in figure 9, in the first row on semiconductor device 600, it is provided that the first assembly welding dish (include pad 600a, 600b, 600c, 600d, 600e, 600f, 600g, 600h, 600i, 600j, 600k, 600l and 600m), provide in a second row simultaneously the second assembly welding dish (include pad 602a, 602b、602c、602d、602e、602f、602g、602h、602i、602j、602k、602l、 602m, 602n, 602o and 602p).
Figure 10 is the selected eyespot including semiconductor device 600, semiconductor device 600 The detailed view in region 610.Region 610 include pad 600a, 600b, 600c, 600d, 600e, 602a, 602b, 602c, 602d and 602e.It should be noted that, pad 602c and 602d includes certain Not normal (such as stain, different reflectance, visible flaw etc.), this not normal to perform this pad sweep The visual system retouched is visible.If semiconductor device 600(includes the mistake of pad 602c and 602d Often) it is used as the sample device eyespot with training wirebond machine, is trained by semiconductor device 600 when using Eyespot when processing (such as wire bond) actual semiconductor device, can cause a lot of problem (such as will be by The mark of the semiconductor device processed, less than threshold value, i.e. allows to accept this device and carries out further Process;The such as MTBA of this device of semiconductor device 600 is the lowest).
According to some exemplary embodiment of the present invention, about the given data (example of semiconductor device As cad data, draw, the computer scanning drawn, available data etc.) may be used for auxiliary definition Eyespot.Such as these data may be used for correcting and include the sample semiconductor device for taught eyepoint The eyespot of some defect.More specifically, described given data (such as cad data, is drawn, is painted The computer scanning of figure, available data etc.) may be used for the eyespot that defines as shown in figure 11.Should note Meaning, the region 610 of semiconductor device 600 as shown in figure 11 does not include described pad 602c and 602d Not normal.By starting with eyespot 610 shown in Figure 11 (described eyespot uses given data to be defined, And on a wire bonding machine before hands-on sample device 600), eyespot 610 by original definition for not having Some defect.Hereafter, (the example when on a wire bonding machine defined eyespot 610 being carried out hands-on As use as shown in Figure 10 there is at pad 602c and 602d not normal sample device 600), Training managing can be ignored some defect, because during training on a wire bonding machine, only confirming sample The total information (the such as shape of the pad that eyespot 610 includes and relative position) of this device.Therefore, By utilizing (1) about the given data of semiconductor device, train on a wire bonding machine in conjunction with (2) Sample device, it is provided that the eyespot of improvement.
Figure 12 is the schematic diagram of the eyespot 610a improved further of semiconductor device 600.More Say body, from eyespot 610a, ignore the selected area of this part of semiconductor device 600.These quilts Favored area is marked as shade in fig. 12 (namely " can hide " institute from eyespot training managing State shadow region).As shown in figure 12, the inside of each pad is marked as shade, so that in described Portion is not included in the eyespot being trained to.More specifically, from eyespot 610a, pad 600a is ignored Inside 600a1.For the inside 600b1 of pad 600b, the inside 600c1 of pad 600c, with And the inside of each pad 600d, 600e, 602a, 602b, 602c, 602d and 602e, also it is So.
Additionally, also include the region outside actual pad in eyespot 610a, in order to instruct for (1) (the such as shape of the pad of eyespot 610a is with respective in the shape/relevant position of the feature of white silk eyespot 610a Position), and (2) later scanning of eyepoint 610a, reduce error, and provide and be used for positioning described shape The region of shape.More specifically, around pad 600a, non-hatched area 600a2, Yi Ji are provided Non-hatched area 600b2 is provided around pad 600b.For each pad 600c, 600d, 600e, 602a, 602b, 602c, 602d and 602e provide (shown in fig. 12) non-hatched area.By providing Region around these, by increasing capacitance it is possible to increase in taught eyepoint, the exact outline of each pad is (mutual with them Between outline position) probability.
Figure 13 be the present invention exemplary embodiment in the top view of semiconductor device 700 part, This semiconductor device 700 includes the selected region 710 including eyespot.Semiconductor device 700 includes Multiple pads.As shown in figure 13, around semiconductor device 700, it is provided that the first assembly welding dish (bag Include pad 700a, 700b, 700c, 700d, 700e, 700f, 700g, 700h, 700i, 700j, 700k、700l、700m、700n、700o、700p、700q、700r、700s、700t、700u And 700v), provide inside first group simultaneously the second assembly welding dish (include pad 702a, 702b, 702c, 702d、702e、702f、702g、702h、702i、702j、702k、702l、702m、702n、 702o、702p、702q、702r、702s、702t、702u、702v、702w、702x、702y、 702z and 702aa).
Figure 14 is the selected eyespot including semiconductor device 700, semiconductor device 700 The detailed view in region 710.Region 710 include pad 700a, 700b, 700c, 700d, 700l, 700m, 700o, 702a, 702b, 702c, 702m, 702n and 702o.It should be noted that, pad 702n and 702o includes certain not normal (such as stain, different reflectance, visible flaw etc.), This not normal visual system to execution this pad scanning is visible.If semiconductor device 700(includes Pad 702n's and 702o is not normal) it is used for training the eyespot of wirebond machine, when using by semiconductor device When the eyespot of part 700 training processes (such as wire bond) actual semiconductor device, a lot of problem can be caused (such as by the mark of processed semiconductor device less than threshold value, i.e. allow to accept this device It is further processed;The MTBA of this device of semiconductor device 700 is the lowest etc.).
According to some exemplary embodiment of the present invention, about the given data (example of semiconductor device As cad data, draw, the computer scanning drawn, available data etc.) may be used for auxiliary definition Eyespot.Such as these data may be used for revising eyespot, and described eyespot includes for training this eyespot Some defect of sample semiconductor device.More specifically, described given data (such as cad data, The computer scanning draw, drawn, available data etc.) may be used for the eyespot that defines as shown in figure 15. It should be noted that, the region 710 of semiconductor device 700 as shown in figure 15 does not include described pad 702n Not normal with 702o.By with include the eyespot 710 shown in Figure 15 start (described eyespot use Primary data is defined, and on a wire bonding machine before hands-on sample device 700), eyespot 710 By original definition for there is no some defect.Hereafter, when on a wire bonding machine defined eyespot 710 being entered During row hands-on (such as use have at pad 702n and 702o as shown in fig. 13 that not normal Sample device 700), training managing can be ignored some defect, because train on a wire bonding machine During, only confirm described sample device total information (pad that such as eyespot 710 includes Shape and relative position).Therefore, by utilizing (1) about the given data of semiconductor device, knot Close the sample device that (2) train on a wire bonding machine, it is provided that the eyespot of improvement.
Figure 16 is the schematic diagram of the eyespot 710a improved further of semiconductor device 700.More Say body, from eyespot 710a, ignore the selected area of this part of semiconductor device 700.These quilts Favored area is marked as shade in figure 16 (namely " can hide " institute from eyespot training managing State shadow region).As shown in figure 16, the inside of each pad is marked as shade, so that in described Portion is not included in the eyespot being trained to.More specifically, from eyespot 710a, pad 700a is ignored Inside 700a1.For the inside 700b1 of pad 700b, the inside 700c1 of pad 700c, with And each pad 700d, 700l, 700m, 700n, 700o, 702a, 702b, 702c, 702m, The inside of 702n and 702o, is also so.
Additionally, also include the region outside actual pad in eyespot 710a, in order to instruct for (1) (the such as shape of the pad of eyespot 710a is with respective in the shape/relevant position of the feature of white silk eyespot 710a Position), and (2) later scanning of eyepoint 710a, reduce error, and provide and position described shape Region.More specifically, around pad 700a, provide non-hatched area 700a2, and at pad Non-hatched area 700b2 is provided around 700b.For each pad 700c, 700d, 700l, 700m, 700n, 700o, 702a, 702b, 702c, 702m, 702n and 702o provide (institute in figure 16 Show) described non-hatched area.By providing the region around these, by increasing capacitance it is possible to increase every in taught eyepoint The probability of the exact outline (with they mutual outline position) of individual pad.
Figure 17 be the present invention exemplary embodiment in the top view of semiconductor device 800 part, Semiconductor device 800 includes the selected region 810 including eyespot.Semiconductor device 800 includes many Individual pad.As shown in figure 17, semiconductor device include pad 800a, 800b, 800c, 800d, 800e, 800f, 800g, 800h, 800i, 800j and 800k.Semiconductor device 800 also includes component 804。
As shown in the dashed box line in Figure 17, the region 810 of semiconductor device 800 include pad 800a, 800b, 800c, 800d, 800h, 800i and 800j, and component 804.Therefore, it should clear Chu, except pad and reference point (such as component 804, it can be wiring diagram, wire figure etc.) outward, Can consider to be used as the shape (with respective position) of the part of semiconductor device a part for eyespot.
Figure 18 is the schematic diagram of the eyespot 810a improved further of semiconductor device 800.More Say body, from eyespot 810a, ignore the selected area of this part of semiconductor device 800.These quilts Favored area is marked as shade in figure 18 (namely " can hide " institute from eyespot training managing State shadow region).As shown in figure 18, the inside of each pad is marked as shade, so that in described Portion is not included in the eyespot being trained to.More specifically, from eyespot 810a, pad 800a is ignored Inside 800a1.For the inside 800b1 of pad 800b, the inside 800c1 of pad 800c, with And the inside of each pad 800d, 800h, 800i and 800j, and the inside of component 804a 804a1, is also so.
Additionally, the district outside also including actual pad in eyespot 810a and outside component 804 Territory, in order to for the feature of (1) taught eyepoint 810a shape/relevant position (such as eyespot 810a's Pad and the shape of component 804 and respective position), and (2) later scanning of eyepoint 810a, Reduce error, and the region positioning described shape is provided.More specifically, carry around pad 800a For non-hatched area 800a2, and around pad 800b, provide non-hatched area 800b2.For often Individual pad 800c, 800d, 800h, 800i and 800j, and provide (at figure for component 804 Shown in 18) this non-hatched area.By providing the region around these, by increasing capacitance it is possible to increase training eye In point, the exact outline of each pad (with the profile of component 804) is (with they mutual wheels Wide position) probability.
Figure 19 is the top view of semiconductor device 900.As shown in figure 19, two differences are defined Eyespot (namely eyespot 910a and eyespot 910b).It is understood, therefore, that it is disclosed herein The described training of the present invention, by its multiple exemplary embodiments, can be to use multiple eyespots Mode, is applied in wire bond operation.
Although multiple accompanying drawing provided in this article simply show separately semiconductor chip, but should Understanding, in this processing procedure of wire bond, semiconductor chip is generally already welded to supporting construction, as Welding (chip such as utilizing binding agent etc welds) framework or substrate.Figure 20 is welded onto welding The semiconductor device 1000(of framework 1050 such as semiconductor chip 1000) part top view.
Semiconductor device 1000 include pad 1000a, 1000b, 1000c, 1000d, 1000e, 1000f, 1000g, 1000h, 1000i, 1000j and 1000k.It is chosen as eyespot 1010 including weldering Dish 1000a, 1000b, 1000c, 1000d, 1000h, 1000i and 1000j.Lead frame 1050 Including multiple " lead-in wires ", described " lead-in wire " includes go between 1050a, 1050b, 1050c, 1050d And 1050e.During processing semiconductor device (such as wire bond), it some times happens that by the completeest Situation on a wire bonding machine placed by the device becoming wire bond.Such as this is probably a kind of error.It is also possible to It is that the part of this device is complete wire bond, but another part of this device remains a need for carrying out wire bond. Whether the device being highly desirable to know in wirebond machine is complete wire bond.Such as if it is not known that, then may be used The device being complete wire bond can be made again to suffer less desirable wire bond, in this case, it is possible to meeting Damage this device, or cause useless process.
Exemplary embodiment according to the present invention, it is provided that one determines whether device is complete wire bond Method.As shown in figure 20, it is shown that multiple wire loop 1002a, 1002b, 1002c, 1002h and 1002i.More specifically, wire loop 1002a(includes the ball bond being soldered on pad 1000a 1002a1) between pad 1000a and lead-in wire 1050a, provide electrical connection;Wire loop 1002b(includes Be soldered to ball bond 1002b1 on pad 1000b) pad 1000b and lead-in wire 1050b it Between provide electrical connection;Wire loop 1002c(includes the ball bond being soldered on pad 1000c 1002c1) between pad 1000c and lead-in wire 1050c, provide electrical connection;Wire loop 1002h(includes Be soldered to ball bond 1002h1 on pad 1000h) pad 1000h and lead-in wire 1050d it Between provide electrical connection;And wire loop 1002i(includes the ball bond that is soldered on pad 1000i 1002i1) between pad 1000i and lead-in wire 1050e, provide electrical connection.Use mode identification method And/or system, such as above for relative position (the such as bond pad shapes of training shapes with training shapes Relative position with bond pad shapes) time describe, the shape of a part for wire loop can be identified.More Specifically, can by algorithm configuration be search semiconductor chip pad, with determine whether incited somebody to action Filament is welded on described pad.In the example shown in fig. 20, can be at pad by algorithm configuration The shape of upper search ball bond (the most circular, oval etc.), in order to know filament the most by It is welded on described pad.
Additionally, also provide for the further feature of this aspect of the present invention.Such as can select eyespot (such as Eyespot 1010 shown in Figure 20), to be included in wire bonding process, by the weldering by wire bond for the first time Dish.Can be by by the first of wire bond pad with reference to Figure 20, pad 1000a.Therefore, by eyespot 1010 are chosen as including this pad.Equally, use pattern recognition, with know filament the most by It is welded in the processing procedure of pad (such as by finding the shape of ball bond on pad), because of The first pad that may be complete wire bond is included for selected eyespot, it is found that the line welded The probability of silk (such as wire loop 1002a) is the biggest.
Furthermore, it is possible to will determine whether filament has been soldered to the side on the pad of semiconductor device Method, is integrated in the process of taught eyepoint.Can realize the most in the first step for training basis The training managing of the eyespot of the present invention.In the second step, can train for training the second eyespot (to use In the eyespot checking bonding wire silk) different training managings.It follows that when being existed by the device of wire bond Time on described machine, use the first taught eyepoint can complete location confirmation and/or device alignment.Then, Once complete to confirm position and/or the alignment of device, then can complete the second scanning, to check whether to deposit At bonding wire silk.In this embodiment, described first eyespot described interior of bond pads can be hidden (as Shown in Fig. 4,8,12,16 and 18), meanwhile, described interior of bond pads is not hidden by described second eyespot (so that the inside of described pad can be scanned, to obtain ball bond shapes).
In another alternative embodiment, single eyespot can be trained, and complete by by wire bond The single sweep operation of practical devices.In this embodiment, described in eyespot, interior of bond pads at least partially may be used With the most covered, so that the inside of described pad can be scanned, to obtain ball bond shapes.
Although in conjunction with wire loop, to determining whether pad is complete the method for wire bond and is described, It is understood that checked wire bond can be to have different forms, such as conductive salient point (such as Stud bumps etc.).
Figure 21~22 is the flow chart according to some exemplary embodiment of the present invention.As this area skill Art personnel understood, can ignore some step included at described flow chart;Can be increased certain A little additional steps;And the order of described step can be changed according to shown order.
More specifically, the flow chart of Figure 21 shows in the exemplary embodiment of the present invention, instruction The method practicing the eyespot operated for wire bond.In step 2100 place, from semiconductor device region In be chosen for use as one group of shape of eyespot.The most described shape group can include bond pad shapes, reference point Shape, circuitry shapes etc..In step 2102 place, use (A) sample semiconductor device or (B) At least one in the tentation data relevant with this semiconductor device, trains described eyespot for wirebond machine. This training step includes the position defining each described shape relative to another shape.Can be by described Position is defined as including the region of the surrounding of each in this group shape.Described eyespot can be defined as Including described shape group, hide the preset range (namely step 2104) in described region simultaneously, so that Described preset range is removed from described eyespot.The most described covering step can include using a kind of calculation Method, to remove the position of the preset range in described region from described eyespot.Described covering step is permissible Including hiding the interior section of pad selected by (1), with in the part in the region between (2) pad At least one.At optional step 2106, train the second eyespot for wirebond machine.This second eyespot pair Should the shape of a part of wire loop on the pad of described semiconductor device.One of the most described wire loop Point shape can the shape of ball bond of corresponding described wire loop.
The flow chart of Figure 22 shows a kind of method operating wirebond machine.The step of shown method 2200, the step 2100 of flow chart shown in 2202,2204 and 2206 corresponding Figure 21,2102, 2104 and 2106.In step 2208 place, it is configured to by the first semiconductor device of wire bond, quilt It is directed to the precalculated position (such as solder joint) of wirebond machine.In step 2210 place, use regarding of wirebond machine Vision system scan described first semiconductor device selected portion, wherein described in selected portion correspondence by The eyespot (such as in the eyespot of step 2202 place training) of training.In step 2212 place, by by institute State taught eyepoint compared with the selected portion of described first semiconductor device, for described the first half Conductor device specifies a percent.After step 2212, before wire bond operates, it may be determined that The position of described first semiconductor device should be adjusted.In step 2214 place, be based at least partially on by The described taught eyepoint result compared with the selected portion of described first semiconductor device, adjusts The position of described first semiconductor device.In step 2216 place, in described first semiconductor pads with another Between one welding position, create (such as wire bond) wire loop.Thus, it is provided that the improvement of a kind of wirebond machine Operation.
As will be appreciated by a person skilled in the art, the first semiconductor device as described above differs Surely it is first device of labelling after the teaching process.Use term " first ", be only for by this device Part is distinguished mutually with described sample device, such as in step 2102 place.Should be appreciated that multiple device is permissible Labeled, scanning etc., in order to determine acceptable mark, and the mark that cannot accept.
Although the eyespot related generally in a position of (1) definition/training sample device, and Then (2) are scanned by the corresponding position of the device of wire bond, to confirm that this will be can by the device of wire bond With received, invention has been described, but is not limited thereto.In some applications, may be used To occur, device (such as at solder joint) is moved, or the direction of device is not at solder joint Know.In this case, by scanning by by the device of wire bond, it appeared that eyespot is (namely The eyespot that either exemplary embodiment according to the present invention is defined/trains).If such as eyespot includes five Individual (5) pad, described pad have reservation shape/size and predetermined relative to another Position (such as predetermined by training managing), then by scanning this device and positioning corresponding training The feature of eyespot, it may be determined that by the position by the semiconductor device of wire bond.Certainly, this eyespot is trained Can be completed, such as by any example method described herein: (1) automatically generates this eye Point (such as uses available data to generate), and (2) utilize operator to intervene to generate this eyespot, and / or (3) scanning device include that the region of this eyespot (such as uses and single checks scope, use multiple Check the set etc. of scope).
Although relate generally to eyespot can for device wire bond (or other process, as short column plush copper, Device inspection etc.) before, it is properly located and/or alignment of semiconductor devices, present invention is described, But it is not limited thereto.Training provided in this article can also be applied to train for other application multiple Eyespot.The most typically, before by semiconductor chip wire bond to lead frame or other substrate, Train this lead frame or substrate.Additionally, in some applications, semiconductor core blade can connect Between lead frame, train this semiconductor chip or lead frame.Therefore, side described herein Method (Part Methods shown by such as Figure 21~22), it is also possible to be applied in die bonding operation institute The alignment done.Equally, multiple exemplary embodiments of the present invention can also be applied to about described and its The eyespot of its application.
Although for specific embodiment the present invention being carried out example and description in this article, but this Bright it is not intended to be limited to shown details.And, without deviating from the invention, in institute State in the scope of claim and equivalence, multiple amendment can be carried out in detail.

Claims (20)

1. it is a method for wire bond operation training eyespot, said method comprising the steps of:
(1) select from semiconductor device region one group of shape be used as eyespot, wherein said one The invariant features of group shape pattern on described semiconductor device;
(2) use and one of following train described eyespot for wirebond machine: (a) sample semiconductor device, Or the tentation data that (b) is relevant with described semiconductor device;This training step includes defining described shape In each relative to another position;And
(3) it is defined as described eyespot including described group of shape, hides the predetermined model in described region simultaneously Enclose, so that described preset range is removed from described eyespot.
2. the method for claim 1, wherein step (1) includes selecting described group of shape, So that it includes multiple bond pad shapes.
3. the method for claim 1, wherein step (1) includes selecting described group of shape, So that it includes multiple bond pad shapes and at least one reference point shape.
4. the method for claim 1, wherein said covering step include hiding the most following it One: the some parts in the region between the interior section of pad selected by (1), and (2) pad.
5. the method for claim 1, wherein step (2) includes each described shape It is defined as also including around the region of shape each described.
6. the method for claim 1, further comprises the steps of:
(4) being that described wirebond machine trains the second eyespot, described second eyespot corresponds to described semiconductor device The shape of a part for wire loop on the pad of part.
7. method as claimed in claim 6, the shape of a described part for wherein said wire loop is corresponding Shape in the ball bond of described wire loop.
8. the method for claim 1, the eyespot wherein trained by described method is configured Back-up eyepoint for wire bond operation.
9. the method operating wirebond machine, described method includes step:
(1) select from semiconductor device region one group of shape be used as eyespot, wherein said one The invariant features of group shape pattern on described semiconductor device;
(2) use and one of following train described eyespot for described wirebond machine: (a) i type semiconductor Device, or the tentation data that (b) is relevant with described semiconductor device;This training step includes defining institute State in shape each relative to another position;
(3) precalculated position of described wirebond machine will be directed to by the first semiconductor device of wire bond;With And
(4) visual system using described wirebond machine scans the selected portion of described first semiconductor device Point, selected portion is corresponding to the described eyespot being trained to.
10. method as claimed in claim 9, wherein step (1) includes selecting described group of shape, So that it includes multiple bond pad shapes.
11. methods as claimed in claim 9, wherein step (1) includes selecting described group of shape, So that it includes multiple bond pad shapes and at least one reference point shape.
12. methods as claimed in claim 9, after described step (2) and in described step (3) The most also comprise the steps:
It is defined as described eyespot including described group of shape, hides the preset range in described region simultaneously, So that described preset range is removed from described eyespot.
13. methods as claimed in claim 12, wherein said covering step includes, under hiding at least One of row: some portions in the described region between the interior section of pad selected by (1), and (2) pad Point.
14. methods as claimed in claim 9, wherein step (2) includes each described shape It is defined as also including around the region of shape each described.
15. methods as claimed in claim 9, also comprise the steps:
(5) being that described wirebond machine trains the second eyespot, described second eyespot corresponds to described semiconductor device The shape of a part for wire loop on the pad of part.
16. methods as claimed in claim 15, the shape pair of a described part for wherein said wire loop The shape of the ball bond of wire loop described in Ying Yu.
17. methods as claimed in claim 9, the wherein described eyespot quilt of training in step (2) It is configured to the back-up eyepoint of wire bond operation.
18. methods as claimed in claim 9, also comprise the steps:
(5) by by the described eyespot that is trained to compared with the selected portion of described first semiconductor device Relatively, for described first semiconductor device one percent of distribution.
19. methods as claimed in claim 9, also comprise the steps:
(5) it is based at least partially on and is trained to described selected by eyespot and described first semiconductor device The result that part compares, adjusts the position of described first semiconductor device.
20. methods as claimed in claim 9, also comprise the steps:
(5) between the pad and another welding position of described first quasiconductor, wire loop is created.
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US10776912B2 (en) * 2016-03-09 2020-09-15 Agency For Science, Technology And Research Self-determining inspection method for automated optical wire bond inspection
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Citations (3)

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US4759073A (en) * 1985-11-15 1988-07-19 Kulicke & Soffa Industries, Inc. Bonding apparatus with means and method for automatic calibration using pattern recognition
US4864514A (en) * 1986-09-02 1989-09-05 Kabushiki Kaisha Toshiba Wire-bonding method and apparatus
US6465898B1 (en) * 2001-07-23 2002-10-15 Texas Instruments Incorporated Bonding alignment mark for bonds over active circuits

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Publication number Priority date Publication date Assignee Title
US4759073A (en) * 1985-11-15 1988-07-19 Kulicke & Soffa Industries, Inc. Bonding apparatus with means and method for automatic calibration using pattern recognition
US4864514A (en) * 1986-09-02 1989-09-05 Kabushiki Kaisha Toshiba Wire-bonding method and apparatus
US6465898B1 (en) * 2001-07-23 2002-10-15 Texas Instruments Incorporated Bonding alignment mark for bonds over active circuits

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