CN103595382A - Drive circuit and current control circuit therein - Google Patents
Drive circuit and current control circuit therein Download PDFInfo
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- CN103595382A CN103595382A CN201210289797.2A CN201210289797A CN103595382A CN 103595382 A CN103595382 A CN 103595382A CN 201210289797 A CN201210289797 A CN 201210289797A CN 103595382 A CN103595382 A CN 103595382A
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Abstract
Provided is a current control circuit used to control a drive circuit, so that the drive circuit correspondingly drives a power metal oxide semiconductor transistor. The current control circuit comprises a current mirror, a clamping P-type metal oxide semiconductor transistor, and a peak-current control branch circuit. The peak-current control branch circuit comprises a capacitor, a resistor, and a control N-type metal oxide semiconductor transistor. When the switching signal the capacitor receives is in a voltage level status, the control N-type metal oxide semiconductor transistor is connected, a first current branch of the current mirror provides peak current, and a second current branch circuit correspondingly outputs control current to a control endpoint of the drive circuit. Thus, the driving voltage of a power grid of the power metal oxide semiconductor transistor output by the drive circuit decreases, so that the power metal oxide semiconductor transistor is started.
Description
Technical field
The invention relates to a kind of electronic circuit, and particularly relevant for a kind of drive circuit and current control circuit wherein.
Background technology
Electronic product has become an indispensable part in modern's life.In electronic installation miscellaneous, need to can be applicable to the semiconductor subassembly in these devices.The characteristic of semiconductor subassembly is mainly to be decided by the processing procedure of preparing this assembly.Because semiconductor subassembly is conventionally more complicated, its processing procedure also changes more.In semiconductor subassembly, need the multiple transistor with different qualities.High voltage transistor is the element that can design at the environment of operation with high pressure in order to meet.
In addition, for meeting modern's demand, electronic product is designed to compact kenel gradually, carries being convenient for people to.Consider the choice of electronic product between its size and element speeds, how to maintain under the situation that area is little, design and can have identical, the power MOS transistor of switching speed even faster, one of problem of inquiring into for those skilled in the art.
Summary of the invention
One technical elements of content of the present invention is about a kind of current control circuit, and in order to control drive circuit, mat makes correspondingly driving power metal oxide semiconductor transistor of aforementioned drive circuit.Aforementioned currents control circuit comprises current mirror, clamp P-type mos transistor and peak current and controls branch road.Furthermore, peak current control branch road comprises electric capacity, resistance and controls N-type metal oxide semiconductor transistor.The first current branch of aforementioned currents mirror and one end of aforementioned the second current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential.The transistorized aforementioned control end of aforementioned clamp P-type mos is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror.
In addition, aforementioned peak current is controlled the first end of electric capacity in branch road in order to receiving key signal, and by its second end output coupled signal.The aforementioned first end of aforementioned resistance is electrically coupled to aforementioned second end of aforementioned electric capacity, and its second end is in order to receive the second current potential.The control end of aforementioned control N-type metal oxide semiconductor transistor is electrically coupled to aforementioned second end of aforementioned electric capacity, and its second end is electrically coupled to transistorized the second end of aforementioned clamp P-type mos.
When the aforementioned switches signal receiving when the aforementioned first end of aforementioned electric capacity is voltage level state, the conducting of aforementioned control N-type metal oxide semiconductor transistor, and provide peak current by aforementioned first current branch of aforementioned currents mirror, aforementioned second current branch of aforementioned currents mirror is correspondingly exported and is controlled electric current to the control end points of aforementioned drive circuit, the driving voltage that mat makes aforementioned drive circuit export the power grid of aforementioned power metal oxide semiconductor transistor to declines, to open aforementioned power metal oxide semiconductor transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak current in special time.
According to another embodiment of the present invention, how second aforementioned special time is less than approximately 20.
According to yet another embodiment of the invention, the aforementioned resistance of aforementioned peak current control branch road can discharge to aforementioned coupled signal.
According to further embodiment of this invention, aforementioned the first current potential is positive potential, and aforementioned the second current potential is less than aforementioned the first current potential.
An another embodiment again according to the present invention, aforementioned power metal oxide semiconductor transistor is high voltage most.
Another technical elements of content of the present invention is about a kind of drive circuit, and it is in order to driving power metal oxide semiconductor transistor.Aforementioned drive circuit comprises current control circuit, first and drives branch road and second to drive branch road.Furthermore, aforementioned currents control circuit comprises current mirror, the first clamp P-type mos transistor and peak current control branch road.Aforementioned first drives branch road to comprise current source, the second clamp P-type mos transistor and the first switch N-type metal oxide semiconductor transistor.Aforementioned second drives branch road to comprise electric current supply P-type mos transistor, the 3rd clamp P-type mos transistor and second switch N-type metal oxide semiconductor transistor.Wherein, peak current control branch road comprises electric capacity, resistance and controls N-type metal oxide semiconductor transistor.
In addition, in aforementioned currents control circuit, the first current branch of current mirror and one end of the second current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential.The transistorized control end of aforementioned the first clamp P-type mos is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror.Aforementioned first drives in branch road the transistorized control end of the second clamp P-type mos in order to receive above-mentioned reference voltage, and its first end is electrically coupled to end points and the aforementioned currents source controlled.The control end of aforementioned the first switch N-type metal oxide semiconductor transistor is in order to receive phase-veversal switch signal, and its first end is electrically coupled to transistorized aforementioned the second end of aforementioned the second clamp P-type mos.
Aforementioned second drives the transistorized control end of electric current supply P-type mos in branch road to be electrically coupled to aforementioned control end points, and its first end is in order to receive aforementioned the first current potential.The transistorized control end of aforementioned the 3rd clamp P-type mos is in order to receive above-mentioned reference voltage, its first end is electrically coupled to transistorized the second end of aforementioned currents supply P-type mos, and its first end outputting drive voltage is to the power grid of aforementioned power metal oxide semiconductor transistor.Aforementioned second drives the control end of second switch N-type metal oxide semiconductor transistor in branch road in order to receive aforementioned switches signal, and its first end is electrically coupled to the second end of aforementioned the 3rd clamp N-type metal oxide semiconductor transistor.
In addition, aforementioned peak current is controlled the first end of the electric capacity of peak current control branch road in branch road in order to receiving key signal, and by its second end output coupled signal.The first end of aforementioned resistance is electrically coupled to aforementioned second end of aforementioned electric capacity, and the second end of aforementioned resistance is in order to receive the second current potential.The control end of front control N-type metal oxide semiconductor transistor is electrically coupled to the second end of aforementioned electric capacity, and its first end is electrically coupled to transistorized the second end of aforementioned clamp P-type mos.
Holding institute chats, when the aforementioned switches signal receiving when the aforementioned first end of aforementioned electric capacity is voltage level state, the conducting of aforementioned control N-type metal oxide semiconductor transistor, aforementioned first current branch of aforementioned currents mirror provides peak current, aforementioned second current branch of aforementioned currents mirror is correspondingly exported and is controlled electric current to the control end points of aforementioned drive circuit, the driving voltage that mat makes aforementioned drive circuit export the power grid of aforementioned power metal oxide semiconductor transistor to declines, to open aforementioned power metal oxide semiconductor transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak current in special time.
According to another embodiment of the present invention, how second aforementioned special time is less than approximately 20.
According to yet another embodiment of the invention, the aforementioned resistance of aforementioned peak current control branch road can discharge to aforementioned coupled signal.
According to further embodiment of this invention, aforementioned the first current potential is positive potential, and aforementioned the second current potential is less than aforementioned the first current potential.
An another embodiment again according to the present invention, aforementioned power metal oxide semiconductor transistor is high voltage most.
The another technical elements of content of the present invention is about a kind of current control circuit, and it is in order to control drive circuit, and mat makes correspondingly driving power metal oxide semiconductor transistor of drive circuit.Aforementioned currents control circuit comprises current mirror, clamp N-type metal oxide semiconductor transistor and peak current and controls branch road.Furthermore, aforementioned peak current control branch road comprises electric capacity, resistance and controls P-type mos transistor.The first current branch of aforementioned currents mirror and one end of the second current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential.The control end of aforementioned clamp N-type metal oxide semiconductor transistor is in order to receive reference voltage, and its first end is electrically coupled to the first current branch of aforementioned currents mirror.
In addition, aforementioned peak current is controlled the first end of electric capacity in branch road in order to receiving key signal, and by its second end output coupled signal.The first end of aforementioned resistance is electrically coupled to aforementioned second end of aforementioned electric capacity, and its second end is in order to receive the second current potential.The transistorized control end of aforementioned control P-type mos is electrically coupled to aforementioned second end of aforementioned electric capacity, and its first end is electrically coupled to the second end of aforementioned clamp N-type metal oxide semiconductor transistor.When the aforementioned switches signal receiving when the aforementioned first end of aforementioned electric capacity is voltage level state, aforementioned control P-type mos transistor turns, and provide electric current by aforementioned first current branch of aforementioned currents mirror, aforementioned second current branch of aforementioned currents mirror is correspondingly drawn electric current by controlling end points, the driving voltage that mat makes aforementioned drive circuit export the power grid of aforementioned power metal oxide semiconductor transistor to rises, to open aforementioned power metal oxide semiconductor transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak current in special time.
According to another embodiment of the present invention, how second aforementioned special time for being less than approximately 20.
According to further embodiment of this invention, aforementioned currents control circuit also comprises voltage supply N-type metal oxide semiconductor transistor, it comprises first end and the second end, aforementioned first end is electrically coupled to transistorized the second end of control P-type mos that aforementioned peak current is controlled branch road, and aforementioned the second end is in order to receive high voltage potential.
According to yet another embodiment of the invention, the aforementioned resistance of aforementioned peak current control branch road can charge to aforementioned second end of aforementioned electric capacity.
According to further embodiment of this invention, aforementioned the first current potential is negative potential, and aforementioned the second current potential is greater than aforementioned the first current potential.
An another embodiment again according to the present invention, aforementioned power metal oxide semiconductor transistor is high voltage most.
A technical elements again of content of the present invention is about a kind of drive circuit, and it is in order to driving power metal oxide semiconductor transistor.Aforementioned drive circuit comprises current control circuit, first and drives branch road and second to drive branch road.Furthermore, aforementioned currents control circuit comprises current mirror, the first clamp N-type metal oxide semiconductor transistor and peak current control branch road.Aforementioned first drives branch road to comprise current source, the second clamp N-type metal oxide semiconductor transistor and the first switch P type metal oxide semiconductor transistor.Aforementioned second drives branch road to comprise electric current supply N-type metal oxide semiconductor transistor, the 3rd clamp N-type metal oxide semiconductor transistor and second switch P-type mos transistor.Wherein, aforementioned peak current control branch road comprises electric capacity, resistance and controls P-type mos transistor.
In addition, in aforementioned currents control circuit, the first current branch of current mirror and one end of the second current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential.The control end of aforementioned the first clamp N-type metal oxide semiconductor transistor is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror.Aforementioned first drives the control end of the second clamp N-type metal oxide semiconductor transistor in branch road in order to receive above-mentioned reference voltage, and its first end is electrically coupled to end points and the aforementioned currents source controlled.The transistorized control end of aforementioned the first switch P type metal oxide semiconductor is in order to receive phase-veversal switch signal, and its first end is electrically coupled to the second end of aforementioned the second clamp N-type metal oxide semiconductor transistor.
Aforementioned second drives the control end of electric current supply N-type metal oxide semiconductor transistor in branch road to be electrically coupled to aforementioned control end points, and its first end is in order to receive aforementioned the first current potential.The control end of aforementioned the 3rd clamp N-type metal oxide semiconductor transistor is in order to receive above-mentioned reference voltage, its first end is electrically coupled to the second end of aforementioned currents supply N-type metal oxide semiconductor transistor, and its first end outputting drive voltage is to the power grid of aforementioned power metal oxide semiconductor transistor.Aforementioned second drives in branch road the transistorized control end of second switch P-type mos in order to receive aforementioned switches signal, and its first end is electrically coupled to the second end of aforementioned the 3rd clamp N-type metal oxide semiconductor transistor.
In addition, the first end of electric capacity that in aforementioned currents control circuit, peak current is controlled branch road is in order to receiving key signal, and by its second end output coupled signal.The first end of aforementioned resistance is electrically coupled to aforementioned second end of aforementioned electric capacity, and its second end is in order to receive the second current potential.The transistorized control end of aforementioned control P-type mos is electrically coupled to aforementioned second end of aforementioned electric capacity, and its first end is electrically coupled to the second end of aforementioned the first clamp N-type metal oxide semiconductor transistor.
From the above, when the aforementioned switches signal receiving when the aforementioned first end of aforementioned electric capacity is voltage level state, aforementioned control P-type mos transistor turns, aforementioned first current branch of aforementioned currents mirror provides peak current, aforementioned second current branch of aforementioned currents mirror is correspondingly drawn electric current by controlling end points, the aforementioned driving voltage that mat makes the aforementioned first end of aforementioned the 3rd clamp N-type metal oxide semiconductor transistor export the aforementioned power grid of aforementioned power metal oxide semiconductor transistor to rises, to open aforementioned power metal oxide semiconductor transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak current in special time.
According to another embodiment of the present invention, how second aforementioned special time for being less than approximately 20.
According to further embodiment of this invention, aforementioned drive circuit also comprises voltage supply N-type metal oxide semiconductor transistor, it comprises first end and the second end, aforementioned first end is electrically coupled to transistorized second end of control P-type mos of aforementioned currents control circuit, and aforementioned the second end is in order to receive high voltage potential.
According to yet another embodiment of the invention, the aforementioned resistance of aforementioned peak current control branch road can charge to the second end of aforementioned electric capacity.
According to further embodiment of this invention, aforementioned the first current potential is positive potential, and aforementioned the second current potential is greater than aforementioned the first current potential.
An another embodiment again according to the present invention, aforementioned power metal oxide semiconductor transistor is high voltage most.
Therefore, according to technology contents of the present invention, the embodiment of the present invention is by a kind of drive circuit and current control circuit being wherein provided, using transmission delay (propagation delay) phenomenon of improving power transistor, and further transmission delay phenomenon is contracted to 50 how second in.
Accompanying drawing explanation
For above and other objects of the present invention, feature, advantage and embodiment can be become apparent, appended graphic being described as follows:
Fig. 1 is in one embodiment of the invention, a kind of circuit diagram of drive circuit; And
Fig. 2 is in another embodiment of the present invention, a kind of circuit diagram of drive circuit.
[main element label declaration]
100,200: drive circuit 120,220: driving stage
110,210: current control circuit 122,222: the first driving branch roads
112,212: current mirror 123,223: current source
114,214: peak current is controlled branch road 124, driven branch road at 224: the second
Embodiment
In order to make narration of the present invention more detailed and complete, can be with reference to the appended various embodiment of graphic and the following stated, graphic in identical number represent same or analogous element.But the scope that the embodiment providing is not contained in order to limit the present invention, and the description of structure running is non-in order to limit the order of its execution, any structure being reconfigured by element, the device with impartial effect that produces, is all the scope that the present invention is contained.
Wherein graphic only for the purpose of description, according to life size, do not map.On the other hand, well-known element and step are not described in embodiment, to avoid that the present invention is caused to unnecessary restriction.
In addition, about " coupling " used herein or " connection ", all can refer to two or a plurality of element mutually directly make entity or in electrical contact, or mutually indirectly put into effect body or in electrical contact, also can refer to two or a plurality of element mutual operation or action.
Fig. 1 illustrates a kind of schematic diagram of drive circuit according to one embodiment of the invention, it is in order to driving power metal oxide semiconductor transistor MP0.As shown in the figure, drive circuit 100 comprises current control circuit 110 and driving stage 120, and driving stage 120 comprises again the first driving branch road 122 and second and drives branch road 124.
In the present embodiment, power MOS transistor MP0 is P type high voltage most.High voltage most (high voltage MOS; HVMOS) for can bear high-tension transistor, in an embodiment, refer to and can bear to approximately 10 volts or above high pressure, be different from general common withstand voltage (as 3.3 volts or 5 volts).In some semiconductor fabrications, can produce and there is source electrode and the drain electrode that can bear high pressure, and grid only can bear the power MOS transistor of small voltage (as 5 volts).The power MOS transistor designing in this way, can be under the less situation of area, reach power MOS transistor conducting resistance (RDS (on)) is diminished, further reach the transmission delay of power MOS transistor is reduced and rise time (rising time) and effect that fall time, (falling time) diminished.
For making the power MOS transistor of the above-mentioned type can be when driving, further improve its transmission delay (propagation delay) phenomenon, embodiment of the present invention design one drive circuit, by the electrical operation that configuration mode derived of its integrated circuit framework, the demand that can meet the power MOS transistor of this type, and by the transmission delay phenomenon of power MOS transistor be contracted to 50 how second in.Below by describing the structure and electrical mode of operation of the drive circuit of the embodiment of the present invention in detail, so that object of the present invention and effect are easier to understand.
First, conceptive in integrated operation, be by current control circuit 110 receiving key signals, and with output, control electric current to driving stage 120 according to switching signal, mat makes correspondingly driving power metal oxide semiconductor transistor MP0 of driving stage 120.
Above-mentioned current control circuit 110 comprises current mirror 112, the first clamp P-type mos transistor MP3 and peak current and controls branch road 114.As shown in Figure 1, furthermore, current mirror 112 comprises the first P-type mos transistor MP1 and the second P-type mos transistor MP2, wherein the first P-type mos transistor MP1 is positioned in the first current branch, and the second P-type mos transistor MP2 is positioned in the second current branch.In addition, peak current control branch road 114 comprises capacitor C 1, resistance R 1 and controls N-type metal oxide semiconductor transistor MN1.
In structure, the first current branch of the current mirror 112 of current control circuit 110 and one end of the second current branch are electrically coupled to public point N1, and this public point N1 is in order to receive the first current potential VGH.The control end of the first clamp P-type mos transistor MP3 of current control circuit 110 is in order to receive a reference voltage VM, and its first end is electrically coupled to the first current branch of current mirror 112.
At the peak current of current control circuit 110, control in branch road 114, the first end of capacitor C 1 is in order to receiving key signal IN, and by its second end output coupled signal.The first end of resistance R 1 is electrically coupled to the second end of capacitor C 1, and its second end is in order to receive the second current potential VSS.The control end of controlling N-type metal oxide semiconductor transistor MN1 is electrically coupled to the second end of capacitor C 1, and its first end is electrically coupled to first clamp P-type mos transistor MP3 the second end.
At this, it should be noted that, in the embodiment of the present invention, the control end of various metal oxide semiconductor transistor can be grid, the demand that its first end and the second end can configure according to side circuit, and be optionally source electrode or drain electrode.
In electrical operation, when the switching signal IN that the first end of the capacitor C 1 of peak current control branch road 114 receives in current control circuit 110 is a high state, control N-type metal oxide semiconductor transistor MN1 conducting, the first current branch of current mirror 112 provides peak current, and the second current branch of current mirror is correspondingly exported control electric current to the control end points N2 of driving stage 120, the driving voltage that mat makes driving stage 120 export the control end of power MOS transistor MP0 to declines, to open power MOS transistor MP0.
Need further illustrate, in current control circuit 110, the first current branch of current mirror 112 provides peak current in a special time.In one embodiment, how second aforementioned special time is less than approximately 20, therefore, the current control circuit 110 of the drive circuit 100 of the embodiment of the present invention can be within the extremely short time, produce rapidly peak current, and correspondingly export and control electric current to driving stage 120, to reach the object of rapid unlatching power MOS transistor MP0 within the same time.Yet the present embodiment is not in order to limit the present invention, those skilled in the art ought optionally adopt suitable parameter, and its concept person identical with the present invention fall into scope of the present invention.
In one embodiment, when above-mentioned peak current derives after the effect of rapid unlatching power MOS transistor MP0, in current control circuit 110, the resistance R 1 of peak current control branch road 114 can be discharged to the second end of capacitor C 1, thereby closing control N-type metal oxide semiconductor transistor MN1, now, above-mentioned peak current also will disappear in the lump, with after rapid unlatching power MOS transistor MP0, owing to controlling N-type metal oxide semiconductor transistor MN1, be closed, on current control circuit 110, meaningless electric energy consume will do not had.
First of above-mentioned driving stage 120 drives branch road 122 to comprise current source 123, the second clamp P-type mos transistor MP4 and the first switch N-type metal oxide semiconductor transistor MN2.The control end of the second clamp P-type mos transistor MP4 is in order to receive reference voltage VM, its first end is electrically coupled to controls end points N2 and current source 123, and is able to the control electric current of the second current branch output of current mirror 112 in received current control circuit 110.The control end of the first switch N-type metal oxide semiconductor transistor MN2 is in order to receive a phase-veversal switch signal
and its first end is electrically coupled to the second end of the second clamp P-type mos transistor MP4.
Moreover second of above-mentioned driving stage 120 drives branch road 124 to comprise electric current supply P-type mos transistor MP5, the 3rd clamp P-type mos transistor MP6 and second switch N-type metal oxide semiconductor transistor MN3.The control end of electric current supply P-type mos transistor MP5 is electrically coupled to controls end points N2, and its first end is in order to receive the first current potential VGH.The control end of the 3rd clamp P-type mos transistor MP6 is in order to receive reference voltage VM, its first end is electrically coupled to the second end of electric current supply P-type mos transistor MP5, and its first end outputting drive voltage is to the control end of power MOS transistor MP0.The control end of second switch N-type metal oxide semiconductor transistor MN3 is in order to receiving key signal IN, and its first end is electrically coupled to the second end of the 3rd clamp P-type mos transistor MP6.
In the present embodiment, in electrical operation, when the switching signal IN that the first end of the capacitor C 1 of peak current control branch road 114 receives in current control circuit 110 is a high state, control N-type metal oxide semiconductor transistor MN1 conducting, and the second switch N-type metal oxide semiconductor transistor MN3 conducting of the second driving branch road 124 in driving stage 120, the first current branch of current mirror 112 provides peak current, and the second current branch of current mirror 112 is correspondingly exported control electric current to controlling end points N2, control the voltage lifting of end points N2.Owing to controlling the voltage of end points N2, be the voltage that electric current is supplied the control end reception of P-type mos transistor MP5, thereby electric current supply P-type mos transistor MP5 will close under the voltage lifting of controlling end points N2.
Now, second drives the first end of the second switch N-type metal oxide semiconductor transistor MN3 of branch road 124 can draw output voltage V p, the driving voltage Vp that mat makes the first end of the 3rd clamp P-type mos transistor MP6 export the control end of power MOS transistor MP0 to declines, to open power MOS transistor MP0.
In one embodiment, above-mentioned the first current potential VGH is positive potential, and the second current potential VSS is less than the first current potential VG.In an embodiment, the second current potential VSS can be earthing potential.
Fig. 2 illustrates a kind of schematic diagram of drive circuit according to one embodiment of the invention, it is in order to driving power metal oxide semiconductor transistor MN0.As shown in the figure, drive circuit 200 comprises current control circuit 210 and driving stage 220, and driving stage 220 comprises again the first driving branch road 222 and second and drives branch road 224.
In the present embodiment, power MOS transistor MN0 is N-type high voltage most, and the characteristic of high voltage most has been specified in Fig. 1, at this, does not repeat.
For making the power MOS transistor of the above-mentioned type can be when driving, further improve its transmission delay (propagation delay) phenomenon, embodiment of the present invention design one drive circuit, by the electrical operation that configuration mode derived of its integrated circuit framework, the demand that can meet the power MOS transistor of this type, and by the transmission delay phenomenon of power MOS transistor be contracted to 50 how second in.Below by describing the structure and electrical mode of operation of the drive circuit of the embodiment of the present invention in detail, so that object of the present invention and effect are easier to understand.
First, conceptive in integrated operation, be by current control circuit 210 receiving key signals, and with output, control electric current to driving stage 220 according to switching signal, mat makes correspondingly driving power metal oxide semiconductor transistor MN0 of driving stage 220.
Above-mentioned current control circuit 210 comprises current mirror 212, the first clamp N-type metal oxide semiconductor transistor MN1 and peak current and controls branch road 214.As shown in Figure 2, furthermore, current mirror 212 comprises the first N-type metal oxide semiconductor transistor MN2 and the second N-type metal oxide semiconductor transistor MN3, wherein the first N-type metal oxide semiconductor transistor MN2 is positioned in the first current branch, and the second N-type metal oxide semiconductor transistor MN3 is positioned in the second current branch.In addition, peak current control branch road 214 comprises capacitor C 1, resistance R 1 and controls P-type mos transistor MP1.
In structure, the first current branch of the current mirror 212 of current control circuit 210 and one end of the second current branch are electrically coupled to public point N1, and this public point N1 is in order to receive the first current potential VEE.The control end of the first clamp N-type metal oxide semiconductor transistor MN1 of current control circuit 210 is in order to receive reference voltage VM, and its first end is electrically coupled to the first current branch of current mirror 212.
At the peak current of current control circuit 210, control in branch road 214, the first end of capacitor C 1 is in order to receiving key signal IN, and by its second end output coupled signal.The first end of resistance R 1 is electrically coupled to the second end of capacitor C 1, and its second end is in order to receive the second current potential VDDX.The control end of controlling P-type mos transistor MP1 is electrically coupled to the second end of capacitor C 1, and its first end is electrically coupled to the second end of the first clamp N-type metal oxide semiconductor transistor MN1.
In electrical operation, when the switching signal IN that the first end of the capacitor C 1 of peak current control branch road 214 receives in current control circuit 210 is a low state, capacitor C 1 output coupled signal is so that control P-type mos transistor MP1 conducting, now, the first current branch of current mirror 212 provides peak current, and the second current branch of current mirror is correspondingly drawn electric current by the control end points N2 of driving stage 220, the driving voltage that mat makes driving stage 220 export the control end of power MOS transistor MN0 to rises, to open power MOS transistor MN0.
Need further illustrate, in current control circuit 210, the first current branch of current mirror 212 provides peak current in a special time.In one embodiment, how second aforementioned special time is less than approximately 20, therefore, the current control circuit 210 of the drive circuit 200 of the embodiment of the present invention can be within the extremely short time, produce rapidly peak current, and correspondingly by driving stage 220, draw electric current within the same time, to reach the object of rapid unlatching power MOS transistor MN0.Yet the present embodiment is not in order to limit the present invention, those skilled in the art ought optionally adopt suitable parameter, and its concept person identical with the present invention fall into scope of the present invention.
In one embodiment, when above-mentioned peak current derives after the effect of rapid unlatching power MOS transistor MN0, in current control circuit 210, the resistance R 1 of peak current control branch road 214 can be charged to the second end of capacitor C 1, thereby closing control P-type mos transistor MP1, now, above-mentioned peak current also will disappear in the lump, with after rapid unlatching power MOS transistor MN0, owing to controlling P-type mos transistor MP1, be closed, on current control circuit 210, meaningless electric energy consume will do not had.
In another embodiment, current control circuit 210 also comprises voltage supply N-type metal oxide semiconductor transistor MN7, and voltage supply N-type metal oxide semiconductor transistor MN7 comprises first end and the second end.Aforementioned the second end is in order to receive high voltage potential VGH, and first end is electrically coupled to the second end that peak current is controlled the control P-type mos transistor MP1 of branch road 214, and its control end can be accepted a bulk potential VDD.For example, the second current potential VDDX can be VDD-Vth (threshold voltage).
Under this design architecture, when controlling P-type mos transistor MP1 conducting, the second end of the first N-type metal oxide semiconductor transistor MN2 on current mirror 212 first branch roads, by high voltage potential, VGH draws electric current, but not draws electric current to produce aforementioned peak current to the second current potential VDDX.So, can make integrated circuit running more stable.
First of above-mentioned driving stage 220 drives branch road 222 to comprise current source 223, the second clamp N-type metal oxide semiconductor transistor MN4 and the first switch P type metal oxide semiconductor transistor MP2.The control end of the second clamp N-type metal oxide semiconductor transistor MN4 is in order to receive reference voltage VM, and its first end is electrically coupled to controls end points N2 and current source 223.The control end of the first switch P type metal oxide semiconductor transistor MP2 is in order to receive a phase-veversal switch signal
, and its first end is electrically coupled to the second end of the second clamp N-type metal oxide semiconductor transistor MN4.
Moreover second of above-mentioned driving stage 220 drives branch road 224 to comprise electric current supply N-type metal oxide semiconductor transistor MN6, the 3rd clamp N-type metal oxide semiconductor transistor MN5 and second switch P-type mos transistor MP3.The control end of electric current supply N-type metal oxide semiconductor transistor MN6 is electrically coupled to controls end points N2, and its first end is in order to receive the first current potential VEE.The control end of the 3rd clamp N-type metal oxide semiconductor transistor MN5 is in order to receive reference voltage VM, its first end is electrically coupled to the second end of electric current supply N-type metal oxide semiconductor transistor MN6, and its first end outputting drive voltage is to the control end of power MOS transistor MN0.The control end of second switch P-type mos transistor MP3 is in order to receiving key signal IN, and its first end is electrically coupled to the second end of the 3rd clamp N-type metal oxide semiconductor transistor MN5.
In the present embodiment, in electrical operation, when the switching signal IN that the first end of the capacitor C 1 of peak current control branch road 214 receives in current control circuit 210 is low state, capacitor C 1 output coupled signal is so that control P-type mos transistor MP1 conducting, and the second switch P-type mos transistor MP3 conducting of the second driving branch road 224 in driving stage 220, the first current branch of current mirror 212 produces peak current, and the second current branch of current mirror 212 is correspondingly drawn electric current by controlling end points N2, control the voltage drop of end points N2.Owing to controlling the voltage of end points N2, be the voltage that electric current is supplied the control end reception of N-type metal oxide semiconductor transistor MN6, thereby electric current supply N-type metal oxide semiconductor transistor MN6 will close under the voltage drop of controlling end points N2.
Now, second drives the first end of the second switch P-type mos transistor MP3 of branch road 224 that voltage can be provided, the driving voltage Vp that mat makes the first end of the 3rd clamp N-type metal oxide semiconductor transistor MN5 export the control end of power MOS transistor MN0 to rises, to open power MOS transistor MN0.
In one embodiment, above-mentioned the first current potential VEE is negative potential, and the second current potential VDDX is greater than the first current potential VEE.
From the invention described above execution mode, application the present invention has following advantages.The embodiment of the present invention is by a kind of drive circuit and current control circuit being wherein provided, using transmission delay (propagation delay) phenomenon of improving power transistor, and further transmission delay phenomenon is contracted to 50 how second in.Moreover, after rapid unlatching power MOS transistor, the control metal oxide semiconductor transistor of controlling branch road due to peak current in current control circuit can be closed, and therefore, on current control circuit, will not have meaningless electric energy consume.
Although the present invention discloses as above with execution mode; so it is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when being used for a variety of modifications and variations, so protection scope of the present invention is when being as the criterion depending on the appended claim scope person of defining.
Claims (26)
1. a current control circuit, in order to control one drive circuit, mat makes this drive circuit correspondingly drive a power MOS transistor, comprises:
One current mirror, comprises one first current branch and one second current branch, and wherein one end of this first current branch and this second current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One clamp P-type mos transistor, comprises a control end, a first end and one second end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this current mirror;
One peak current is controlled branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switching signal;
One resistance, comprises a first end and one second end, and wherein this first end is electrically coupled to one second end of this electric capacity, and this second end is in order to receive one second current potential; And
One controls N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this second end of this electric capacity, and this first end is electrically coupled to transistorized this second end of this clamp P-type mos,
When this switching signal wherein receiving when this first end of this electric capacity is a voltage level state, this controls the conducting of N-type metal oxide semiconductor transistor, this of this current mirror the first current branch provides a peak current, this of this current mirror the second current branch is correspondingly exported a control electric current to one of this drive circuit and is controlled end points, the driving voltage that mat makes this drive circuit export the power grid of this power MOS transistor to declines, to open this power MOS transistor.
2. current control circuit according to claim 1, wherein this first current branch of this current mirror provides this peak current in a special time.
3. current control circuit according to claim 2, wherein how second this special time is less than approximately 20.
4. current control circuit according to claim 1, this resistance that wherein this peak current is controlled branch road can discharge to this coupled signal.
5. current control circuit according to claim 1, wherein this first current potential is a positive potential, and this second current potential is less than this first current potential.
6. current control circuit according to claim 1, wherein this power MOS transistor is a high voltage most.
7. a drive circuit, in order to drive a power MOS transistor, comprises:
One current control circuit, comprises:
One current mirror, comprises one first current branch and one second current branch, and wherein one end of this first current branch and this second current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One first clamp P-type mos transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this current mirror;
One peak current is controlled branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switching signal;
One resistance, comprises a first end and one second end, and wherein this first end is electrically coupled to one second end of this electric capacity, and this second end is in order to receive one second current potential; And
One controls N-type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is electrically coupled to this second end of this electric capacity, and this first end is electrically coupled to transistorized one second end of this first clamp P-type mos;
One first drives branch road, comprises:
One current source;
One second clamp P-type mos transistor, comprises a control end and a first end, and wherein this control end is in order to receive this reference voltage, and this first end is electrically coupled to a control end points and this current source; And
One first switch N-type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is in order to receive a phase-veversal switch signal, and this first end is electrically coupled to transistorized one second end of this second clamp P-type mos;
One second drives branch road, comprises:
One electric current supply P-type mos transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this control end points, and this first end is in order to receive this first current potential;
One the 3rd clamp P-type mos transistor, comprise a control end and a first end, wherein this control end is in order to receive this reference voltage, this first end is electrically coupled to transistorized one second end of this electric current supply P-type mos, and this first end is exported a driving voltage to a power grid of this power MOS transistor; And
One second switch N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive this switching signal, and this first end is electrically coupled to transistorized one second end of the 3rd clamp P-type mos,
When this switching signal wherein receiving when this first end of this electric capacity is a voltage level state, this controls the conducting of N-type metal oxide semiconductor transistor, this of this current mirror the first current branch provides a peak current, this of this current mirror the second current branch is correspondingly exported a control electric current and is controlled end points to this, this driving voltage that mat makes transistorized this first end of the 3rd clamp P-type mos export this power grid of this power MOS transistor to declines, to open this power MOS transistor.
8. drive circuit according to claim 7, wherein this first current branch of this current mirror provides this peak current in a special time.
9. drive circuit according to claim 8, wherein how second this special time for being less than approximately 20.
10. drive circuit according to claim 7, this resistance that wherein this peak current is controlled branch road can discharge to this second end of this electric capacity.
11. drive circuits according to claim 7, wherein this first current potential is a positive potential, and this second current potential is less than this first current potential.
12. drive circuits according to claim 7, wherein this power MOS transistor is a high voltage most.
13. 1 kinds of current control circuits, in order to control one drive circuit, mat makes this drive circuit correspondingly drive a power MOS transistor, comprises:
One current mirror, comprises one first current branch and one second current branch, and wherein one end of this first current branch and this second current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One clamp N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this current mirror; And
One peak current is controlled branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switching signal;
One resistance, comprises a first end and one second end, and wherein this first end is electrically coupled to one second end of this electric capacity, and this second end is in order to receive one second current potential; And
One controls P-type mos transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this second end of this electric capacity, and this first end is electrically coupled to one second end of this clamp N-type metal oxide semiconductor transistor,
When this switching signal wherein receiving when this first end of this electric capacity is a voltage level state, this controls P-type mos transistor turns, and provide electric current by this first current branch of this current mirror, this of this current mirror the second current branch is correspondingly controlled end points by one of this drive circuit and is drawn electric current, the driving voltage that mat makes this drive circuit export the power grid of this power MOS transistor to rises, to open this power MOS transistor.
14. current control circuits according to claim 13, wherein this first current branch of this current mirror provides this peak current in a special time.
15. current control circuits according to claim 14, wherein how second this special time for being less than approximately 20.
16. current control circuits according to claim 13, also comprise a voltage supply N-type metal oxide semiconductor transistor, wherein this voltage supply N-type metal oxide semiconductor transistor comprises a first end and one second end, this first end is electrically coupled to transistorized one second end of this control P-type mos that this peak current is controlled branch road, and this second end is in order to receive a high voltage potential.
17. current control circuits according to claim 13, wherein this resistance of this peak current control branch road can charge to this second end of this electric capacity.
18. current control circuits according to claim 13, wherein this first current potential is a negative potential, and this second current potential is greater than this first current potential.
19. current control circuits according to claim 13, wherein this power MOS transistor is a high voltage most.
20. 1 kinds of drive circuits, in order to drive a power MOS transistor, comprise:
One current control circuit, comprises:
One current mirror, comprises one first current branch and one second current branch, and wherein one end of this first current branch and this second current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One first clamp N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this current mirror;
One peak current is controlled branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switching signal;
One resistance, comprises a first end and one second end, and wherein this first end is electrically coupled to one second end of this electric capacity, and this second end is in order to receive one second current potential; And
One controls P-type mos transistor, comprise a control end and a first end, wherein this control end is electrically coupled to this second end of this electric capacity, and this first end is electrically coupled to one second end of this first clamp N-type metal oxide semiconductor transistor;
One first drives branch road, comprises:
One current source;
One second clamp N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive this reference voltage, and this first end is connected in a control end points and this current source; And
One first switch P type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is in order to receive a phase-veversal switch signal, and this first end is electrically coupled to one second end of this second clamp N-type metal oxide semiconductor transistor;
One second drives branch road, comprises:
One electric current supply N-type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this control end points, and this first end is in order to receive this first current potential;
One the 3rd clamp N-type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is in order to receive this reference voltage, this first end is electrically coupled to one second end of this electric current supply N-type metal oxide semiconductor transistor, and this first end is exported a driving voltage to a power grid of this power MOS transistor; And
One second switch P-type mos transistor, comprises a control end and a first end, and wherein this control end is in order to receive this switching signal, and this first end is electrically coupled to one second end of the 3rd clamp N-type metal oxide semiconductor transistor,
When this switching signal wherein receiving when this first end of this electric capacity is a voltage level state, this controls P-type mos transistor turns, this of this current mirror the first current branch provides a peak current, this of this current mirror the second current branch is correspondingly drawn electric current by this control end points, this driving voltage that mat makes this first end of the 3rd clamp N-type metal oxide semiconductor transistor export this power grid of this power MOS transistor to rises, to open this power MOS transistor.
21. drive circuits according to claim 20, wherein this first current branch of this current mirror provides this peak current in a special time.
22. drive circuits according to claim 21, wherein how second this special time for being less than approximately 20.
23. drive circuits according to claim 20, also comprise a voltage supply N-type metal oxide semiconductor transistor, wherein this voltage supply N-type metal oxide semiconductor transistor comprises a first end and one second end, this first end is electrically coupled to transistorized one second end of this control P-type mos of this current control circuit, and this second end is in order to receive a high voltage potential.
24. drive circuits according to claim 20, wherein this resistance of this peak current control branch road can charge to this second end of this electric capacity.
25. drive circuits according to claim 20, wherein this first current potential is a positive potential, and this second current potential is greater than this first current potential.
26. drive circuits according to claim 20, wherein this power MOS transistor is a high voltage most.
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| CN201210289797.2A CN103595382B (en) | 2012-08-15 | 2012-08-15 | Driving circuit and current control circuit wherein |
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| CN201210289797.2A CN103595382B (en) | 2012-08-15 | 2012-08-15 | Driving circuit and current control circuit wherein |
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| US5500615A (en) * | 1991-12-06 | 1996-03-19 | Tektronix, Inc. | Low power CCD driver with symmetrical output drive signal |
| US5552746A (en) * | 1995-04-07 | 1996-09-03 | Sgs-Thomson Microelectronics, Inc. | Gate drive circuit |
| CN101551688A (en) * | 2008-04-03 | 2009-10-07 | 瑞鼎科技股份有限公司 | Current-limiting circuit and electrical device with same |
| CN102385406A (en) * | 2010-09-01 | 2012-03-21 | 上海宏力半导体制造有限公司 | Capacitor-less low dropout regulator structure |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5500615A (en) * | 1991-12-06 | 1996-03-19 | Tektronix, Inc. | Low power CCD driver with symmetrical output drive signal |
| US5552746A (en) * | 1995-04-07 | 1996-09-03 | Sgs-Thomson Microelectronics, Inc. | Gate drive circuit |
| CN101551688A (en) * | 2008-04-03 | 2009-10-07 | 瑞鼎科技股份有限公司 | Current-limiting circuit and electrical device with same |
| CN102385406A (en) * | 2010-09-01 | 2012-03-21 | 上海宏力半导体制造有限公司 | Capacitor-less low dropout regulator structure |
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| CN103595382B (en) | 2016-06-01 |
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