CN103595382B - Driving circuit and current control circuit wherein - Google Patents
Driving circuit and current control circuit wherein Download PDFInfo
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- CN103595382B CN103595382B CN201210289797.2A CN201210289797A CN103595382B CN 103595382 B CN103595382 B CN 103595382B CN 201210289797 A CN201210289797 A CN 201210289797A CN 103595382 B CN103595382 B CN 103595382B
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Abstract
A kind of current control circuit, in order to control driving circuit, mat makes aforementioned driving circuit correspondingly driving power MOS (metal-oxide-semiconductor) transistor. Aforementioned currents pilot circuit comprises electric current mirror, pincers position P type metal oxide semiconductor transistor and peak value comparison method branch road. Wherein, peak value comparison method branch road comprises electric capacity, resistance and control N-type MOS (metal-oxide-semiconductor) transistor. When the switch signal that aforementioned electric capacity receives is voltage level state, aforementioned control N-type MOS (metal-oxide-semiconductor) transistor conducting, and provide peak point current by the first current branch of electric current mirror, and its 2nd current branch correspondingly exports the control end points of control electric current to driving circuit, mat make aforementioned driving circuit export to aforementioned power MOS (metal-oxide-semiconductor) transistor power grid driving voltage decline, to open aforementioned power MOS (metal-oxide-semiconductor) transistor.
Description
Technical field
The invention relates to a kind of electronic circuit, and relate to a kind of driving circuit and current control circuit wherein especially.
Background technology
Electronic product has become a part indispensable in modern's life. In electronic installation of all kinds, it is necessary to can be applicable to the semiconductor subassembly in these devices. The characteristic of semiconductor subassembly is mainly determined by the processing procedure of this assembly of preparation. Owing to semiconductor subassembly is usually more complicated, then its processing procedure also changes more. Semiconductor subassembly needs the multiple transistor with different qualities. Namely high-pressure crystal pipe is in order to the satisfied element can designed at the environment of high top pressure operation.
In addition, for meeting modern Man's Demands, electronic product is designed to compact kenel gradually, carries to be convenient for people to. Consider the choice of electronic product between its size and element speeds, how maintain area little when, design and can have power MOS transistor identical, switching speed even faster, be one of problem that those skilled in the art inquire into.
Summary of the invention
One technical elements of content of the present invention is that in order to control driving circuit, mat makes aforementioned driving circuit correspondingly driving power MOS (metal-oxide-semiconductor) transistor about a kind of current control circuit. Aforementioned currents pilot circuit comprises electric current mirror, pincers position P type metal oxide semiconductor transistor and peak value comparison method branch road. Furthermore, peak value comparison method branch road comprises electric capacity, resistance and control N-type MOS (metal-oxide-semiconductor) transistor. First current branch of aforementioned currents mirror and one end of aforementioned 2nd current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential. The aforementioned control terminal of aforementioned pincers position P type metal oxide semiconductor transistor is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror.
In addition, in aforementioned peak value comparison method branch road, the first end of electric capacity is in order to receive switch signal, and exports coupled signal by its 2nd end. The aforementioned first ends of aforementioned resistance is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its 2nd end is in order to receive the 2nd current potential. The control end of aforementioned control N-type MOS (metal-oxide-semiconductor) transistor is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its 2nd end is electrically coupled to the 2nd end of aforementioned pincers position P type metal oxide semiconductor transistor.
When the aforementioned switches signal that the aforementioned first ends of aforementioned electric capacity receives is voltage level state, aforementioned control N-type MOS (metal-oxide-semiconductor) transistor conducting, and provide peak point current by aforementioned first current branch of aforementioned currents mirror, aforementioned 2nd current branch of aforementioned currents mirror correspondingly exports the control end points of control electric current to aforementioned driving circuit, mat make aforementioned driving circuit export to aforementioned power MOS (metal-oxide-semiconductor) transistor power grid driving voltage decline, to open aforementioned power MOS (metal-oxide-semiconductor) transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak point current in specified time.
According to another embodiment of the present invention, aforementioned specified time was less than for about 20 how seconds.
According to yet another embodiment of the invention, aforementioned coupled signal can be discharged by the aforementioned resistance of aforementioned peak value comparison method branch road.
According to further embodiment of this invention, aforementioned first current potential is positive potential, and aforementioned 2nd current potential is less than aforementioned first current potential.
According to the another another embodiment of the present invention, aforementioned power MOS (metal-oxide-semiconductor) transistor is high-voltage metal oxide semiconductor transistor.
Another technical elements of content of the present invention is that it is in order to driving power MOS (metal-oxide-semiconductor) transistor about a kind of driving circuit. Aforementioned driving circuit comprises current control circuit, the first driving branch road and the 2nd driving branch road. Furthermore, aforementioned currents pilot circuit comprises electric current mirror, the first pincers position P type metal oxide semiconductor transistor and peak value comparison method branch road. Aforementioned first driving branch road comprises current source, the 2nd pincers position P type metal oxide semiconductor transistor and the first switch N-type MOS (metal-oxide-semiconductor) transistor. Aforementioned 2nd driving branch road comprises electric current supply P type metal oxide semiconductor transistor, the 3rd pincers position P type metal oxide semiconductor transistor and the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor. Wherein, peak value comparison method branch road comprises electric capacity, resistance and control N-type MOS (metal-oxide-semiconductor) transistor.
In addition, in aforementioned currents pilot circuit, the first current branch of electric current mirror and one end of the 2nd current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential. The control end of aforementioned first pincers position P type metal oxide semiconductor transistor is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror. In aforementioned first driving branch road, the control end of the 2nd pincers position P type metal oxide semiconductor transistor is in order to receive above-mentioned reference voltage, and its first end is electrically coupled to control end points and aforementioned currents source. The control end of aforementioned first switch N-type MOS (metal-oxide-semiconductor) transistor is in order to receive anti-phase switch signal, and its first end is electrically coupled to aforementioned 2nd end of aforementioned 2nd pincers position P type metal oxide semiconductor transistor.
In aforementioned 2nd driving branch road, the control end of electric current supply P type metal oxide semiconductor transistor is electrically coupled to aforementioned control terminal point, and its first end is in order to receive aforementioned first current potential. The control end of aforementioned 3rd pincers position P type metal oxide semiconductor transistor is in order to receive above-mentioned reference voltage, its first end is electrically coupled to the 2nd end of aforementioned currents supply P type metal oxide semiconductor transistor, and its first end outputting drive voltage is to the power grid of aforementioned power MOS (metal-oxide-semiconductor) transistor. In aforementioned 2nd driving branch road, the control end of the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor is in order to receive aforementioned switches signal, and its first end is electrically coupled to the 2nd end of aforementioned 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor.
In addition, in aforementioned peak value comparison method branch road, the first end of the electric capacity of peak value comparison method branch road is in order to receive switch signal, and exports coupled signal by its 2nd end. The first end of aforementioned resistance is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and the 2nd end of aforementioned resistance is in order to receive the 2nd current potential. The control end of front control N-type MOS (metal-oxide-semiconductor) transistor is electrically coupled to the 2nd end of aforementioned electric capacity, and its first end is electrically coupled to the 2nd end of aforementioned pincers position P type metal oxide semiconductor transistor.
Hold and chatted, when the aforementioned switches signal that the aforementioned first ends of aforementioned electric capacity receives is voltage level state, aforementioned control N-type MOS (metal-oxide-semiconductor) transistor conducting, aforementioned first current branch of aforementioned currents mirror provides peak point current, aforementioned 2nd current branch of aforementioned currents mirror correspondingly exports the control end points of control electric current to aforementioned driving circuit, mat make aforementioned driving circuit export to aforementioned power MOS (metal-oxide-semiconductor) transistor power grid driving voltage decline, to open aforementioned power MOS (metal-oxide-semiconductor) transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak point current in specified time.
According to another embodiment of the present invention, aforementioned specified time was less than for about 20 how seconds.
According to yet another embodiment of the invention, aforementioned coupled signal can be discharged by the aforementioned resistance of aforementioned peak value comparison method branch road.
According to further embodiment of this invention, aforementioned first current potential is positive potential, and aforementioned 2nd current potential is less than aforementioned first current potential.
According to the another another embodiment of the present invention, aforementioned power MOS (metal-oxide-semiconductor) transistor is high-voltage metal oxide semiconductor transistor.
A technical elements again of content of the present invention is that it is in order to control driving circuit, and mat makes driving circuit correspondingly driving power MOS (metal-oxide-semiconductor) transistor about a kind of current control circuit. Aforementioned currents pilot circuit comprises electric current mirror, pincers position N-type MOS (metal-oxide-semiconductor) transistor and peak value comparison method branch road. Furthermore, aforementioned peak value comparison method branch road comprises electric capacity, resistance and control P type metal oxide semiconductor transistor. First current branch of aforementioned currents mirror and one end of the 2nd current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential. The control end of aforementioned pincers position N-type MOS (metal-oxide-semiconductor) transistor is in order to receive reference voltage, and its first end is electrically coupled to the first current branch of aforementioned currents mirror.
In addition, in aforementioned peak value comparison method branch road, the first end of electric capacity is in order to receive switch signal, and exports coupled signal by its 2nd end. The first end of aforementioned resistance is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its 2nd end is in order to receive the 2nd current potential. The control end of aforementioned control P type metal oxide semiconductor transistor is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its first end is electrically coupled to the 2nd end of aforementioned pincers position N-type MOS (metal-oxide-semiconductor) transistor. When the aforementioned switches signal that the aforementioned first ends of aforementioned electric capacity receives is voltage level state, aforementioned control P type metal oxide semiconductor transistor turns, and provide electric current by aforementioned first current branch of aforementioned currents mirror, aforementioned 2nd current branch of aforementioned currents mirror correspondingly draws electric current by control end points, mat make aforementioned driving circuit export to aforementioned power MOS (metal-oxide-semiconductor) transistor power grid driving voltage rise, to open aforementioned power MOS (metal-oxide-semiconductor) transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak point current in specified time.
According to another embodiment of the present invention, aforementioned specified time is for being less than for about 20 how seconds.
According to further embodiment of this invention, aforementioned currents pilot circuit also comprises voltage supply N-type MOS (metal-oxide-semiconductor) transistor, it comprises first end and the 2nd end, aforementioned first ends is electrically coupled to the 2nd end of the control P type metal oxide semiconductor transistor of aforementioned peak value comparison method branch road, and aforementioned 2nd end is in order to receive high voltage potential.
According to yet another embodiment of the invention, aforementioned 2nd end of aforementioned electric capacity can be charged by the aforementioned resistance of aforementioned peak value comparison method branch road.
According to further embodiment of this invention, aforementioned first current potential is negative potential, and aforementioned 2nd current potential is greater than aforementioned first current potential.
According to the another another embodiment of the present invention, aforementioned power MOS (metal-oxide-semiconductor) transistor is high-voltage metal oxide semiconductor transistor.
A technical elements again of content of the present invention is that it is in order to driving power MOS (metal-oxide-semiconductor) transistor about a kind of driving circuit. Aforementioned driving circuit comprises current control circuit, the first driving branch road and the 2nd driving branch road. Furthermore, aforementioned currents pilot circuit comprises electric current mirror, the first pincers position N-type MOS (metal-oxide-semiconductor) transistor and peak value comparison method branch road. Aforementioned first driving branch road comprises current source, the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor and the first switch P type metal oxide semiconductor transistor. Aforementioned 2nd driving branch road comprises electric current supply N-type MOS (metal-oxide-semiconductor) transistor, the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor and the 2nd switch P type metal oxide semiconductor transistor. Wherein, aforementioned peak value comparison method branch road comprises electric capacity, resistance and control P type metal oxide semiconductor transistor.
In addition, in aforementioned currents pilot circuit, the first current branch of electric current mirror and one end of the 2nd current branch are electrically coupled to public point, and aforementioned public point is in order to receive the first current potential. The control end of aforementioned first pincers position N-type MOS (metal-oxide-semiconductor) transistor is in order to receive reference voltage, and its first end is electrically coupled to aforementioned first current branch of aforementioned currents mirror. In aforementioned first driving branch road, the control end of the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor is in order to receive above-mentioned reference voltage, and its first end is electrically coupled to control end points and aforementioned currents source. The control end of aforementioned first switch P type metal oxide semiconductor transistor is in order to receive anti-phase switch signal, and its first end is electrically coupled to the 2nd end of aforementioned 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor.
In aforementioned 2nd driving branch road, the control end of electric current supply N-type MOS (metal-oxide-semiconductor) transistor is electrically coupled to aforementioned control terminal point, and its first end is in order to receive aforementioned first current potential. The control end of aforementioned 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor is in order to receive above-mentioned reference voltage, its first end is electrically coupled to the 2nd end of aforementioned currents supply N-type MOS (metal-oxide-semiconductor) transistor, and its first end outputting drive voltage is to the power grid of aforementioned power MOS (metal-oxide-semiconductor) transistor. In aforementioned 2nd driving branch road, the control end of the 2nd switch P type metal oxide semiconductor transistor is in order to receive aforementioned switches signal, and its first end is electrically coupled to the 2nd end of aforementioned 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor.
In addition, in aforementioned currents pilot circuit, the first end of the electric capacity of peak value comparison method branch road is in order to receive switch signal, and exports coupled signal by its 2nd end. The first end of aforementioned resistance is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its 2nd end is in order to receive the 2nd current potential. The control end of aforementioned control P type metal oxide semiconductor transistor is electrically coupled to aforementioned 2nd end of aforementioned electric capacity, and its first end is electrically coupled to the 2nd end of aforementioned first pincers position N-type MOS (metal-oxide-semiconductor) transistor.
From the above, when the aforementioned switches signal that the aforementioned first ends of aforementioned electric capacity receives is voltage level state, aforementioned control P type metal oxide semiconductor transistor turns, aforementioned first current branch of aforementioned currents mirror provides peak point current, aforementioned 2nd current branch of aforementioned currents mirror correspondingly draws electric current by control end points, mat make the aforementioned first ends of aforementioned 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor export to aforementioned power MOS (metal-oxide-semiconductor) transistor aforementioned power grid aforementioned driving voltage rise, to open aforementioned power MOS (metal-oxide-semiconductor) transistor.
According to one embodiment of the invention, aforementioned first current branch of aforementioned currents mirror provides aforementioned peak point current in specified time.
According to another embodiment of the present invention, aforementioned specified time is for being less than for about 20 how seconds.
According to further embodiment of this invention, aforementioned driving circuit also comprises voltage supply N-type MOS (metal-oxide-semiconductor) transistor, it comprises first end and the 2nd end, aforementioned first ends is electrically coupled to the 2nd end of the control P type metal oxide semiconductor transistor of aforementioned currents pilot circuit, and aforementioned 2nd end is in order to receive high voltage potential.
According to yet another embodiment of the invention, the 2nd end of aforementioned electric capacity can be charged by the aforementioned resistance of aforementioned peak value comparison method branch road.
According to further embodiment of this invention, aforementioned first current potential is positive potential, and aforementioned 2nd current potential is greater than aforementioned first current potential.
According to the another another embodiment of the present invention, aforementioned power MOS (metal-oxide-semiconductor) transistor is high-voltage metal oxide semiconductor transistor.
Therefore, technology contents according to the present invention, the embodiment of the present invention, by providing a kind of driving circuit and current control circuit wherein, is used the transmission improving power transistor and is postponed (propagationdelay) phenomenon, and transmission delay phenomenon is contracted to 50 further how within the second.
Accompanying drawing explanation
For above and other objects of the present invention, feature, advantage and embodiment can be become apparent, being described as follows of institute's accompanying drawings:
Fig. 1 is in one embodiment of the invention, the circuit diagram of a kind of driving circuit; And
Fig. 2 is in another embodiment of the present invention, the circuit diagram of a kind of driving circuit.
[main element numbers explanation]
100,200: driving circuit 120,220: drive level
110,210: current control circuit 122,222: the first drives branch road
112,212: electric current mirror 123,223: current source
114,214: peak value comparison method branch road 124,224: the two drives branch road
Embodiment
In order to make describing of the present invention more detailed and complete, can refer to the appended various embodiment of graphic and the following stated, number identical in graphic represents same or similar element. But the embodiment provided also is not used to the scope that restriction the present invention is contained, and the description of structure running is not used to limit its order performed, any structure again combined by element, is produced the device with impartial effect, is all the scope that the present invention is contained.
Wherein graphic only for the purpose of description, do not map according to life size. On the other hand, it is commonly known that element and step be not described in embodiment, to avoid the present invention being caused unnecessary restriction.
In addition, about " coupling " used herein or " connection ", all can refer to two or multiple element mutually directly make entity or in electrical contact, or mutually indirectly put into effect body or in electrical contact, also can refer to two or multiple element mutual operation or action.
Fig. 1 is the schematic diagram illustrating a kind of driving circuit according to one embodiment of the invention, and it is in order to driving power MOS (metal-oxide-semiconductor) transistor MP0. As shown in the figure, driving circuit 100 comprises current control circuit 110 and drives level 120, drives level 120 to comprise again the first driving branch road 122 and the 2nd driving branch road 124.
In the present embodiment, power MOS transistor MP0 is P type high-voltage metal oxide semiconductor transistor. High-voltage metal oxide semiconductor transistor (highvoltageMOS; HVMOS) for the transistor of high-voltage can be born, in an embodiment, refer to and can bear the high pressure to about 10 volts or more, be different from generally common withstand voltage (such as 3.3 volts or 5 volts). In some semiconductor fabrications, the source electrode and drain electrode that have and can bear high pressure can be produced, and grid only can bear the power MOS transistor of small voltage (such as 5 volts). The power MOS transistor designed in this way, can when area be less, reach and power MOS transistor conducting resistance (RDS (on)) is diminished, reach the transmission delay reduction and rise time (risingtime) that make power MOS transistor and the effect that fall time, (fallingtime) diminished further.
For make the above-mentioned type power MOS transistor can drive time, further improve it and transmit delay (propagationdelay) phenomenon, embodiment of the present invention design one drive circuit, the electrical operation derived by the distributing style of its overall circuit framework, the demand of the power MOS transistor of this type can be met, and the transmission delay phenomenon of power MOS transistor is contracted to 50 how within the second. The structure of the driving circuit of the embodiment of the present invention and electrical operating method will be described in detail below, so that the object of the present invention and effect are easier to understand.
First, operate in concept in entirety, it is receive switch signal by current control circuit 110, and according to switch signal to export control electric current to driving level 120, mat makes driving level 120 correspondingly driving power MOS (metal-oxide-semiconductor) transistor MP0.
Above-mentioned current control circuit 110 comprises electric current mirror 112, first pincers position P type metal oxide semiconductor transistor MP3 and peak value comparison method branch road 114. As shown in Figure 1, furthermore, electric current mirror 112 comprises a P type metal oxide semiconductor transistor MP1 and the 2nd P type metal oxide semiconductor transistor MP2, wherein a P type metal oxide semiconductor transistor MP1 is positioned in the first current branch, and the 2nd P type metal oxide semiconductor transistor MP2 is positioned in the 2nd current branch. In addition, peak value comparison method branch road 114 comprises electric capacity C1, resistance R1 and control N-type MOS (metal-oxide-semiconductor) transistor MN1.
In structure, the first current branch of the electric current mirror 112 of current control circuit 110 and one end of the 2nd current branch are electrically coupled to public point N1, and this public point N1 is in order to receive the first current potential VGH. The control end of the first pincers position P type metal oxide semiconductor transistor MP3 of current control circuit 110 is in order to receive a reference voltage VM, and its first end is electrically coupled to the first current branch of electric current mirror 112.
In the peak value comparison method branch road 114 of current control circuit 110, the first end of electric capacity C1 is in order to receive switch signal IN, and exports coupled signal by its 2nd end. The first end of resistance R1 is electrically coupled to the 2nd end of electric capacity C1, and its 2nd end is in order to receive the 2nd current potential VSS. The control end of control N-type MOS (metal-oxide-semiconductor) transistor MN1 is electrically coupled to the 2nd end of electric capacity C1, and its first end is electrically coupled to the first pincers position P type metal oxide semiconductor transistor MP3 the 2nd end.
It should be noted that at this, in the embodiment of the present invention, the control end of various MOS (metal-oxide-semiconductor) transistor can be grid, and its first end and the 2nd end then according to the demand of actual Circnit Layout, and can be optionally source electrode or drain electrode.
In electrically operation, when the switch signal IN that the first end of the electric capacity C1 of peak value comparison method branch road 114 in current control circuit 110 receives is a high state, control N-type MOS (metal-oxide-semiconductor) transistor MN1 conducting, first current branch of electric current mirror 112 provides peak point current, and the 2nd current branch of electric current mirror correspondingly exports control electric current to the control end points N2 driving level 120, mat make driving level 120 export to power MOS transistor MP0 control end driving voltage decline, to open power MOS transistor MP0.
Needing to illustrate further, in current control circuit 110, the first current branch of electric current mirror 112 provides peak point current in a specified time. In one embodiment, aforementioned specified time was less than for about 20 how seconds, therefore, the current control circuit 110 of the driving circuit 100 of the embodiment of the present invention can within the extremely short time, produce rapidly peak point current, and within the same time, correspondingly export control electric current to driving level 120, to reach the object opening rapidly power MOS transistor MP0. But, the present embodiment also is not used to limit the present invention, and those skilled in the art ought optionally adopt suitable parameter, and its concept person identical with the present invention, namely fall into the scope of the present invention.
In one embodiment, after above-mentioned peak point current derives the effect and opening rapidly power MOS transistor MP0, in current control circuit 110, the 2nd end of electric capacity C1 can be discharged by the resistance R1 of peak value comparison method branch road 114, thus closing control N-type MOS (metal-oxide-semiconductor) transistor MN1, now, above-mentioned peak point current also will disappear in the lump, it is with after opening power MOS transistor MP0 rapidly, owing to control N-type MOS (metal-oxide-semiconductor) transistor MN1 is closed, current control circuit 110 can not have meaningless electric energy consume.
First driving branch road 122 of above-mentioned driving level 120 comprises current source 123, the 2nd pincers position P type metal oxide semiconductor transistor MP4 and the first switch N-type MOS (metal-oxide-semiconductor) transistor MN2. The control end of the 2nd pincers position P type metal oxide semiconductor transistor MP4 is in order to receive reference voltage VM, its first end is electrically coupled to control end points N2 and current source 123, and the control electric current that the 2nd current branch being received electric current mirror 112 in current control circuit 110 exports. The control end of the first switch N-type MOS (metal-oxide-semiconductor) transistor MN2 is in order to receive an anti-phase switch signalAnd its first end is electrically coupled to the 2nd end of the 2nd pincers position P type metal oxide semiconductor transistor MP4.
Moreover, the 2nd driving branch road 124 of above-mentioned driving level 120 comprises electric current supply P type metal oxide semiconductor transistor MP5, the 3rd pincers position P type metal oxide semiconductor transistor MP6 and the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor MN3. The control end of electric current supply P type metal oxide semiconductor transistor MP5 is electrically coupled to control end points N2, and its first end is in order to receive the first current potential VGH. The control end of the 3rd pincers position P type metal oxide semiconductor transistor MP6 is in order to receive reference voltage VM, its first end is electrically coupled to the 2nd end of electric current supply P type metal oxide semiconductor transistor MP5, and its first end outputting drive voltage is to the control end of power MOS transistor MP0. The control end of the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor MN3 is in order to receive switch signal IN, and its first end is electrically coupled to the 2nd end of the 3rd pincers position P type metal oxide semiconductor transistor MP6.
In the present embodiment, in electrically operation, when the switch signal IN that the first end of the electric capacity C1 of peak value comparison method branch road 114 in current control circuit 110 receives is a high state, control N-type MOS (metal-oxide-semiconductor) transistor MN1 conducting, and drive the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor MN3 conducting of the 2nd driving branch road 124 in level 120, first current branch of electric current mirror 112 provides peak point current, and the 2nd current branch of electric current mirror 112 correspondingly exports control electric current to control end points N2, control the voltage lifting of end points N2. Due to control end points N2 voltage be electric current supply P type metal oxide semiconductor transistor MP5 control end receive voltage, thus electric current supply P type metal oxide semiconductor transistor MP5 by control end points N2 voltage lifting under close.
Now, the first end of the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor MN3 of the 2nd driving branch road 124 can draw output voltage Vp, mat makes the driving voltage Vp of the control end that the first end of the 3rd pincers position P type metal oxide semiconductor transistor MP6 exports power MOS transistor MP0 to decline, to open power MOS transistor MP0.
In one embodiment, above-mentioned first current potential VGH is positive potential, and the 2nd current potential VSS is less than the first current potential VG. In an embodiment, the 2nd current potential VSS can be ground connection current potential.
Fig. 2 is the schematic diagram illustrating a kind of driving circuit according to one embodiment of the invention, and it is in order to driving power MOS (metal-oxide-semiconductor) transistor MN0. As shown in the figure, driving circuit 200 comprises current control circuit 210 and drives level 220, drives level 220 to comprise again the first driving branch road 222 and the 2nd driving branch road 224.
In the present embodiment, power MOS transistor MN0 is N-type high-voltage metal oxide semiconductor transistor, and the characteristic of high-voltage metal oxide semiconductor transistor has been specified in Fig. 1, does not repeat at this.
For make the above-mentioned type power MOS transistor can drive time, further improve it and transmit delay (propagationdelay) phenomenon, embodiment of the present invention design one drive circuit, the electrical operation derived by the distributing style of its overall circuit framework, the demand of the power MOS transistor of this type can be met, and the transmission delay phenomenon of power MOS transistor is contracted to 50 how within the second. The structure of the driving circuit of the embodiment of the present invention and electrical operating method will be described in detail below, so that the object of the present invention and effect are easier to understand.
First, operate in concept in entirety, it is receive switch signal by current control circuit 210, and according to switch signal to export control electric current to driving level 220, mat makes driving level 220 correspondingly driving power MOS (metal-oxide-semiconductor) transistor MN0.
Above-mentioned current control circuit 210 comprises electric current mirror 212, first pincers position N-type MOS (metal-oxide-semiconductor) transistor MN1 and peak value comparison method branch road 214. As shown in Figure 2, furthermore, electric current mirror 212 comprises the first N-type MOS (metal-oxide-semiconductor) transistor MN2 and the 2nd N-type MOS (metal-oxide-semiconductor) transistor MN3, wherein the first N-type MOS (metal-oxide-semiconductor) transistor MN2 is positioned in the first current branch, and the 2nd N-type MOS (metal-oxide-semiconductor) transistor MN3 is positioned in the 2nd current branch. In addition, peak value comparison method branch road 214 comprises electric capacity C1, resistance R1 and control P type metal oxide semiconductor transistor MP1.
In structure, the first current branch of the electric current mirror 212 of current control circuit 210 and one end of the 2nd current branch are electrically coupled to public point N1, and this public point N1 is in order to receive the first current potential VEE. The control end of the first pincers position N-type MOS (metal-oxide-semiconductor) transistor MN1 of current control circuit 210 is in order to receive reference voltage VM, and its first end is electrically coupled to the first current branch of electric current mirror 212.
In the peak value comparison method branch road 214 of current control circuit 210, the first end of electric capacity C1 is in order to receive switch signal IN, and exports coupled signal by its 2nd end. The first end of resistance R1 is electrically coupled to the 2nd end of electric capacity C1, and its 2nd end is in order to receive the 2nd current potential VDDX. The control end of control P type metal oxide semiconductor transistor MP1 is electrically coupled to the 2nd end of electric capacity C1, and its first end is electrically coupled to the 2nd end of the first pincers position N-type MOS (metal-oxide-semiconductor) transistor MN1.
In electrically operation, when the switch signal IN that the first end of the electric capacity C1 of peak value comparison method branch road 214 in current control circuit 210 receives is a low state, electric capacity C1 exports coupled signal so that controlling P type metal oxide semiconductor transistor MP1 conducting, now, first current branch of electric current mirror 212 provides peak point current, and the 2nd current branch of electric current mirror correspondingly draws electric current by the control end points N2 driving level 220, mat make driving level 220 export to power MOS transistor MN0 control end driving voltage rise, to open power MOS transistor MN0.
Needing to illustrate further, in current control circuit 210, the first current branch of electric current mirror 212 provides peak point current in a specified time. In one embodiment, aforementioned specified time was less than for about 20 how seconds, therefore, the current control circuit 210 of the driving circuit 200 of the embodiment of the present invention can within the extremely short time, produce rapidly peak point current, and correspondingly draw electric current by driving level 220 within the same time, to reach the object opening rapidly power MOS transistor MN0. But, the present embodiment also is not used to limit the present invention, and those skilled in the art ought optionally adopt suitable parameter, and its concept person identical with the present invention, namely fall into the scope of the present invention.
In one embodiment, after above-mentioned peak point current derives the effect and opening rapidly power MOS transistor MN0, in current control circuit 210, the 2nd end of electric capacity C1 can be charged by the resistance R1 of peak value comparison method branch road 214, thus closing control P type metal oxide semiconductor transistor MP1, now, above-mentioned peak point current also will disappear in the lump, it is with after opening power MOS transistor MN0 rapidly, owing to control P type metal oxide semiconductor transistor MP1 is closed, current control circuit 210 can not have meaningless electric energy consume.
In another embodiment, current control circuit 210 also comprises voltage supply N-type MOS (metal-oxide-semiconductor) transistor MN7, and voltage supply N-type MOS (metal-oxide-semiconductor) transistor MN7 comprises first end and the 2nd end. Aforementioned 2nd end is in order to receive high voltage potential VGH, and first end is electrically coupled to the 2nd end of the control P type metal oxide semiconductor transistor MP1 of peak value comparison method branch road 214, and its control end can accept a bulk potential VDD. Citing, the 2nd current potential VDDX can be VDD-Vth (threshold voltage).
Under this design architecture, when controlling P type metal oxide semiconductor transistor MP1 conducting, 2nd end of the first N-type MOS (metal-oxide-semiconductor) transistor MN2 on electric current mirror 212 first branch road, draw electric current by high voltage potential VGH, but not draw electric current to produce aforementioned peak point current to the 2nd current potential VDDX. So, overall circuit running can be made more stable.
First driving branch road 222 of above-mentioned driving level 220 comprises current source 223, the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN4 and the first switch P type metal oxide semiconductor transistor MP2. The control end of the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN4 is in order to receive reference voltage VM, and its first end is electrically coupled to control end points N2 and current source 223. The control end of the first switch P type metal oxide semiconductor transistor MP2 is in order to receive an anti-phase switch signal, and its first end is electrically coupled to the 2nd end of the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN4.
Moreover, the 2nd driving branch road 224 of above-mentioned driving level 220 comprises electric current supply N-type MOS (metal-oxide-semiconductor) transistor MN6, the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN5 and the 2nd switch P type metal oxide semiconductor transistor MP3. The control end of electric current supply N-type MOS (metal-oxide-semiconductor) transistor MN6 is electrically coupled to control end points N2, and its first end is in order to receive the first current potential VEE. The control end of the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN5 is in order to receive reference voltage VM, its first end is electrically coupled to the 2nd end of electric current supply N-type MOS (metal-oxide-semiconductor) transistor MN6, and its first end outputting drive voltage is to the control end of power MOS transistor MN0. The control end of the 2nd switch P type metal oxide semiconductor transistor MP3 is in order to receive switch signal IN, and its first end is electrically coupled to the 2nd end of the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN5.
In the present embodiment, in electrically operation, when the switch signal IN that the first end of the electric capacity C1 of peak value comparison method branch road 214 in current control circuit 210 receives is low state, electric capacity C1 exports coupled signal so that controlling P type metal oxide semiconductor transistor MP1 conducting, and drive the 2nd switch P type metal oxide semiconductor transistor MP3 conducting of the 2nd driving branch road 224 in level 220, first current branch of electric current mirror 212 produces peak point current, and the 2nd current branch of electric current mirror 212 correspondingly draws electric current by control end points N2, the voltage decline of control end points N2. due to control end points N2 voltage be electric current supply N-type MOS (metal-oxide-semiconductor) transistor MN6 control end receive voltage, thus electric current supply N-type MOS (metal-oxide-semiconductor) transistor MN6 by control end points N2 voltage decline under close.
Now, the first end of the 2nd switch P type metal oxide semiconductor transistor MP3 of the 2nd driving branch road 224 can provide voltage, mat makes the driving voltage Vp of the control end that the first end of the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor MN5 exports power MOS transistor MN0 to rise, to open power MOS transistor MN0.
In one embodiment, above-mentioned first current potential VEE is negative potential, and the 2nd current potential VDDX is greater than the first current potential VEE.
By above-mentioned embodiment of the present invention it will be seen that application the present invention has following advantage. The embodiment of the present invention, by providing a kind of driving circuit and current control circuit wherein, is used the transmission improving power transistor and is postponed (propagationdelay) phenomenon, and transmission delay phenomenon is contracted to 50 further how within the second. Moreover, after opening power MOS transistor rapidly, owing in current control circuit, the control MOS (metal-oxide-semiconductor) transistor of peak value comparison method branch road can be closed, therefore, current control circuit can not have meaningless electric energy consume.
Although the present invention discloses as above to implement mode; so itself and be not used to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when being used for a variety of modifications and variations, therefore protection scope of the present invention is when being as the criterion depending on the appended right person of being defined.
Claims (26)
1. a current control circuit, in order to control one drive circuit, mat makes this driving circuit correspondingly drive a power MOS transistor, comprises:
One electric current mirror, comprises one first current branch and one the 2nd current branch, and wherein one end of this first current branch and the 2nd current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One pincers position P type metal oxide semiconductor transistor, comprises a control end, a first end and one the 2nd end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this electric current mirror;
One peak value comparison method branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switch signal;
One resistance, comprises a first end and one the 2nd end, and wherein this first end is electrically coupled to one the 2nd end of this electric capacity, and the 2nd end is in order to receive one the 2nd current potential; And
One control N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to the 2nd end of this electric capacity, and this first end is electrically coupled to the 2nd end of this pincers position P type metal oxide semiconductor transistor,
When this switch signal wherein received when this first end of this electric capacity is a voltage level state, this control N-type MOS (metal-oxide-semiconductor) transistor conducting, this first current branch of this electric current mirror provides a peak point current, 2nd current branch of this electric current mirror correspondingly exports the control end points of a control electric current to this driving circuit, mat make this driving circuit export to this power MOS transistor power grid one driving voltage decline, to open this power MOS transistor.
2. current control circuit according to claim 1, wherein this first current branch of this electric current mirror provides this peak point current in a specified time.
3. current control circuit according to claim 2, wherein this specified time was less than for 20 how seconds.
4. current control circuit according to claim 1, wherein a coupled signal can be discharged by this resistance of this peak value comparison method branch road.
5. current control circuit according to claim 1, wherein this first current potential is a positive potential, and the 2nd current potential is less than this first current potential.
6. current control circuit according to claim 1, wherein this power MOS transistor is a high-voltage metal oxide semiconductor transistor.
7. a driving circuit, in order to drive a power MOS transistor, comprises:
One current control circuit, comprises:
One electric current mirror, comprises one first current branch and one the 2nd current branch, and wherein one end of this first current branch and the 2nd current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One first pincers position P type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this electric current mirror;
One peak value comparison method branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switch signal;
One resistance, comprises a first end and one the 2nd end, and wherein this first end is electrically coupled to one the 2nd end of this electric capacity, and the 2nd end is in order to receive one the 2nd current potential; And
One control N-type MOS (metal-oxide-semiconductor) transistor, comprise a control end and a first end, wherein this control end is electrically coupled to the 2nd end of this electric capacity, and this first end is electrically coupled to one the 2nd end of this first pincers position P type metal oxide semiconductor transistor;
One first driving branch road, comprises:
One current source;
One the 2nd pincers position P type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive this reference voltage, and this first end is electrically coupled to a control end points and this current source; And
One first switch N-type MOS (metal-oxide-semiconductor) transistor, comprise a control end and a first end, wherein this control end is in order to receive an anti-phase switch signal, and this first end is electrically coupled to one the 2nd end of the 2nd pincers position P type metal oxide semiconductor transistor;
One the 2nd driving branch road, comprises:
One electric current supply P type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this control end points, and this first end is in order to receive this first current potential;
One the 3rd pincers position P type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is in order to receive this reference voltage, this first end is electrically coupled to one the 2nd end of this electric current supply P type metal oxide semiconductor transistor, and this first end exports the power grid of a driving voltage to this power MOS transistor; And
One the 2nd switch N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is in order to receive this switch signal, and this first end is electrically coupled to one the 2nd end of the 3rd pincers position P type metal oxide semiconductor transistor,
When this switch signal wherein received when this first end of this electric capacity is a voltage level state, this control N-type MOS (metal-oxide-semiconductor) transistor conducting, this first current branch of this electric current mirror provides a peak point current, 2nd current branch of this electric current mirror correspondingly exports a control electric current to this control end points, mat make this first end of the 3rd pincers position P type metal oxide semiconductor transistor export to this power MOS transistor this power grid this driving voltage decline, to open this power MOS transistor.
8. driving circuit according to claim 7, wherein this first current branch of this electric current mirror provides this peak point current in a specified time.
9. driving circuit according to claim 8, wherein this specified time is for being less than for 20 how seconds.
10. driving circuit according to claim 7, wherein the 2nd end of this electric capacity can be discharged by this resistance of this peak value comparison method branch road.
11. driving circuits according to claim 7, wherein this first current potential is a positive potential, and the 2nd current potential is less than this first current potential.
12. driving circuits according to claim 7, wherein this power MOS transistor is a high-voltage metal oxide semiconductor transistor.
13. 1 kinds of current control circuits, in order to control one drive circuit, mat makes this driving circuit correspondingly drive a power MOS transistor, comprises:
One electric current mirror, comprises one first current branch and one the 2nd current branch, and wherein one end of this first current branch and the 2nd current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One pincers position N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this electric current mirror; And
One peak value comparison method branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switch signal;
One resistance, comprises a first end and one the 2nd end, and wherein this first end is electrically coupled to one the 2nd end of this electric capacity, and the 2nd end is in order to receive one the 2nd current potential; And
One control P type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to the 2nd end of this electric capacity, and this first end is electrically coupled to one the 2nd end of this pincers position N-type MOS (metal-oxide-semiconductor) transistor,
When this switch signal wherein received when this first end of this electric capacity is a voltage level state, this control P type metal oxide semiconductor transistor turns, and provide electric current by this first current branch of this electric current mirror, 2nd current branch of this electric current mirror correspondingly draws electric current by a control end points of this driving circuit, mat make this driving circuit export to this power MOS transistor power grid one driving voltage rise, to open this power MOS transistor.
14. current control circuits according to claim 13, wherein this first current branch of this electric current mirror provides this peak point current in a specified time.
15. current control circuits according to claim 14, wherein this specified time is for being less than for 20 how seconds.
16. current control circuits according to claim 13, also comprise a voltage supply N-type MOS (metal-oxide-semiconductor) transistor, wherein this voltage supply N-type MOS (metal-oxide-semiconductor) transistor comprises a first end and one the 2nd end, this first end is electrically coupled to one the 2nd end of this control P type metal oxide semiconductor transistor of this peak value comparison method branch road, and the 2nd end is in order to receive a high voltage potential.
17. current control circuit according to claim 13, wherein the 2nd end of this electric capacity can be charged by this resistance of this peak value comparison method branch road.
18. current control circuits according to claim 13, wherein this first current potential is a negative potential, and the 2nd current potential is greater than this first current potential.
19. current control circuits according to claim 13, wherein this power MOS transistor is a high-voltage metal oxide semiconductor transistor.
20. 1 kinds of driving circuits, in order to drive a power MOS transistor, comprise:
One current control circuit, comprises:
One electric current mirror, comprises one first current branch and one the 2nd current branch, and wherein one end of this first current branch and the 2nd current branch is electrically coupled to a public point, and this public point is in order to receive one first current potential;
One first pincers position N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is in order to receive a reference voltage, and this first end is electrically coupled to this first current branch of this electric current mirror;
One peak value comparison method branch road, comprises:
One electric capacity, comprises a first end, and wherein this first end is in order to receive a switch signal;
One resistance, comprises a first end and one the 2nd end, and wherein this first end is electrically coupled to one the 2nd end of this electric capacity, and the 2nd end is in order to receive one the 2nd current potential; And
One control P type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is electrically coupled to the 2nd end of this electric capacity, and this first end is electrically coupled to one the 2nd end of this first pincers position N-type MOS (metal-oxide-semiconductor) transistor;
One first driving branch road, comprises:
One current source;
One the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is in order to receive this reference voltage, and this first end is connected to a control end points and this current source; And
One first switch P type metal oxide semiconductor transistor, comprise a control end and a first end, wherein this control end is in order to receive an anti-phase switch signal, and this first end is electrically coupled to one the 2nd end of the 2nd pincers position N-type MOS (metal-oxide-semiconductor) transistor;
One the 2nd driving branch road, comprises:
One electric current supply N-type MOS (metal-oxide-semiconductor) transistor, comprises a control end and a first end, and wherein this control end is electrically coupled to this control end points, and this first end is in order to receive this first current potential;
One the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor, comprise a control end and a first end, wherein this control end is in order to receive this reference voltage, this first end is electrically coupled to one the 2nd end of this electric current supply N-type MOS (metal-oxide-semiconductor) transistor, and this first end exports the power grid of a driving voltage to this power MOS transistor; And
One the 2nd switch P type metal oxide semiconductor transistor, comprises a control end and a first end, and wherein this control end is in order to receive this switch signal, and this first end is electrically coupled to one the 2nd end of the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor,
When this switch signal wherein received when this first end of this electric capacity is a voltage level state, this control P type metal oxide semiconductor transistor turns, this first current branch of this electric current mirror provides a peak point current, 2nd current branch of this electric current mirror correspondingly draws electric current by this control end points, mat make this first end of the 3rd pincers position N-type MOS (metal-oxide-semiconductor) transistor export to this power MOS transistor this power grid this driving voltage rise, to open this power MOS transistor.
21. driving circuits according to claim 20, wherein this first current branch of this electric current mirror provides this peak point current in a specified time.
22. driving circuits according to claim 21, wherein this specified time is for being less than for 20 how seconds.
23. driving circuits according to claim 20, also comprise a voltage supply N-type MOS (metal-oxide-semiconductor) transistor, wherein this voltage supply N-type MOS (metal-oxide-semiconductor) transistor comprises a first end and one the 2nd end, this first end is electrically coupled to one the 2nd end of this control P type metal oxide semiconductor transistor of this current control circuit, and the 2nd end is in order to receive a high voltage potential.
24. driving circuits according to claim 20, wherein the 2nd end of this electric capacity can be charged by this resistance of this peak value comparison method branch road.
25. driving circuits according to claim 20, wherein this first current potential is a positive potential, and the 2nd current potential is greater than this first current potential.
26. driving circuits according to claim 20, wherein this power MOS transistor is a high-voltage metal oxide semiconductor transistor.
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| CN201210289797.2A CN103595382B (en) | 2012-08-15 | 2012-08-15 | Driving circuit and current control circuit wherein |
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| US5552746A (en) * | 1995-04-07 | 1996-09-03 | Sgs-Thomson Microelectronics, Inc. | Gate drive circuit |
| CN101551688A (en) * | 2008-04-03 | 2009-10-07 | 瑞鼎科技股份有限公司 | Current-limiting circuit and electrical device with same |
| CN102385406A (en) * | 2010-09-01 | 2012-03-21 | 上海宏力半导体制造有限公司 | Capacitor-less low dropout regulator structure |
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| US5500615A (en) * | 1991-12-06 | 1996-03-19 | Tektronix, Inc. | Low power CCD driver with symmetrical output drive signal |
| US5552746A (en) * | 1995-04-07 | 1996-09-03 | Sgs-Thomson Microelectronics, Inc. | Gate drive circuit |
| CN101551688A (en) * | 2008-04-03 | 2009-10-07 | 瑞鼎科技股份有限公司 | Current-limiting circuit and electrical device with same |
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