CN104200186A - Method for preventing dead halt and laser bar code scanning platform - Google Patents

Method for preventing dead halt and laser bar code scanning platform Download PDF

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Publication number
CN104200186A
CN104200186A CN201410419760.6A CN201410419760A CN104200186A CN 104200186 A CN104200186 A CN 104200186A CN 201410419760 A CN201410419760 A CN 201410419760A CN 104200186 A CN104200186 A CN 104200186A
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China
Prior art keywords
chip
request information
synchronization request
state
house dog
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CN201410419760.6A
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CN104200186B (en
Inventor
周竟云
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SHENZHEN XINGTONG WULIAN TECHNOLOGY Co Ltd
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SHENZHEN XINGTONG WULIAN TECHNOLOGY Co Ltd
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Priority to CN201410419760.6A priority Critical patent/CN104200186B/en
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Abstract

The application discloses a method for preventing dead halt. The method for preventing the dead halt includes steps: detecting whether synchronization requesting information which is used to inform a receiver of the synchronization requesting information to initialize lead foot status and synchronize encryption factors so as to synchronize the receiver of the synchronization requesting information with a sender of the synchronization requesting information is received by a first chip and/ or a second chip; if the synchronization requesting information is received by the first chip and/ or the second chip, controlling initialization of the first chip and the second chip. The invention further discloses a laser bar code scanning platform. The method for preventing the dead halt and the laser bar code scanning platform use a small number of chip resources, intelligently solve the problem that the laser bar code scanning platform halts on the premise of not needing to restart the laser bar code scanning platform, and thereby save time of restarting the laser bar code scanning platform when the laser bar code scanning platform halts, reduce time cost of users, and simultaneously improve continuity and experience feeling degrees of using the laser bar code scanning platform for users.

Description

The method of anti-deadlock and laser bar code scanning platform
Technical field
The present invention relates to bar code scan technical field, relate in particular to method and the laser bar code scanning platform of anti-deadlock.
Background technology
At present, a lot of laser bar code scanning platforms (for example, hot environment) or long-time in running order easy appearance deadlock situation under special environment.Deadlock is divided into hard deadlock (deadlock causing due to hardware fault) and soft deadlock (being the deadlock that software program internal problem causes).
According to market study, seldom, most of deadlock is the deadlock causing due to software issue to the deadlock situation being caused by hardware.When laser bar code scanning platform is during in deadlock state, scanning platform cannot normally be worked.At this moment, the solution of most of laser bar code scanning platform producer is that requirement user pulls out electricity and laser bar code scanning platform re-powered again, and allows laser bar code scanning platform restart and enters duty.But the restarting process length that expends time in, and this disposal route blocked the continuity that user uses laser bar code scanning platform, seriously reduced user's equipment experience sense, has also strengthened the time cost that user uses laser bar code scanning platform.
Foregoing only, for auxiliary understanding technical scheme of the present invention, does not represent and admits that foregoing is prior art.
Summary of the invention
Fundamental purpose of the present invention is to solve laser bar code scanning platform and crashes and restart the length that expends time in, poor user experience, technical matters that time cost is high.
For achieving the above object, the method for a kind of anti-deadlock provided by the invention, the method for described anti-deadlock comprises the following steps:
Detect the first chip and/or whether the second chip receives synchronization request information, described synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, with the transmit leg synchronous communication with described synchronization request information;
If described the first chip and/or the second chip are received synchronization request information, control described the first chip and the second chip and carry out initialization pin state and the synchronous crypto-operation factor.
Preferably, if described the first chip and/or the second chip are received synchronization request information, the step of described the first chip and/or the second chip being carried out to initialization pin state and the synchronous crypto-operation factor comprises:
If described the first chip is received the synchronization request information that described the second chip sends, control its pin state of described the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the second chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the second chip is received the synchronization request information that described the first chip sends, control its pin state of described the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the first chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the first chip and the second chip are received mutually the synchronization request information that the other side sends, control described the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
Preferably, before whether described detection the first chip and/or the second chip receive the step of synchronization request information, the method for described anti-deadlock also comprises:
Judge the running status of described the first chip and the second chip;
If described the first chip or described the second chip are in power-up state, described the first chip and the second chip send mutually synchronization request information;
If described the first chip is in deadlock state, described the first chip sends synchronization request information to described the second chip after restarting;
If described the second chip is in deadlock state, described the second chip sends synchronization request information to described the first chip after restarting, and wherein, the running status of described the first chip and the second chip comprises power-up state, normal condition and deadlock state.
Preferably, by the running status of the first chip described in the first house dog Real-Time Monitoring is set, if described the first house dog is not because being set to 0 and overflow by described the first chip, described the first chip is in deadlock state;
By the running status of the second core described in the second house dog Real-Time Monitoring is set, if described the second house dog is not because being set to 0 and overflow by described the second chip, described the second chip is in deadlock state.
Preferably, if described the first chip and/or the second chip are received synchronization request information, after described the first chip and the second chip being carried out to initialized step, the method for described anti-deadlock also comprises:
Judge the state of described the first house dog and the second house dog;
If the mode bit of described the first house dog and the second house dog is 0, judges that described the first chip and the second chip initiation are because causing in power-up state, and send start sound;
If the mode bit of described the first house dog and the second house dog is 1, judge that described the first chip and the second chip initiation are because causing in deadlock state, and by house dog state for setting to 0, do not send start sound.
In addition, for achieving the above object, the present invention also provides a kind of laser bar code scanning platform, and this laser bar code scanning platform comprises:
Synchronous detection module, for detection of the first chip and/or the second chip, whether receive synchronization request information, described synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, with the transmit leg synchronous communication with described synchronization request information;
Initialization module, for when described the first chip and/or the second chip are received synchronization request information, controls described the first chip and the second chip and carries out initialization pin state and the synchronous crypto-operation factor.
Preferably, described initialization module is used for:
If described the first chip is received the synchronization request information that described the second chip sends, control its pin state of described the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the second chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the second chip is received the synchronization request information that described the first chip sends, control its pin state of described the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the first chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the first chip and the second chip are received mutually the synchronization request information that the other side sends, control described the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
Preferably, described laser bar code scanning platform also comprises:
The first judge module, judges the running status of described the first chip and the second chip;
If described the first chip or described the second chip are in power-up state, described the first chip and the second chip send mutually synchronization request information;
If described the first chip is in deadlock state, described the first chip sends synchronization request information to described the second chip after restarting;
If described the second chip is in deadlock state, described the second chip sends synchronization request information to described the first chip after restarting, and wherein, the running status of described the first chip and the second chip comprises power-up state, normal condition and deadlock state.
Preferably, by the running status of the first chip described in the first house dog Real-Time Monitoring is set, if described the first house dog is not because being set to 0 and overflow by described the first chip, described the first chip is in deadlock state;
By the running status of the second chip described in the second house dog Real-Time Monitoring is set, if described the second house dog is not because being set to 0 and overflow by described the second chip, described the second chip is in deadlock state.
Preferably, described laser bar code scanning platform also comprises:
The second judge module, for judging the state of described the first house dog and the second house dog, if the mode bit of described the first house dog and the second house dog is 0, judges that described the first chip and the second chip initiation are because causing in power-up state, and send start sound;
If the mode bit of described the first house dog and the second house dog is 1, judge that described the first chip and the second chip initiation are because causing in deadlock state, and by house dog state for setting to 0, do not send start sound.
The present invention is by detecting the first chip and/or whether the second chip receives synchronization request information, this synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, with the transmit leg synchronous communication with described synchronization request information, if the first chip and/or the second chip are received synchronization request information, control described the first chip and the second chip and carry out initialization pin state and the synchronous crypto-operation factor, like this, when the first chip deadlock and after house dog is waken up and restarts, the first chip sends synchronization request information to the second chip and notifies the second chip initiation pin state and the synchronous crypto-operation factor, and the first chip also carries out initialization pin state and the synchronous crypto-operation factor, when the second chip deadlock and after house dog is waken up and restarts, the second chip sends synchronization request information to the first chip and notifies the first chip initiation pin state and the synchronous crypto-operation factor, and the second chip also carries out initialization pin state and the synchronous crypto-operation factor, when the first chip with the second chip crashes and after house dog is waken up and restarts simultaneously, the first chip and the second chip carry out initialization pin state and the synchronous crypto-operation factor simultaneously, like this, the laser bar code scanning platform that is inside provided with the first chip and the second chip has crashed, only need the first chip and the second chip initiation pin state and the synchronous crypto-operation factor to realize synchronous communication, utilized a small amount of resources of chip, do not needing to restart under the prerequisite of laser bar code scanning platform, solved intelligently the problem that laser bar code scanning platform crashes, thereby saved the time that laser bar code scanning platform is restarted because of deadlock, reduced user's time cost, simultaneously, continuity and experience sense that user uses this laser bar code scanning platform have been strengthened.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of method first embodiment of the anti-deadlock of the present invention;
If Fig. 2 is that in Fig. 1, described the first chip and/or the second chip are received synchronization request information, described the first chip and/or the second chip are carried out the refinement schematic flow sheet of initialized step;
Fig. 3 is the schematic flow sheet of method second embodiment of the anti-deadlock of the present invention;
Fig. 4 is the schematic flow sheet of method the 3rd embodiment of the anti-deadlock of the present invention;
Fig. 5 is the high-level schematic functional block diagram of laser bar code scanning platform the first embodiment of the present invention;
Fig. 6 is the high-level schematic functional block diagram of laser bar code scanning platform the second embodiment of the present invention;
Fig. 7 is the high-level schematic functional block diagram of laser bar code scanning platform the 3rd embodiment of the present invention;
Fig. 8 is the present invention's the first chip and the second chip pin and data flow schematic diagram.
The realization of the object of the invention, functional characteristics and advantage, in connection with embodiment, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
The invention provides a kind of method of anti-deadlock.
With reference to Fig. 1, Fig. 1 is the schematic flow sheet of method first embodiment of the anti-deadlock of the present invention.
In the first embodiment, the method for this anti-deadlock comprises:
Step S10, detects the first chip and/or the second chip and whether receives synchronization request information, and synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of synchronization request information, with the transmit leg synchronous communication with synchronization request information;
With reference to Fig. 8, the first chip is for encrypting, and the ciphertext that encryption obtains sends to the second chip, the second chip is for deciphering, the synchronous crypto-operation factor is for the encryption of the first chip and the deciphering of the second chip, and the synchronous crypto-operation factor is constantly synchronous variation along with the carrying out of communication between the first chip and the second chip; The pin state of initialization the first chip and the second chip, the 3rd pin (Pin.3) of the first chip is connected with the 5th pin (Pin.5) of the second chip, second pin (Pin.2) of the first chip is connected with the 7th pin (Pin.7) of the second chip.The 3rd pin of the first chip only signals, the second only number of collection of letters of pin of the first chip; The 5th pin of the second chip only connects signal, the 7th only number of collection of letters of pin of the second chip.The synchronization request information mutually sending between the first chip and the second chip is 1010 (height height electricity frequently) pulse signal, like this, detect the second pin of the first chip and/or whether the 5th pin of the second chip receives 1010 pulse signals, just realized and detected the function whether the first chip and/or the second chip receive synchronization request information.
If the first chip crashes, the first chip detected because of after crashing and restarting, to the synchronization request information of the second chip transmission; After if the second chip crashes and restarts, the synchronization request information of the second chip because crashing and sending to the first chip detected; After if the first chip and the second chip all crash and restart, the first chip and the second chip synchronization request information because crashing and mutually sending detected.
Step S20, if the first chip and/or the second chip are received synchronization request information, controls the first chip and the second chip and carries out initialization pin state and the synchronous crypto-operation factor.
No matter be that the first chip or the second chip are received synchronization request information, or first chip and the second chip all received synchronization request message, all need the transmit leg of synchronization request message and take over party to carry out initialization pin state and the synchronous crypto-operation factor, to realize the synchronous communication of the first chip and the second chip simultaneously.
In the present embodiment, by detecting the first chip and/or whether the second chip receives synchronization request information, this synchronization request information is in order to notify take over party's initialization of described synchronization request information to synchronize with the transmit leg of described synchronization request information, if the first chip and/or the second chip are received synchronization request information, described the first chip and the second chip are carried out to initialization pin state and the synchronous crypto-operation factor, like this, when the first chip crashes after house dog is waken up and restarts, the first chip sends synchronization request information to the second chip and notifies the second chip initiation pin state and the synchronous crypto-operation factor, and the first chip also carries out initialization pin state and the synchronous crypto-operation factor, when the second chip crashes after house dog is waken up and restarts, the second chip sends synchronization request information to the first chip and notifies the first chip initiation pin state and the synchronous crypto-operation factor, and the second chip also carries out initialization pin state and the synchronous crypto-operation factor, when the first chip and the second chip crash after house dog is waken up and restarts simultaneously, the first chip and the second chip carry out initialization pin state and the synchronous crypto-operation factor simultaneously, like this, the laser bar code scanning platform that is inside provided with the first chip and the second chip has crashed, only need the first chip and the second chip initiation to realize synchronous communication, utilized a small amount of resources of chip, do not needing to restart under the prerequisite of laser bar code scanning platform, solved intelligently the problem that laser bar code scanning platform crashes, thereby saved the time that laser bar code scanning platform is restarted because of deadlock, reduced user's time cost, simultaneously, continuity and experience sense that user uses this laser bar code scanning platform have been strengthened.
Further, with reference to Fig. 2, Fig. 2 is the refinement schematic flow sheet of step S20 in Fig. 1.
In the present embodiment, step S20 comprises:
Step S201, if the first chip is received the synchronization request information that the second chip sends, control its pin state of the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of the second chip initiation and the synchronous crypto-operation factor that send synchronization request information;
When the second chip crashes, through certain hour house dog, from increasing to overflow, wake the second chip up, after restarting, the second chip sends synchronization request information, then its pin state of the second chip initiation and the synchronous crypto-operation factor to the first chip; When the first chip is received after the synchronization request information of the second chip transmission, its pin state of the first chip initiation and the synchronous crypto-operation factor.
Step S202, if the second chip is received the synchronization request information that the first chip sends, control its pin state of the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of the first chip initiation and the synchronous crypto-operation factor that send synchronization request information;
When the first chip crashes, through certain hour house dog, from increasing to overflow, wake the first chip up, after restarting, the first chip sends synchronization request information, then its pin state of the first chip initiation and the synchronous crypto-operation factor to the second chip; When the second chip is received after the synchronization request information of the first chip transmission, its pin state of the second chip initiation and the synchronous crypto-operation factor.
Step S203, if the first chip and the second chip are received mutually the synchronization request information that the other side sends, controls the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
When the first chip and the second chip crash simultaneously, the house dog of the first chip and the second chip is all certainly increased and overflows because not feeding dog, house dog is waken the first chip and the second chip up, and the first chip and the second chip restart rear mutual transmission synchronization request information; When the first chip is received after the synchronization request information that the second chip sends, its pin state of initialization and the synchronous crypto-operation factor; When the second chip is received after the synchronization request information that the first chip sends, its pin state of initialization and the synchronous crypto-operation factor.
Further, with reference to Fig. 3, the schematic flow sheet of method second embodiment of the anti-deadlock of the present invention.
In a second embodiment, before step S10, the method for this anti-deadlock also comprises:
Step S30, the running status of judgement the first chip and the second chip, if the first chip or the second chip in power-up state, the first chip and the second chip send mutually synchronization request information; If the first chip is in deadlock state, the first chip sends synchronization request information to the second chip after restarting; If the second chip is in deadlock state, the second chip sends synchronization request information to the first chip after restarting, and wherein, the running status of the first chip and the second chip comprises power-up state, normal condition and deadlock state.
When laser bar code scanning platform is powered on, the first chip and the second chip are simultaneously in power-up state, and the first chip and the second chip send mutually synchronization request information, and the first chip and the second chip initiation.
If the first chip and the second chip are in normal condition, the first chip and the second chip do not send synchronization request information, and the first chip is normally carried out encryption function, raw data is encrypted to ciphertext and sends to the second chip; The second chip is normally carried out decipher function, and decrypt ciphertext is become expressly to forward.
Further, by the running status of first house dog Real-Time Monitoring the first chip is set, if the first house dog is not because being set to 0 and overflow by the first chip, the first chip is in deadlock state; By the running status of second house dog Real-Time Monitoring the second core is set, if the second house dog is not because being set to 0 and overflow by the second chip, the second chip is in deadlock state.
Default house dog in the first chip and the second chip, the start original state position of house dog is 0, the normal meeting timing reset in service of the first chip and the second chip be restarted house dog (feeding dog), if the first chip or the second chip crash, house dog is overflowed because being timed to reset to restart, and house dog is waken the first chip or the second chip up.That is to say, when the first chip crashes, the first house dog is not because being set to 0 and overflow by the first chip, and the first house dog is waken the first chip up, the first chip is restarted and send synchronization request information, then initialization to the second chip; When the second chip crashes, the second house dog is not because being set to 0 and overflow by the second chip, and the second house dog is waken the second chip up, the second chip restarted and send synchronization request information, then initialization to the first chip.
Further, with reference to Fig. 4, Fig. 4 is the schematic flow sheet of method the 3rd embodiment of the anti-deadlock of the present invention.
In the 3rd embodiment, after step S20, the method for this anti-deadlock also comprises:
Step S40, the state of judgement the first house dog and the second house dog, if the mode bit of the first house dog and the second house dog is 0, judges that the first chip and the second chip initiation are because causing in power-up state, and sends start sound; If the mode bit of the first house dog and the second house dog is 1, judge that the first chip and the second chip initiation, because of what cause in deadlock state, do not send start sound, and by the state position of house dog 0.
In the present embodiment, after the first chip and the second chip initiation, according to the mode bit of the first house dog and the second house dog, judgement the first chip and the second chip are the initialization that re-powers or cause due to deadlock due to laser bar code scanning platform.Because the mode bit initial default value of the first house dog and the second house dog is 0, when the first chip and the second chip cannot be regularly set to 0 the first house dog and the second house dog because of deadlock, the mode bit of the first house dog and the second house dog overflows and becomes 1.So, after the first chip and the second chip initiation, if the mode bit of the first house dog and the second house dog is 0, judge that the first chip and the second chip initiation are because causing in power-up state, and send start sound, to point out user's laser bar code scanning platform to restart, if the mode bit of the first house dog and the second house dog is 1, judge that the first chip and the second chip initiation are because causing in deadlock state, do not send start sound, and by the state position of house dog 0, due to the first chip and/or the second chip because of deadlock restart and the process of initialization pin state and the encryption synchronisation factor consuming time very short, and when the first chip and/or the second chip initiation are because causing in deadlock state, do not send start sound, whole process is completely transparent with respect to user, be that user is that imperceptible the first chip and/or the second chip crashed, user can use laser bar code scanning platform very glibly.
The present invention further provides a kind of laser bar code scanning platform, with reference to Fig. 5, Fig. 5 is the high-level schematic functional block diagram of laser bar code scanning platform the first embodiment of the present invention.
In the first embodiment, this laser bar code scanning platform comprises:
Synchronous detection module 50, for detection of the first chip and/or the second chip, whether receive synchronization request information, synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of synchronization request information, with the transmit leg synchronous communication with synchronization request information;
With reference to Fig. 8, the first chip is for encrypting, and the ciphertext that encryption obtains sends to the second chip, the second chip is for deciphering, the synchronous crypto-operation factor is for the encryption of the first chip and the deciphering of the second chip, and the synchronous crypto-operation factor is constantly synchronous variation along with the carrying out of communication between the first chip and the second chip; The pin state of initialization the first chip and the second chip, the 3rd pin (Pin.3) of the first chip is connected with the 5th pin (Pin.5) of the second chip, second pin (Pin.2) of the first chip is connected with the 7th pin (Pin.7) of the second chip.The 3rd pin of the first chip only signals, the second only number of collection of letters of pin of the first chip; The 5th pin of the second chip only connects signal, the 7th only number of collection of letters of pin of the second chip.The synchronization request information mutually sending between the first chip and the second chip is 1010 (height height electricity frequently) pulse signal, like this, detect the second pin of the first chip and/or whether the 5th pin of the second chip receives 1010 pulse signals, just realized and detected the function whether the first chip and/or the second chip receive synchronization request information.
After if the first chip crashes and restarts, the synchronization request information of the first chip because crashing and sending to the second chip detected; If the second chip and restart after, the synchronization request information of the second chip because crashing and sending to the first chip detected; After if the first chip and the second chip all crash and restart, the first chip and the second chip synchronization request information because crashing and mutually sending detected.
Initialization module 60, for when the first chip and/or the second chip are received synchronization request information, controls the first chip and the second chip and carries out initialization pin state and the synchronous crypto-operation factor.
No matter be that the first chip or the second chip are received synchronization request information, or first chip and the second chip all received synchronization request message, all need the transmit leg of synchronization request message and take over party to carry out initialization pin state and the synchronous crypto-operation factor simultaneously, be pin state and the synchronous crypto-operation factor of initialization the first chip and the second chip, to realize the synchronous communication of the first chip and the second chip.
In the present embodiment, by detecting the first chip and/or whether the second chip receives synchronization request information, this synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, to synchronize with the transmit leg of described synchronization request information, if the first chip and/or the second chip are received synchronization request information, described the first chip and the second chip are carried out to initialization pin state and the synchronous crypto-operation factor, like this, when the first chip crashes after house dog is waken up and restarts, the first chip sends synchronization request information to the second chip and notifies the second chip initiation pin state and the synchronous crypto-operation factor, and the first chip also carries out initialization pin state and the synchronous crypto-operation factor, when the second chip crashes after house dog is waken up and restarts, the second chip sends synchronization request information to the first chip and notifies the first chip initiation pin state and the synchronous crypto-operation factor, and the second chip also carries out initialization pin state and the synchronous crypto-operation factor, when the first chip and the second chip crash after house dog is waken up and restarts simultaneously, the first chip and the second chip carry out initialization pin state and the synchronous crypto-operation factor simultaneously, like this, the laser bar code scanning platform that is inside provided with the first chip and the second chip has crashed, only need the first chip and the second chip initiation to realize synchronous communication, utilized a small amount of resources of chip, do not needing to restart under the prerequisite of laser bar code scanning platform, solved intelligently the problem that laser bar code scanning platform crashes, thereby saved the time that laser bar code scanning platform is restarted because of deadlock, reduced user's time cost, simultaneously, continuity and experience sense that user uses this laser bar code scanning platform have been strengthened.
Further, initialization module 60 for:
If the first chip is received the synchronization request information that the second chip sends, control its pin state of the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of the second chip initiation and the synchronous crypto-operation factor that send synchronization request information;
If the second chip is received the synchronization request information that the first chip sends, control its pin state of the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of the first chip initiation and the synchronous crypto-operation factor that send synchronization request information;
If the first chip and the second chip are received mutually the synchronization request information that the other side sends, control the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
When the second chip crashes, through certain hour house dog, from increasing to overflow, wake the second chip up, after restarting, the second chip sends synchronization request information, then its pin state of the second chip initiation and the synchronous crypto-operation factor to the first chip; When the first chip is received after the synchronization request information of the second chip transmission, its pin state of the first chip initiation and the synchronous crypto-operation factor.
When the first chip crashes, through certain hour house dog, from increasing to overflow, wake the first chip up, after restarting, the first chip sends synchronization request information, then its pin state of the first chip initiation and the synchronous crypto-operation factor to the second chip; When the second chip is received after the synchronization request information of the first chip transmission, its pin state of the second chip initiation and the synchronous crypto-operation factor.
When the first chip and the second chip crash simultaneously, the house dog of the first chip and the second chip is all certainly increased and overflows because not feeding dog, house dog is waken the first chip and the second chip up, and the first chip and the second chip restart rear mutual transmission synchronization request information; When the first chip is received after the synchronization request information that the second chip sends, its pin state of initialization and the synchronous crypto-operation factor; When the second chip is received after the synchronization request information that the first chip sends, its pin state of initialization and the synchronous crypto-operation factor.
Further, with reference to Fig. 6, Fig. 6 is the high-level schematic functional block diagram of laser bar code scanning platform the second embodiment of the present invention.
In a second embodiment, this laser bar code scanning platform also comprises:
The first judge module 70, for judging the running status of the first chip and the second chip, if the first chip and the second chip in power-up state, the first chip and the second chip send mutually synchronization request information; If the first chip is in deadlock state, the first chip sends synchronization request information to the second chip after restarting; If the second chip is in deadlock state, the second chip sends synchronization request information to the first chip after restarting, and wherein, the running status of the first chip and the second chip comprises power-up state, normal condition and deadlock state.
When laser bar code scanning platform is powered on, the first chip and the second chip are simultaneously in power-up state, and the first chip and the second chip send mutually synchronization request information, and the first chip and the second chip initiation
If the first chip and the second chip are in normal condition, the first chip and the second chip do not send synchronization request information, and the first chip is normally carried out encryption function, raw data is encrypted to ciphertext and sends to the second chip; The second chip is normally carried out decipher function, and decrypt ciphertext is become expressly to forward.
Further, by the running status of first house dog Real-Time Monitoring the first chip is set, if the first house dog is not because being set to 0 and overflow by the first chip, the first chip is in deadlock state; The running status of second house dog Real-Time Monitoring the second core is set, if the second house dog is not because being set to 0 and overflow by the second chip, the second chip is in deadlock state.
Default house dog in the first chip and the second chip, the start original state position of house dog is 0, the normal meeting timing reset in service of the first chip and the second chip be restarted house dog (feeding dog), if the first chip or the second chip crash, house dog is overflowed because being timed to reset to restart, and house dog is waken the first chip or the second chip up.That is to say, when the first chip crashes, the first house dog is not because being set to 0 and overflow by the first chip, and the first house dog is waken the first chip up, the first chip is restarted and send synchronization request information, then initialization to the second chip; When the second chip crashes, the second house dog is not because being set to 0 and overflow by the second chip, and the second house dog is waken the second chip up, the second chip restarted and send synchronization request information, then initialization to the first chip.
Further, with reference to Fig. 7, Fig. 7 is the high-level schematic functional block diagram of laser bar code scanning platform the 3rd embodiment of the present invention.
In the 3rd embodiment, this laser bar code scanning platform also comprises:
The second judge module 80, for judging the state of the first house dog and the second house dog, if the mode bit of the first house dog and the second house dog is 0, judges that the first chip and the second chip initiation are because causing in power-up state, and sends start sound; If the mode bit of the first house dog and the second house dog is 1, judge that the first chip and the second chip initiation, because of what cause in deadlock state, do not send start sound, and by the state position of house dog 0.
In the present embodiment, after the first chip and the second chip initiation, according to the mode bit of the first house dog and the second house dog, judge that the first chip and the second chip are the initialization that re-powers or cause due to deadlock due to laser bar code scanning platform.Because the mode bit initial default value of the first house dog and the second house dog is 0, when the first chip and the second chip cannot be regularly set to 0 the first house dog and the second house dog because of deadlock, the mode bit of the first house dog and the second house dog overflows and becomes 1.So, after the first chip and the second chip initiation, if the mode bit of the first house dog and the second house dog is 0, judge that the first chip and the second chip initiation are because causing in power-up state, and send start sound, to point out user's laser bar code scanning platform to restart, if the mode bit of the first house dog and the second house dog is 1, judge that the first chip and the second chip initiation are because causing in deadlock state, do not send start sound, and by the state position of house dog 0, due to the first chip and/or the second chip because of deadlock restart and the process of initialization pin state and the encryption synchronisation factor consuming time very short, and when the first chip and/or the second chip initiation are because causing in deadlock state, do not send start sound, whole process is completely transparent with respect to user, be that user is that imperceptible the first chip and/or the second chip crashed, user can use laser bar code scanning platform very glibly.
These are only the preferred embodiments of the present invention; not thereby limit the scope of the claims of the present invention; every equivalent structure or conversion of equivalent flow process that utilizes instructions of the present invention and accompanying drawing content to do; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present invention.

Claims (10)

1. a method for anti-deadlock, is characterized in that, the method for described anti-deadlock comprises the following steps:
Detect the first chip and/or whether the second chip receives synchronization request information, described synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, with the transmit leg synchronous communication with described synchronization request information;
If described the first chip and/or the second chip are received synchronization request information, control described the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
2. the method for anti-deadlock as claimed in claim 1, it is characterized in that, if described the first chip and/or the second chip are received synchronization request information, the step of described the first chip and the second chip being carried out to initialization pin state and the synchronous crypto-operation factor comprises:
If described the first chip is received the synchronization request information that described the second chip sends, control its pin state of described the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the second chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the second chip is received the synchronization request information that described the first chip sends, control its pin state of described the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the first chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the first chip and the second chip are received mutually the synchronization request information that the other side sends, control described the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
3. the method for anti-deadlock as claimed in claim 1 or 2, is characterized in that, before whether described detection the first chip and/or the second chip receive the step of synchronization request information, the method for described anti-deadlock also comprises:
Judge the running status of described the first chip and the second chip;
If described the first chip or described the second chip are in power-up state, described the first chip and the second chip send mutually synchronization request information;
If described the first chip is in deadlock state, described the first chip sends synchronization request information to described the second chip after restarting;
If described the second chip is in deadlock state, described the second chip sends synchronization request information to described the first chip after restarting, and wherein, the running status of described the first chip and the second chip comprises power-up state, normal condition and deadlock state.
4. the method for anti-deadlock as claimed in claim 3, is characterized in that,
By the running status of the first chip described in the first house dog Real-Time Monitoring is set, if described the first house dog is not because being set to 0 and overflow by described the first chip, described the first chip is in deadlock state;
By the running status of the second chip described in the second house dog Real-Time Monitoring is set, if described the second house dog is not because being set to 0 and overflow by described the second chip, described the second chip is in deadlock state.
5. the method for anti-deadlock as claimed in claim 4, it is characterized in that, if described the first chip and/or the second chip are received synchronization request information, after described the first chip and the second chip being carried out to initialized step, the method for described anti-deadlock also comprises:
Judge the state of described the first house dog and the second house dog;
If the mode bit of described the first house dog and the second house dog is 0, judges that described the first chip and the second chip initiation are because causing in power-up state, and send start sound;
If the mode bit of described the first house dog and the second house dog is 1, judge that described the first chip and the second chip initiation are because causing in deadlock state, and by house dog state for setting to 0, do not send start sound.
6. a laser bar code scanning platform, is characterized in that, described laser bar code scanning platform comprises:
Synchronous detection module, for detection of the first chip and/or the second chip, whether receive synchronization request information, described synchronization request information is in order to notify take over party's initialization pin state and the synchronous crypto-operation factor of described synchronization request information, with the transmit leg synchronous communication with described synchronization request information;
Initialization module, for when described the first chip and/or the second chip are received synchronization request information, controls described the first chip and the second chip and carries out initialization pin state and the synchronous crypto-operation factor.
7. laser bar code scanning platform as claimed in claim 6, is characterized in that, described initialization module is used for:
If described the first chip is received the synchronization request information that described the second chip sends, control its pin state of described the first chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the second chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the second chip is received the synchronization request information that described the first chip sends, control its pin state of described the second chip initiation and the synchronous crypto-operation factor, meanwhile, control its pin state of described the first chip initiation and the synchronous crypto-operation factor that sends synchronization request information;
If described the first chip and the second chip are received mutually the synchronization request information that the other side sends, control described the first chip and the second chip initiation pin state and the synchronous crypto-operation factor.
8. the laser bar code scanning platform as described in claim 6 or 7, is characterized in that, described laser bar code scanning platform also comprises:
The first judge module, judges the running status of described the first chip and the second chip;
If described the first chip or described the second chip are in power-up state, described the first chip and the second chip send mutually synchronization request information;
If described the first chip is in deadlock state, described the first chip sends synchronization request information to described the second chip after restarting;
If described the second chip is in deadlock state, described the second chip sends synchronization request information to described the first chip after restarting, and wherein, the running status of described the first chip and the second chip comprises power-up state, normal condition and deadlock state.
9. laser bar code scanning platform as claimed in claim 8, is characterized in that,
By the running status of the first chip described in the first house dog Real-Time Monitoring is set, if described the first house dog is not because being set to 0 and overflow by described the first chip, described the first chip is in deadlock state;
By the running status of the second chip described in the second house dog Real-Time Monitoring is set, if described the second house dog is not because being set to 0 and overflow by described the second chip, described the second chip is in deadlock state.
10. laser bar code scanning platform as claimed in claim 9, is characterized in that, described laser bar code scanning platform also comprises:
The second judge module, for judging the state of described the first house dog and the second house dog;
If the mode bit of described the first house dog and the second house dog is 0, judges that described the first chip and the second chip initiation are because causing in power-up state, and send start sound;
If the mode bit of described the first house dog and the second house dog is 1, judge that described the first chip and the second chip initiation are because causing in deadlock state, and by house dog state for setting to 0, do not send start sound.
CN201410419760.6A 2014-08-22 2014-08-22 The method and laser bar code scanning platform of anti-deadlock Active CN104200186B (en)

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CN101599829A (en) * 2008-06-06 2009-12-09 华为技术有限公司 Authentication method, reader and label

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US6581835B1 (en) * 1995-12-18 2003-06-24 Metrologic Instruments, Inc. Method of and system for scanning bar code symbols using a laser scanning pattern having multiple focal zones, wherein the minimum beam dimension/minimum bar width (mbd/mbw) ratio is greater than or equal to 2.0
CN1956449A (en) * 2005-10-28 2007-05-02 北京书生数字技术有限公司 Encipher transmission method and equipment system for preventing cpying data resource
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CN101599829A (en) * 2008-06-06 2009-12-09 华为技术有限公司 Authentication method, reader and label

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