CN104979298A - Package substrate and production process thereof - Google Patents
Package substrate and production process thereof Download PDFInfo
- Publication number
- CN104979298A CN104979298A CN201510360625.3A CN201510360625A CN104979298A CN 104979298 A CN104979298 A CN 104979298A CN 201510360625 A CN201510360625 A CN 201510360625A CN 104979298 A CN104979298 A CN 104979298A
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- hole
- upper substrate
- infrabasal plate
- substrate
- photosensitive
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Abstract
The invention provides a package substrate and a production process thereof, and relates to the technical field of package substrates. The problem of large package thickness of the existing 2D planar structure package substrate is solved. The technical problems of difficult development, large cost and long production cycle of a 3D structure package substrate are solved. The package substrate comprises upper and lower substrates. The lower substrate is arranged at the bottom of the upper substrate, and is laminated and connected with the bottom of the upper substrate through a glue layer. A photosensitive through hole is arranged in the upper substrate. A chip storage hole corresponding to the photosensitive through hole is arranged in the lower substrate. The size of the chip storage hole is larger than the size of the photosensitive through hole. Upper and lower substrates are respectively provided with a circuit. The circuit of the upper substrate and the circuit of the lower substrate are electrically connected through a metallization hole structure. A plating bump which is used for flip-chip is arranged in an area where the periphery of the photosensitive through hole in the bottom of the upper substrate and the lower substrate are not laminated. The plating bump is connected with the circuit of the bottom of the upper substrate. Upper and lower substrates are laminated through the glue layer. Through the chip hole, the package thickness is reduced. The package substrate has the advantages of high product integration, small size, low difficulty and short production cycle. Most processes use a traditional PCB manufacturing process.
Description
Technical field
The present invention relates to base plate for packaging technical field.
Background technology
Base plate for packaging can be chip and provides the effects such as electrical connection, protection, support, heat radiation, assembling, to realize many pinizations, reduces encapsulating products volume, improves the object of electrical property and thermal diffusivity, super-high density or multi-chip module.But current base plate for packaging is 2D planar structure mostly, and it is higher that 2D planar structure exists package thickness, and the base plate for packaging of 3D structure mainly adopts pottery, development difficulty and cost are comparatively large, and the production cycle is long.
Summary of the invention
In sum, the object of the invention is to solve existing 2D planar structure base plate for packaging, to there is package thickness higher, the base plate for packaging of 3D structure there is development difficulty and cost is comparatively large, the technical deficiency that the production cycle is long, and proposes a kind of base plate for packaging and manufacture craft thereof.
For solving technical problem proposed by the invention, the technical scheme of employing is: a kind of base plate for packaging, it is characterized in that described base plate for packaging includes upper substrate and infrabasal plate; Infrabasal plate is placed in bottom upper substrate, is connected with the pressing of upper substrate underrun glue-line; Upper substrate offers photosensitive through hole, infrabasal plate offers the chip receiving hole corresponding with photosensitive through hole, chip receiving hole size is greater than photosensitive through hole; Upper substrate and infrabasal plate are respectively equipped with circuit, the circuit of upper substrate is electrically connected by plated-through hole structure with the circuit of infrabasal plate, upper substrate bottom surface is positioned at the peripheral plated bumps be provided with the non-pressing region of infrabasal plate for flip-chip of photosensitive through hole, and plated bumps is connected with upper substrate bottom surface circuit.
Described plated bumps is made up of copper facing bottom, nickel plating intermediate layer and zinc-plated skin.
Described infrabasal plate bottom surface circuit is provided with and forms solder terminal by copper facing bottom, nickel plating intermediate layer and zinc-plated skin.
The manufacture craft of described base plate for packaging, is characterized in that described technique includes following steps:
1), choose the substrate of two pieces of BT resin materials, wherein will make upper substrate by one piece of substrate, another block makes infrabasal plate;
2), by two pieces of substrates clean rear sputter titanium and copper respectively, form metal film layer at substrate surface;
3), on two pieces of substrates respectively through on photoresist, photoresistance exposure, photoresistance development and electro-coppering operation, two pieces of substrates are made into corresponding circuit layer respectively;
4), remove photoresist on upper substrate, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by upper substrate after photoresistance development and electroplate, powering at the lower surface circuit layer of upper substrate plates out plated bumps;
5), after two pieces of substrates complete electroplating operations, removal photoresist is placed in etching solution and etches away the metal film layer exposed, and makes the metal film layer of circuit layer and reservation form circuit;
6), on upper substrate, cut out photosensitive through hole, infrabasal plate cuts out size with photosensitive through hole correspondence position and is greater than photosensitive through hole, and the chip receiving hole needing flip-chip can be held;
7), by upper substrate and infrabasal plate pass through glue-line pressing, photosensitive through hole and chip receiving hole form the chip hole of a ledge structure; Described plated bumps is positioned on step surface;
8), to the upper substrate of stitching state and infrabasal plate hole, and hole metallization process is carried out to boring.
The 4th) also include in step and remove photoresist on infrabasal plate, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by infrabasal plate after photoresistance development and electroplate, powering at the lower surface circuit layer of infrabasal plate plates out the operation of solder terminal.
Beneficial effect of the present invention is: the substrate adopting BT resin material, there is the excellent characteristic of BT material, upper substrate and infrabasal plate are by glue-line pressing, the photosensitive through hole of upper substrate and the chip receiving hole of infrabasal plate form the chip hole of a ledge structure, chip can be embedded in the chip receiving hole of infrabasal plate, thus reduces package thickness.Realize new package substrate construction and flip-chip (Flip chip) technique, make product height integrated, volume-diminished; Major part processing procedure adopts traditional PCB manufacture craft, and difficulty is low, with short production cycle.
Accompanying drawing explanation
Fig. 1 is the upper substrate plan structure schematic diagram before pressing;
Fig. 2 is that the upper substrate before pressing looks up structural representation;
Fig. 3 is the infrabasal plate plan structure schematic diagram before pressing;
Fig. 4 is that the infrabasal plate before pressing looks up structural representation;
Fig. 5 is the finished product plan structure schematic diagram after pressing;
Fig. 6 is that the finished product after pressing looks up structural representation;
Fig. 7 is the A-A cross section structure schematic diagram of Fig. 5;
Fig. 8 is base plate for packaging fabrication processing figure of the present invention.
Embodiment
Below in conjunction with accompanying drawing and the preferred specific embodiment of the present invention, Structure and energy of the present invention is further described.
Shown in Fig. 7, base plate for packaging of the present invention includes upper substrate 1 and infrabasal plate 2; Infrabasal plate 2 is placed in bottom upper substrate 1, is connected with the pressing of upper substrate 1 underrun glue-line 4, such as, to be closed substrate 1 and infrabasal plate 2 by PP glue laminated.Upper substrate 1 offers photosensitive through hole 11, infrabasal plate 2 offers the chip receiving hole 21 corresponding with photosensitive through hole 11, chip receiving hole 21 size is greater than photosensitive through hole 11, photosensitive through hole 11 and chip receiving hole 21 form the chip hole of a ledge structure, and chip receiving hole 21 can hold the chip needing upside-down mounting; Upper substrate 1 and the two-sided of infrabasal plate 2 are provided with circuit respectively, and the circuit of upper substrate 1 is electrically connected by plated-through hole structure 3 with the circuit of infrabasal plate 2; It is peripheral with the non-pressing region of infrabasal plate 2 that upper substrate 1 bottom surface is positioned at photosensitive through hole 11, and that is to say that the chip hole of ledge structure terrace of appearing on the stage is provided with plated bumps 12 for flip-chip, plated bumps 12 is connected with upper substrate 1 bottom surface circuit; Plated bumps 12 is made up of copper facing bottom, nickel plating intermediate layer and zinc-plated skin.Described infrabasal plate 2 bottom surface circuit is provided with and forms solder terminal 22 by copper facing bottom, nickel plating intermediate layer and zinc-plated skin, makes infrabasal plate 2 as the output board of paster structure.
Shown in Fig. 8, base plate for packaging manufacture craft of the present invention includes following steps:
1), choose the substrate of two pieces of BT resin materials, and carry out baking and copper etch processes, wherein will make upper substrate 1 by one piece of substrate, another block makes infrabasal plate 2; BT resin is a kind of current material, with bismaleimides and triazine for main resin component, and add the thermosetting resin that epoxy resin, polyphenylene oxide resin or allyl compound etc. formed as modified component, with BT resin for the substrate that raw material is formed has the advantages such as high glass-transition temperature (Tg) (255 ~ 330 DEG C), thermal endurance (160 ~ 230 DEG C), moisture resistance, low-k (dk) and low lost factor (df);
2), by two pieces of substrates clean rear sputter titanium and copper respectively, form metal film layer at substrate surface, do early-stage preparations for follow-up plating makes circuit layer;
3), on two pieces of substrates respectively through on photoresist, photoresistance exposure, photoresistance development and electro-coppering operation, two pieces of substrates are made into corresponding circuit layer respectively; Also namely power at metal film layer and plate out the circuit layer corresponding with circuit, follow-up metal film layer is corresponding with circuit layer outside after etching away regions, circuit layer is then formed as circuit;
4), photoresist on upper substrate 1 is removed, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by upper substrate after photoresistance development and electroplate, powering at the lower surface circuit layer of upper substrate 1 plates out plated bumps 12; Remove photoresist on infrabasal plate 2, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by infrabasal plate 2 after photoresistance development and electroplate, powering at the lower surface circuit layer of infrabasal plate 2 plates out solder terminal 22;
5), after two pieces of substrates complete electroplating operations, removal photoresist is placed in etching solution and etches away the metal film layer exposed, and makes the metal film layer of circuit layer and reservation form circuit;
6), on upper substrate 1 laser cuts out photosensitive through hole 11, infrabasal plate 2 cuts out size with photosensitive through hole 11 correspondence position laser and is greater than photosensitive through hole 11, and can hold the chip receiving hole 21 needing flip-chip;
7), by upper substrate 1 and infrabasal plate 2 pass through PP glue-line 4 pressing, photosensitive through hole 11 and chip receiving hole 21 form the chip hole of a ledge structure; Described plated bumps 12 is positioned on step surface;
8), to the upper substrate 1 of stitching state and infrabasal plate 2 adopt CNC to hole, and hole metallization process is carried out to boring 3, the circuit on upper substrate 1 is electrically connected with the circuit on infrabasal plate 2.Hole metallization process can adopt and first go up photoresist, and then the heavy copper of logical tradition or sputtering process, form metal conducting layer at boring 3 hole wall, remove photoresist afterwards, reach between flaggy and conduct effect.
Claims (5)
1. a base plate for packaging, is characterized in that described base plate for packaging includes upper substrate and infrabasal plate; Infrabasal plate is placed in bottom upper substrate, is connected with the pressing of upper substrate underrun glue-line; Upper substrate offers photosensitive through hole, infrabasal plate offers the chip receiving hole corresponding with photosensitive through hole, chip receiving hole size is greater than photosensitive through hole; Upper substrate and infrabasal plate are respectively equipped with circuit, the circuit of upper substrate is electrically connected by plated-through hole structure with the circuit of infrabasal plate, upper substrate bottom surface is positioned at the peripheral plated bumps be provided with the non-pressing region of infrabasal plate for flip-chip of photosensitive through hole, and plated bumps is connected with upper substrate bottom surface circuit.
2. a kind of base plate for packaging according to claim 1, is characterized in that: described plated bumps is made up of copper facing bottom, nickel plating intermediate layer and zinc-plated skin.
3. a kind of base plate for packaging according to claim 1, is characterized in that: described infrabasal plate bottom surface circuit is provided with and forms solder terminal by copper facing bottom, nickel plating intermediate layer and zinc-plated skin.
4. the manufacture craft of base plate for packaging as described in any one of claims 1 to 3, is characterized in that described technique includes following steps:
1), choose the substrate of two pieces of BT resin materials, wherein will make upper substrate by one piece of substrate, another block makes infrabasal plate;
2), by two pieces of substrates clean rear sputter titanium and copper respectively, form metal film layer at substrate surface;
3), on two pieces of substrates respectively through on photoresist, photoresistance exposure, photoresistance development and electro-coppering operation, two pieces of substrates are made into corresponding circuit layer respectively;
4), remove photoresist on upper substrate, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by upper substrate after photoresistance development and electroplate, powering at the lower surface circuit layer of upper substrate plates out plated bumps;
5), after two pieces of substrates complete electroplating operations, removal photoresist is placed in etching solution and etches away the metal film layer exposed, and makes the metal film layer of circuit layer and reservation form circuit;
6), on upper substrate, cut out photosensitive through hole, infrabasal plate cuts out size with photosensitive through hole correspondence position and is greater than photosensitive through hole, and the chip receiving hole needing flip-chip can be held;
7), by upper substrate and infrabasal plate pass through glue-line pressing, photosensitive through hole and chip receiving hole form the chip hole of a ledge structure; Described plated bumps is positioned on step surface;
8), to the upper substrate of stitching state and infrabasal plate hole, and hole metallization process is carried out to boring.
5. described technique according to claim 4, it is characterized in that: the 4th) in also include and remove photoresist on infrabasal plate, re-start photoresist, photoresistance exposure, photoresistance development and be placed in successively in copper, nickel, tin electrolysis tank by infrabasal plate after photoresistance development and electroplate, powering at the lower surface circuit layer of infrabasal plate plates out the operation of solder terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510360625.3A CN104979298B (en) | 2015-06-26 | 2015-06-26 | A kind of package substrate and its manufacture craft |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510360625.3A CN104979298B (en) | 2015-06-26 | 2015-06-26 | A kind of package substrate and its manufacture craft |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104979298A true CN104979298A (en) | 2015-10-14 |
| CN104979298B CN104979298B (en) | 2017-11-21 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201510360625.3A Expired - Fee Related CN104979298B (en) | 2015-06-26 | 2015-06-26 | A kind of package substrate and its manufacture craft |
Country Status (1)
| Country | Link |
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| CN (1) | CN104979298B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108315786A (en) * | 2018-01-15 | 2018-07-24 | 江西芯创光电有限公司 | Electro-plating method |
| CN114096078A (en) * | 2021-11-25 | 2022-02-25 | 四川九洲电器集团有限责任公司 | Preparation method of printed board protective cover of device without high temperature resistance, protective cover and application |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050012195A1 (en) * | 2003-07-18 | 2005-01-20 | Jun-Young Go | BGA package with stacked semiconductor chips and method of manufacturing the same |
| CN101295650A (en) * | 2007-04-25 | 2008-10-29 | 矽品精密工业股份有限公司 | Semiconductor device and its manufacturing method |
| CN103165553A (en) * | 2013-02-04 | 2013-06-19 | 日月光半导体制造股份有限公司 | Semiconductor wafer and semiconductor sealing structure |
| CN103260125A (en) * | 2013-04-12 | 2013-08-21 | 日月光半导体制造股份有限公司 | Chip packaging structure and manufacturing method thereof |
| CN204834595U (en) * | 2015-06-26 | 2015-12-02 | 江西芯创光电有限公司 | Package substrate |
-
2015
- 2015-06-26 CN CN201510360625.3A patent/CN104979298B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050012195A1 (en) * | 2003-07-18 | 2005-01-20 | Jun-Young Go | BGA package with stacked semiconductor chips and method of manufacturing the same |
| CN101295650A (en) * | 2007-04-25 | 2008-10-29 | 矽品精密工业股份有限公司 | Semiconductor device and its manufacturing method |
| CN103165553A (en) * | 2013-02-04 | 2013-06-19 | 日月光半导体制造股份有限公司 | Semiconductor wafer and semiconductor sealing structure |
| CN103260125A (en) * | 2013-04-12 | 2013-08-21 | 日月光半导体制造股份有限公司 | Chip packaging structure and manufacturing method thereof |
| CN204834595U (en) * | 2015-06-26 | 2015-12-02 | 江西芯创光电有限公司 | Package substrate |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108315786A (en) * | 2018-01-15 | 2018-07-24 | 江西芯创光电有限公司 | Electro-plating method |
| CN114096078A (en) * | 2021-11-25 | 2022-02-25 | 四川九洲电器集团有限责任公司 | Preparation method of printed board protective cover of device without high temperature resistance, protective cover and application |
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| Publication number | Publication date |
|---|---|
| CN104979298B (en) | 2017-11-21 |
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Granted publication date: 20171121 Termination date: 20200626 |