CN105565258A - Production method of semiconductor devices - Google Patents
Production method of semiconductor devices Download PDFInfo
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- CN105565258A CN105565258A CN201410554811.6A CN201410554811A CN105565258A CN 105565258 A CN105565258 A CN 105565258A CN 201410554811 A CN201410554811 A CN 201410554811A CN 105565258 A CN105565258 A CN 105565258A
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- photoresistance
- gettering layer
- preparation
- patterning
- cineration technics
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Abstract
The invention provides a production method of semiconductor devices. The production method comprises the following steps: providing a base: forming a sucking layer on the base; forming light resistors on the sucking layer, wherein part of the light resistors enter the surface of the sucking layer; performing exposure and development on the light resistors entering the surface of the sucking layer, so as to form patterned light resistors; removing light resistors, exposed on two sides of the patterned light resistor, in the surface of the sucking layer according to a first incineration technology; etching the sucking layer by using the patterned light resistors as masking; removing the patterned light resistors. According to the production method disclosed by the invention, the step of performing the incineration technology on the light resistors, exposed on the two sides of the patterned light resistors, in the surface of the sucking layer is added, so that the barrier effect of the light resistors in the sucking layer on etching is avoided, etching of the sucking layer is well realized, the smooth performing of the technology is guaranteed, and the yield and the performance of the devices are further improved.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to the preparation method in particular to a kind of semiconductor devices.
Background technology
In technical field of semiconductors, some device needs in a desirable vacuum environment could normal work, such as MEMS (Micro-Electro-MechanicalSystems, MEMS).
Vacuum Package is that a kind of seal chamber that adopts provides the encapsulation technology of vacuum environment for MEMS element.It can form a vacuum environment around the MEMS product chips such as radio frequency, inertia, microelectronic vacuum class, MEMS can be made to work under high vacuum environment, and ensure that micro-structural wherein has excellent vibration performance (such as various mechanical resonator has high quality factor), normally can work, and improve its reliability.Vacuum Package based on wafer bonding technique is by with the substrate wafer of micro electromechanical structure and cover plate wafer direct bonding, forms the environment of a vacuum.But due to constantly outgas (outgasing) can be released from device in the manufacturing process of device, formed thus the vacuum of reduction vacuum chamber, affect the quality factor (Q-factor) of device, even cause device cisco unity malfunction.
Current is that metal cladding is as gettering layer on cover plate wafer for the solution that the problems referred to above are the most frequently used, and such as metal Ti, activates Ti and absorb outgas (outgasing) when bonding.The formation process of current gettering layer comprises the following steps: first, as shown in Figure 1A, forms one deck Ti metal on the substrate 100, as gettering layer 101 by electron beam evaporation; Then, as shown in Figure 1B, gettering layer 101 applies photoresistance 102; Then, as shown in Figure 1 C, photoresistance 102 is exposed and develops, to form the photoresistance 102a of patterning; As shown in Fig. 1 D-1E, with the photoresistance 102a of patterning for mask carries out wet etching to gettering layer 101, then remove the photoresistance 102a of patterning.But in this step wet etching process, find that the Ti metallic getter layers adopting electron beam evaporation to be formed is too loose, photoresistance is caused to enter Ti top layer, wet etching is zero to photoresistance etching rate, so Ti cannot be etched, if etched again after removal photoresistance, the patterning to gettering layer cannot be realized.
Therefore, the preparation method proposing a kind of new semiconductor devices is necessary, to solve the problem.
Summary of the invention
In summary of the invention part, introduce the concept of a series of reduced form, this will further describe in detailed description of the invention part.Summary of the invention part of the present invention does not also mean that the key feature and essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection domain attempting to determine technical scheme required for protection.
In order to overcome current Problems existing, the invention provides a kind of preparation method of semiconductor devices, comprising:
Substrate is provided, forms gettering layer on the substrate;
Described gettering layer forms photoresistance, and wherein, the described photoresistance of part enters in described gettering layer surface;
Described photoresistance is exposed and develops, to form the photoresistance of patterning;
The first cineration technics is adopted to remove the photoresistance being positioned at the described gettering layer surface of the photoresistance exposed at both sides of described patterning;
With the photoresistance of described patterning for mask, described gettering layer is etched;
Remove the photoresistance of described patterning.
Further, the reacting gas of described first cineration technics comprises oxygen.
Further, described reacting gas is selected from O
2, O
3, CO, CO
2in one or more.
Further, the range of flow of the reacting gas of described first cineration technics is 50 ~ 5000sccm, and power is 1000 ~ 8000W.
Further, the ashing time of described first cineration technics is 5 ~ 20s.
Further, the material of described gettering layer comprises metal Ti.
Further, electron beam evaporation methods is adopted to form described gettering layer.
Further, after the photoresistance removing described patterning, the step of execution second cineration technics is also comprised.
Further, described preparation method is applicable to MEMS.
In sum, according to preparation method of the present invention, by increasing the step of the photoresistance in the gettering layer surface of the photoresistance exposed at both sides of patterning being carried out to cineration technics, avoid photoresistance in the gettering layer inhibition to etching, good realization is to the etching of gettering layer, ensure carrying out smoothly of technique, and then improve yield and the performance of device.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
The manufacture craft that Figure 1A-1E shows existing gettering layer implements the generalized section of obtained device successively;
Fig. 2 A-2H show the embodiment of the invention successively implementation step obtain the generalized section of device;
Fig. 3 shows the process chart of embodiment of the invention implementation step successively.
Detailed description of the invention
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
Should be understood that, the present invention can implement in different forms, and should not be interpreted as the embodiment that is confined to propose here.On the contrary, provide these embodiments will expose thoroughly with complete, and scope of the present invention is fully passed to those skilled in the art.In the accompanying drawings, in order to clear, the size in Ceng He district and relative size may be exaggerated.Same reference numerals represents identical element from start to finish.
Be understood that, when element or layer be called as " ... on ", " with ... adjacent ", " being connected to " or " being coupled to " other element or layer time, its can directly on other element or layer, with it adjacent, connect or be coupled to other element or layer, or the element that can exist between two parties or layer.On the contrary, when element be called as " directly exist ... on ", " with ... direct neighbor ", " being directly connected to " or " being directly coupled to " other element or layer time, then there is not element between two parties or layer.Although it should be understood that and term first, second, third, etc. can be used to describe various element, parts, district, floor and/or part, these elements, parts, district, floor and/or part should not limited by these terms.These terms be only used for differentiation element, parts, district, floor or part and another element, parts, district, floor or part.Therefore, do not departing under the present invention's instruction, the first element discussed below, parts, district, floor or part can be expressed as the second element, parts, district, floor or part.
Spatial relationship term such as " ... under ", " ... below ", " below ", " ... under ", " ... on ", " above " etc., here can be used thus the relation of the element of shown in description figure or feature and other element or feature for convenience of description.It should be understood that except the orientation shown in figure, spatial relationship term intention also comprises the different orientation of the device in using and operating.Such as, if the device upset in accompanying drawing, then, be described as " below other element " or " under it " or " under it " element or feature will be oriented to other element or feature " on ".Therefore, exemplary term " ... below " and " ... under " upper and lower two orientations can be comprised.Device can additionally orientation (90-degree rotation or other orientation) and as used herein spatial description language correspondingly explained.
The object of term is only to describe specific embodiment and not as restriction of the present invention as used herein.When this uses, " one ", " one " and " described/to be somebody's turn to do " of singulative is also intended to comprise plural form, unless context is known point out other mode.It is also to be understood that term " composition " and/or " comprising ", when using in this specification, determine the existence of described feature, integer, step, operation, element and/or parts, but do not get rid of one or more other feature, integer, step, operation, element, the existence of parts and/or group or interpolation.When this uses, term "and/or" comprises any of relevant Listed Items and all combinations.
In order to thoroughly understand the present invention, by following description, detailed step is proposed, to explain the technical scheme of the present invention's proposition.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other embodiments.
[exemplary embodiment]
Below with reference to Fig. 2 A-2H and Fig. 3, the preparation method of gettering layer of the present invention is described in detail.
First, as shown in Figure 2 A, provide substrate 200, described substrate 200 forms gettering layer 201.
Particularly, described substrate 200 can, for comprising the Semiconductor substrate of silicon materials, also can be other glass or ceramic material.Exemplarily, silicon through hole (not shown) etc. can be also formed with in described substrate 200.When the cover plate of substrate 200 as MEMS, can also form groove in substrate, gettering layer is deposited on the reeded side of substrate tool, and described groove is used for MEMS provides closed cavity.In this case easy, only to illustrate with a blank.
One or more in the material selected among zirconium base of described gettering layer 201 or titanium-base alloy, alternatively, the material of described gettering layer can be metal Ti, but is not limited to this, and other materials with air suction function are all applicable to the present invention.Gettering layer can also be deposited by methods such as electron beam evaporation plating, chemical vapour deposition (CVD), magnetron sputtering or serigraphys.In one example, form metal Ti as gettering layer by electron beam evaporation methods on substrate, thickness is 20 ~ 500 dusts.The outgas (outgasing) that described gettering layer Absorbable rod is released from device.
Then, as shown in Figure 2 B, described gettering layer 201 forms photoresistance 202, wherein, the described photoresistance 202 of part enters in gettering layer 201 surface.
Any method well known to those skilled in the art can be adopted to form photoresistance 202, and such as spin coating or curtain apply.Described photoresistance 202 can be positivity photoresistance or negativity photoresistance.Alternatively, the thickness range of described photoresistance is from about 30000 dusts to about 60000 dusts.
Also can comprise the step of soft baking (SoftBaking) afterwards further, to remove solvent, strengthen the adhesion of photoresistance 202, the stress in release photoresistance, prevents photoresistance contaminated equipment.
Because the Ti metallic getter layers adopting electron beam evaporation to be formed is too loose, photoresistance 202 is caused to enter in gettering layer 201 surface.
Then, as shown in Figure 2 C, described photoresistance 202 exposed and developed, forming the photoresistance 202a of patterning.
Particularly, utilize reticle make segment beam through, be irradiated on photoresistance 202, react with photoresistance 202, thus photoresistance 202 is exposed.Again developer solution is sprayed onto the surface of photoresistance, forms the photoresistance 202a of final patterning.
After photoresistance is exposed and developing, also need to wait for a period of time (Queuetime) just can enter after technological process, the such as stand-by period (Queuetime) is 48h, 72h.The above-mentioned time is only exemplarily, specifically needs to adjust according to actual process.And at waiting time, the photoresistance 202 of patterning also can further diffuse in the gettering layer 201 below it, as shown in Figure 2 D.
Then, as shown in Figure 2 E, the first cineration technics is adopted to remove the photoresistance being positioned at gettering layer 201 surface of the photoresistance 202a exposed at both sides of patterning.
Particularly, the reacting gas of described first cineration technics comprises oxygen, such as O
2, O
3, CO, CO
2deng the one in gas, or its composition.Exemplarily, take oxygen as reacting gas, the range of flow of oxygen is 50 ~ 5000sccm, and power is 1000 ~ 8000W.
Because the thickness of the photoresistance in gettering layer surface and quality are significantly less than thickness and the quality of the photoresistance 202a of patterning, therefore in this step, control the parameters such as ashing time, power, flow, such as, carry out the cineration technics of short time or reduce the power etc. of cineration technics.Exemplarily, the ashing time carrying out first cineration technics of short time is 5 ~ 20s.As long as ensure to remove the photoresistance being positioned at gettering layer 201 surface of the photoresistance 202a exposed at both sides of patterning, can't have a negative impact to the photoresistance 202a of patterning.
Then, as shown in Figure 2 F, with the photoresistance 202a of patterning for mask, described gettering layer 201 is etched.
Particularly, described etching both can select dry etching also can adopt wet etching.Dry etching can adopt the anisotropic etching method based on carbon fluoride gas.Wet etching can adopt hydrofluoric acid solution, such as hydrofluoric acid cushioning liquid (buffersolutionofhydrofluoricacid (BHF)) or buffered oxide etch agent (bufferoxideetchant (BOE)).In this enforcement, wet method lithography is preferably adopted to etch described gettering layer 201.
Due in previous process steps, the photoresistance ashing in the gettering layer surface exposed is removed, therefore in this step, well can realize the etching to gettering layer.
Then, as shown in Figure 2 G, the photoresistance 202a of patterning is removed.Any applicable method well known to those skilled in the art can be adopted to remove the photoresistance 202a of patterning, such as cineration technics etc.
Because part photoresistance diffuses in gettering layer 201, the photoresistance in gettering layer 201 surface may be removed by single this step removal technique that adopts completely.
Then, as illustrated in figure 2h, the second cineration technics is carried out, to remove remaining photoresistance in gettering layer 201 surface completely.
Particularly can according to the thickness of remaining photoresistance and quality, the reaction gas flow of the second cineration technics, the parameter such as ashing time or power are adjusted.The process conditions identical or close with the first cineration technics can also be adopted, do not do concrete restriction at this.
So far complete the manufacture craft to gettering layer, said method is applicable to the making of MEMS or other need form the making of the device of gettering layer.Afterwards, also can comprise wafer bonding to activate the steps such as the air suction function of gettering layer for MEMS, therefore not to repeat here.
In sum, according to preparation method of the present invention, by increasing the step of the photoresistance in the gettering layer surface of the photoresistance exposed at both sides of patterning being carried out to cineration technics, avoid photoresistance in the gettering layer inhibition to etching, good realization is to the etching of gettering layer, ensure carrying out smoothly of technique, and then improve yield and the performance of device.
With reference to Fig. 3, illustrated therein is the flow chart of the step implemented successively according to the method for the embodiment of the present invention, for schematically illustrating the flow process of whole manufacturing process.
In step 301, provide substrate, form gettering layer on the substrate;
In step 302, described gettering layer forms photoresistance, wherein, the described photoresistance of part enters in described gettering layer surface;
In step 303, described photoresistance is exposed and develops, to form the photoresistance of patterning;
In step 304, the first cineration technics is adopted to remove the photoresistance being positioned at the described gettering layer surface of the photoresistance exposed at both sides of described patterning;
In step 305, with the photoresistance of described patterning for mask, described gettering layer is etched;
Within step 306, the photoresistance of described patterning is removed.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (9)
1. a preparation method for semiconductor devices, comprising:
Substrate is provided, forms gettering layer on the substrate;
Described gettering layer forms photoresistance, and wherein, the described photoresistance of part enters in described gettering layer surface;
Described photoresistance is exposed and develops, to form the photoresistance of patterning;
The first cineration technics is adopted to remove the photoresistance being positioned at the described gettering layer surface of the photoresistance exposed at both sides of described patterning;
With the photoresistance of described patterning for mask, described gettering layer is etched;
Remove the photoresistance of described patterning.
2. preparation method according to claim 1, is characterized in that, the reacting gas of described first cineration technics comprises oxygen.
3. preparation method according to claim 2, is characterized in that, described reacting gas is selected from O
2, O
3, CO, CO
2in one or more.
4. preparation method according to claim 1, is characterized in that, the range of flow of the reacting gas of described first cineration technics is 50 ~ 5000sccm, and power is 1000 ~ 8000W.
5. preparation method according to claim 1, is characterized in that, the ashing time of described first cineration technics is 5 ~ 20s.
6. preparation method according to claim 1, is characterized in that, the material of described gettering layer comprises metal Ti.
7. preparation method according to claim 1, is characterized in that, adopts electron beam evaporation methods to form described gettering layer.
8. preparation method according to claim 1, is characterized in that, after the photoresistance removing described patterning, also comprises the step of execution second cineration technics.
9. preparation method according to claim 1, is characterized in that, described preparation method is applicable to MEMS.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112625614A (en) * | 2020-12-10 | 2021-04-09 | 业成科技（成都）有限公司 | Conductive structure, preparation method thereof and touch display device |
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