CN1072400C - Method for mfg. low current leakage electrode made of low tension chemical vapour deposition titanium oxide film - Google Patents
Method for mfg. low current leakage electrode made of low tension chemical vapour deposition titanium oxide film Download PDFInfo
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- CN1072400C CN1072400C CN96121899A CN96121899A CN1072400C CN 1072400 C CN1072400 C CN 1072400C CN 96121899 A CN96121899 A CN 96121899A CN 96121899 A CN96121899 A CN 96121899A CN 1072400 C CN1072400 C CN 1072400C
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- tio
- film
- annealing
- top electrode
- titanium oxide
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Abstract
The present invention relates to a method for manufacturing an electrode with a low current leakage property of a capacitor dielectric medium of a semiconductor storage device, which comprises the following steps: firstly, depositing a layer of thin film made of titanium oxide on a semiconductor silicon substrate; secondly, applying annealing treatment to the thin film made of titanium oxide deposited on the silicon substrate; thirdly, depositing a layer of top electrode layer on the thin film made of titanium oxide; finally, executing a second annealing technology for lowering the leakage current of the made storage capacitor.
Description
Present invention relates in general to a kind of method of making capacitor,, particularly relate to the method for the capacitor of making the high-density semiconductor storage device memory cell.More particularly, the present invention relates to can be under the low pressure condition, the method for the electrode of the storage dielectric of making high-density semiconductor storage device in a cold wall reactor, and it has good electric capacity and leakage current characteristic.
Highdensity semiconductor storage unit, particularly dynamic random access memory (DRAM), just being entered in 1,000,000,000 bits (giga-bit) by development is among the storage density field of unit.Now density in megabit memory device technology category in employed dielectric storage medium still can't break through the density of about 256M storage component part.This mainly is because the quantity of electric charge that can keep in its memory cell, because of inevitable leakage phenomenon before needs charge, can't continue the rational time.
In the art, be considered and select for use among the storage medium material of conduct 1,000,000,000 bit storage device of future generation, titanyl compound is such as titanium dioxide (TiO
2), because its own high-dielectric constant (permittivity) and good scalariform cover (step coverage) characteristic, seemingly a kind of suitable material.But, when using this class to have high dielectric constant materials as the storage medium material of memory cell utilizing present manufacture craft, the character of its high leakage current has but constituted the very big problem in the practicality.Up to now, do not notice how can avoid or lower TiO in the art
2High leakage problem, and make TiO
2Can't be used storage dielectric material as semiconductor storage unit.
Main purpose of the present invention is to provide a kind of method of making capacitor, to form the capacitor dielectric electrode with low leakage characteristic of semiconductor storage unit.
Another object of the present invention is to provide a kind of method of making capacitor, so that semiconductor storage unit has low leakage characteristic under the environment under low pressure state.
Another purpose of the present invention is to provide a kind of method of making capacitor, so that semiconductor storage unit has low cost and has low leakage characteristic.
For reaching this purpose, according to the invention provides a kind of method of making capacitor, the step of this method comprises: at first deposit one deck thin film of titanium oxide on the semiconductor silicon base; Then again the thin film of titanium oxide that is deposited on the silicon base is carried out annealing in process; On thin film of titanium oxide, deposit one deck top electrode layer afterwards again; Carry out one time second annealing process at last, lowered with the leakage current of the storage capacitance that will be made into.
Other purpose of the present invention and characteristics are by can be clearer below in conjunction with the accompanying drawing description of a preferred embodiment.In the accompanying drawing:
Figure la-lc represents that respectively according to a preferred embodiment of the present invention method makes the schematic cross-section of the selected step of the storage dielectric layer of memory device and top electrode thereof;
Fig. 2 represents to have the CVD-TiO of various electrode materials
2The leakage current characteristic of electric capacity before carrying out annealing in process;
Before Fig. 3 is illustrated in and carries out annealing in process, the CVD-TiO of various electrode materials
2The V of electric capacity
Crit, the relation between work function and electrode material;
The CVD-TiO of various electrode materials in Fig. 4 presentation graphs 2
2The leakage current characteristic of electric capacity after carrying out annealing in process; And
Fig. 5 represents that doing electrode annealing back with tungsten nitride makes tungsten nitride and CVD-TiO with auger electrons
2Result behind the analysis of components of interface.
For the capacitor dielectric electrode with low leakage characteristic of semiconductor storage unit is provided, method for semiconductor manufacturing of the present invention will be illustrated in the preferred embodiment that be exemplified below.Notice that the semiconductor cross section structure yardstick among the figure la-lc does not have accurate ratio, it is used for illustrating in a schematic way manufacture method of the present invention.Step l
Preparation semiconductor silicon base is for utilizing TiO
2Film as the memory cell capacitor dielectric layer of high-density memory device.
As shown in Figure 1a, substrate 10 can for, for example, n+ type silicon (Si) substrate, or the polysilicon of a n+ type (poly-Si) substrate, this silicon wafer can be used as the basal electrode of the memory cell capacitor of memory device to be made.Step 2
Deposition one deck TiO on silicon base
2Film.
As shown among Fig. 1 b, thickness is about 10 to 20nm TiO
2Thin film 12, can utilize in, at tetra isopropyl titanizing thing (TPT, tetra-isopropyl titanate, Ti (i-OC such as a low-pressure chemical vapor deposition (LPCVD, low pressure chemical vapordeposition) reactor
3H
7)
4) with the mixed-gas environment of oxygen in, be formed on the silicon base 10 in about 350 ℃ temperature deposit.Step 3
To the TiO that is deposited on the silicon base
2Film carries out annealing in process.
To the TiO that deposits on the silicon base
2The annealing treating process that film 12 is carried out can with about 800 ℃ temperature, continue to carry out about 30 minutes in the environment of dried oxygen.Step 4
At TiO
2Deposition one deck top electrode layer on the film.
The top electrode layer of capacitor dielectric layer, that is shown top electrode layer 14 can be utilized the method such as reactive sputtering or electron beam among Fig. 1 c, and is deposited on TiO
2On the thin layer 12.The material that is used to deposit top electrode layer 14 can comprise multiple metal and metal nitride.For example, such as the metal of tungsten (W) and molybdenum (Mo) etc., and such as tungsten nitride (WN), but the metal nitride of titanium nitride (TiN) and tantalum nitride (TaN) etc., all can be used as the material of top electrode layer.Step 5
Carry out one time annealing process.
Then the stage is carried on annealing process of silicon base 10 lip-deep entire semiconductor device execution to this again.This annealing process can be at N
2Gaseous environment in, under about 450 ℃ temperature, continue to carry out about 30 minutes kinds.
Above-mentioned steps has roughly constituted the present invention and has made the high storage density semiconductor storage unit, the manufacture method of the low-leakage current electrode of the LPCVD thin film of titanium oxide storage dielectric material of its memory cell capacitor.After showing that top electrode layer 14 depositions described in the abovementioned steps 4 form, the annealing treating process that entire semiconductor device is carried out the effect that can produce, deposit the multiple device example of multiple previous materials top electrode layer 14, at N
2Environment under about 450 ℃ temperature, carry out about 30 minutes kinds of annealing in process.
Show to have multiple different electrode material among Fig. 2, with TiO
2As the plate electrode memory cell capacitor that stores dielectric layer, the leakage current characteristic before its annealing in process in accepting abovementioned steps 5.As shown in Figure 2, the electrode of these semiconductor device samples comprises and utilizes W, Mo, TiN, WN, and the electrode of material made such as TaN.All be applied in the negative value bias voltage on the top electrode of these sample electric capacity.Before carrying out annealing treating process, have the leakage current of these electric capacity of metal nitride top electrode, littler than leakage current as shown in the figure with metal roof electrode, wherein especially with TaN electrode leakage current minimum.The reason of measuring leakage current with back bias voltage is that electronics is to penetrate (injection) from top electrode when back bias voltage, at this moment just can verify the influence of electrode material to leakage current.
For the influence of material on leakage current of verifying electrode, shown various different electrode materials among Fig. 3 before annealing is carried out, it produces 1 μ A/cm
2The voltage V of leakage current
CritFunction curve with respect to the function phi m of electrode.Before annealing in process, TaN, TiN, WN, the work function φ m of W and Mo are respectively about 5.41,4.95,5.00,4.75 and 4.64 etc., as shown in FIG..What can find is, before carrying out annealing in process, and in most electrode material, V
CritIncrease with φ m increases.
In other words, leakage current can be along with the increase of the work function φ m of electrode and is lowered, so the leakage current of TaN is minimum.These results show that applying under the situation of back bias voltage, the mechanism of its conducting belongs to a kind of electrode restricted type (electrodc limited type), at top electrode and TiO
2The barrier height of the electronics of bed boundary part has limited the size of leakage current.Be presented among Fig. 4 and top electrode applied under the situation of back bias voltage the characteristic of leakage current after handling with 450 ℃ of annealing temperatures.Compare with aforementioned situation without annealing in process, various electrode materials are preceding far different with annealing to the difference of relevant leakage current, at this moment the top electrode work function reduces the influence of leakage current, and by contrast, the electric capacity with WN top electrode then represents lower leakage current.Reason be WN material thermal stability than TaN height, more can be high temperature resistant and do not decompose, thus through after 450 ℃ of annealing in process, WN top electrode and following TiO
2There are not interreaction or phase counterdiffusion, so leakage current is lower.This point can be confirmed by Fig. 5.Fig. 5 is auger analysis figure, clearly shows WN and TiO
2After 450 ℃ of heat treatments, still be kept perfectly.
To aforementioned TiO
2The electric capacity test result of samples shows that the work function of top electrode material has determined TiO
2The electrical characteristic of electric capacity before carrying out annealing treating process, and have the material of work function value greatly, for example TaN has lower leakage current.But, after carrying out about 450 ℃ annealing in process, TiO
2Just the difference between the work function of various different electrode materials is reduced with the effect between the top electrode, this moment, the thermal stability (thermal stability) of electrode material then became even more important, so the WN electrode has lower leakage current.
Above-mentioned explanation shows that method of the present invention is at TiO
2The annealing process that carried out after forming of top electrode, can make the leakage current characteristic of the top electrode of various metals and metal nitride materials stablize sameization.In addition, the technology of its leakage current is also further attenuating after this annealing process is handled, thereby, a kind of manufacture method with capacitor dielectric electrode of low leakage characteristic of semiconductor storage unit is provided.
Though disclose a preferred embodiment of the present invention; but it is not in order to limit the present invention; those skilled in the art; without departing from the spirit and scope of the present invention; can make some and change and improvement, so protection scope of the present invention should be limited by appended claim and equivalent thereof.
Claims (29)
1, a kind of method of making capacitor, this method may further comprise the steps:
Preparation semiconductor silicon base;
The thin film of deposition titanium oxide on this silicon base;
This thin film of titanium oxide that is deposited on the silicon base is carried out annealing in process;
Deposition one deck top electrode layer on this thin film of titanium oxide; With
Carry out one second annealing process.
2, the method for claim 1, wherein this semiconductor silicon substrate is a n+ type silicon base, or is a n+ type polysilicon substrate.
3, the method for claim 1, wherein this thin film of titanium oxide is TiO
2Film.
4, method as claimed in claim 3, wherein, this TiO
2Film has about thickness of 10 to 20nm.
5, method as claimed in claim 4, wherein, this TiO
2Film forms in a cold wall pressure chemical vapor deposition reactor.
6, method as claimed in claim 5, wherein, this TiO
2Film is to deposit to form among the mixed-gas environment of tetra isopropyl titanizing thing and oxygen.
7, method as claimed in claim 6, wherein, this TiO
2Film is to form in about 350 ℃ temperature deposit.
8, method as claimed in claim 3, wherein, this TiO
2The annealing in process of film is at dried O
2Carry out among the gas.
9, method as claimed in claim 8, wherein, this TiO
2The annealing in process of film is to carry out under about 800 ℃ temperature.
10, method as claimed in claim 9, wherein, this TiO
2The annealing in process of film continued to carry out about 30 minutes.
11, method as claimed in claim 3, wherein, this top electrode layer is to utilize reactive sputtering and be deposited on this TiO
2On the film.
12, method as claimed in claim 3, wherein, this top electrode layer is to utilize electronic beam method and be deposited on this TiO
2On the film.
13, method as claimed in claim 3, wherein, this top electrode layer is to utilize reactive sputtering, is deposited on this TiO with metal material
2On the film.
14, method as claimed in claim 13, wherein, this metal material is a tungsten.
15, method as claimed in claim 13, wherein, this metal material is a molybdenum.
16, method as claimed in claim 3, wherein, this top electrode layer is to utilize reactive sputtering, is deposited on this TiO with metal nitride materials
2On the film.
17, method as claimed in claim 16, wherein, this metal nitride materials is a tungsten nitride.
18, method as claimed in claim 16, wherein, this metal nitride materials is a titanium nitride.
19, method as claimed in claim 16, wherein, this metal nitride materials is a tantalum nitride.
20, method as claimed in claim 3, wherein, this top electrode layer is to utilize electronic beam method, is deposited on this TiO with metal material
2On the film.
21, method as claimed in claim 20, wherein, this metal material is a tungsten.
22, method as claimed in claim 20, wherein, this metal material is a molybdenum.
23, method as claimed in claim 3, wherein, this top electrode layer is to utilize electronic beam method, is deposited on this TiO with metal nitride materials
2On the film.
24, method as claimed in claim 23, wherein, this metal nitride materials is a tungsten nitride.
25, method as claimed in claim 23, wherein, this metal nitride materials is a titanium nitride.
26, method as claimed in claim 23, wherein, this metal nitride materials is a tantalum nitride.
27, the method for claim 1, wherein this second annealing process is at N
2Gaseous environment in carry out.
28, method as claimed in claim 27, wherein, this second annealing process is to carry out under about 450 ℃ temperature.
29, method as claimed in claim 27, wherein, this second annealing process continued to carry out about 30 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96121899A CN1072400C (en) | 1996-12-10 | 1996-12-10 | Method for mfg. low current leakage electrode made of low tension chemical vapour deposition titanium oxide film |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96121899A CN1072400C (en) | 1996-12-10 | 1996-12-10 | Method for mfg. low current leakage electrode made of low tension chemical vapour deposition titanium oxide film |
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| Publication Number | Publication Date |
|---|---|
| CN1185024A CN1185024A (en) | 1998-06-17 |
| CN1072400C true CN1072400C (en) | 2001-10-03 |
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|---|---|---|---|
| CN96121899A Expired - Fee Related CN1072400C (en) | 1996-12-10 | 1996-12-10 | Method for mfg. low current leakage electrode made of low tension chemical vapour deposition titanium oxide film |
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| CN103400765B (en) * | 2013-07-05 | 2016-12-28 | 昆山龙腾光电有限公司 | The manufacture method of oxide thin film transistor |
| TW201733558A (en) | 2016-01-06 | 2017-10-01 | 賽諾菲阿凡提斯德意志有限公司 | Medicament container and method for producing same |
| TW201735960A (en) | 2016-02-09 | 2017-10-16 | 賽諾菲阿凡提斯德意志有限公司 | Two-chamber carpule |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4521446A (en) * | 1982-02-01 | 1985-06-04 | Texas Instruments Incorporated | Method for depositing polysilicon over TiO2 |
| US5338951A (en) * | 1991-11-06 | 1994-08-16 | Ramtron International Corporation | Structure of high dielectric constant metal/dielectric/semiconductor capacitor for use as the storage capacitor in memory devices |
-
1996
- 1996-12-10 CN CN96121899A patent/CN1072400C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4521446A (en) * | 1982-02-01 | 1985-06-04 | Texas Instruments Incorporated | Method for depositing polysilicon over TiO2 |
| US5338951A (en) * | 1991-11-06 | 1994-08-16 | Ramtron International Corporation | Structure of high dielectric constant metal/dielectric/semiconductor capacitor for use as the storage capacitor in memory devices |
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| Publication number | Publication date |
|---|---|
| CN1185024A (en) | 1998-06-17 |
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