CN1072805C - 具有改善的数据装入的空间光调制器及其数据装入的方法 - Google Patents

具有改善的数据装入的空间光调制器及其数据装入的方法 Download PDF

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CN1072805C
CN1072805C CN95108041A CN95108041A CN1072805C CN 1072805 C CN1072805 C CN 1072805C CN 95108041 A CN95108041 A CN 95108041A CN 95108041 A CN95108041 A CN 95108041A CN 1072805 C CN1072805 C CN 1072805C
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保罗·M·厄贝纳斯
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3433—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices
    • G09G3/346—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using light modulating elements actuated by an electric field and being other than liquid crystal devices and electrochromic devices based on modulation of the reflection angle, e.g. micromirrors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0857—Static memory circuit, e.g. flip-flop
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/061—Details of flat display driving waveforms for resetting or blanking
    • G—PHYSICS
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals

Abstract

本发明揭示一种具有适合多重存储器结构的空间光调制器。该调制器包括一个独立可控制的像素阵列，其中把预先确定个数的像素分配给存储器单元。存储器单元接收来自输入总线的数据。传送它的数据到第二存储器和驱动电路。由第二个信号，像素响应在驱动电路上的数据。当数据的显示时间小于存储单元的装入时间时，第二存储器置位，使像素变黑，而另一个控制信号使像素响应于存储器。用这种方法，能使装入时间变长且使数据率保持相对地低。

Description

具有改善的数据装入的空间光 调制器及其数据装入的方法
本发明涉及空间光调制器，特别涉及到支持空间光调制器阵列的存储器方案。
空间光调制器的一种形式是由独立可寻址元件阵列组成，例如液晶显示板或数字微镜器件。调制器阵列的这些例子有许多用途，例如打印机、显示器和光学处理。本讨论将集中于显示系统。
在某些应用中，这些阵列以二进制模式工作，其中每个独立的元件接收一个ON(通)或OFF(断)信号。典型地，阵列的这些接收ON信号的元件或像素构成了观察者从屏幕或通过光学装置接收图像或直接来自屏幕或通过光学装置的图像。
为独立寻址每个像素，每个调制器阵列必须有允许信号到达每个像素的电路并使它以一定的方式作出响应。一种方法是每个像素需要一个存储器单元，该存储器单元接收像素下一个状态的信息，该信息起源于用于产生显示图像的方案。
一种称为脉冲宽度调制的图像生成技术是在一个图帧时间内反复对每个像素切换ON和OFF。这种方法通过在一帧中像素ON的次数或传送到最终图像的光来控制每个给定像素的强度。在数字上，通过使用带权重的数据位达到灰度级。
例如，为达到16个灰度级，每个像素在一帧的时间间隔内接收4位数据。帧时间分成1-15的15个时间片。最高位(MSB)接收8个时间片用于显示其数据。次高位接收4个时间片，等等。存在允许把这些时间片以非连接段方式分配到数据位的技术。例如，MSB可在某一时刻显示2个时间片，然后在其它时刻显示另外6个时间片，或者再进一步划分。作为用DMD的这种方法详细描述的一个例子，是在美国专利5278652，“用于脉冲宽度调制显示系统的DMD结构和定时”中。
前述技术需要保存被显示数据和在适当的时刻将其送到像素的存储器。一种方法是每个像素使用一个存储单元。存储单元接收像素数据，像素得到允许对锁存于其新状态的新数据起作用的控制信号。同时，存储单元接收像素下一个状态的数据。当有像素传送信号时，像素就对其新的数据起作用。
前述方法集中在某一时刻接收像素传送信号的整个阵列。然而，技术允许任一像素通过其自身接收传送信号的技术是存在的。这允许用很低的数据率对系统作更有效的管理。在美国专利申请08/002627号，”空间光调制器的像素控制电路”中讨论了这一方法。
通常称为分裂复位的这种特殊技术，每个像素使用少于一个存储器单元，而每个存储单元的像素个数称为“扇出”。这种结构更准确地称为多重存储器结构。存储器单元接收一组像素的数据，而不是仅仅一个像素。为使峰值数据率最接近地与平均数据率匹配，扇出由下式算出：扇出max=(2n-1)/n，其中n=强度的位数。因而，如果强度是4位，那么扇出是24-1(或15)除以4，等于3.75个像素。因为不可能有小于1的像素，所以每个存储器单元有4个像素。
前述方法的一个问题是强度级的个数与每个存储器单元的像素个数相连系。每个存储器单元的像素个数必须在器件制造前确定。对于不同的强度位数用带有设定扇出的器件增加了数据率，这将抵消使用多重存储器结构的主要优点。
因此，如果强度级数不同，则为了保持系统的费用下降，需要制造不同的器件。为此，需要有一种方法使多重存储器结构方案更具适应性而消除特殊地制造器件的需要。
本发明的一个方面是带有独立可寻址像素阵列的空间光调制器。每个像素可以响应于传送到它的相应的一个信号而被置位和复位。一个像素是由一个反射或传输作用区域和驱动电路组成。信号通过存储器单元传送到像素，且从任一存储单元接收到的像素多于一个。与一存储器单元相连系的像素个数在器件制造前确定且依赖于强度的位数。
本发明的一个方面是对若干应用，允许用一按每存储器单元在设定个数的像素制造的器件，同时使峰值数据率的增加降至最小。相同的器件能用于这样两个系统，其中每个系统使用不同的强度位数，而与该器件的固定扇出无关。
为更充分地理解本发明及其优点，下面参照附图进行详细说明。
图1是表示多重存储器结构存储单元及其分配到的像素元素一例的方框图。
图2表示带有屏蔽单元的多重存储器结构存储单元及其分配到的像素元素一例的方框图。
图3表示带有屏蔽单元的多重存储器结构存储单元及其分配到的像素元素的定时图。
二进制空间光调制器是带有独立可寻址像素阵列的调制器，像素具有ON和OFF状态。液晶显示器(LCD)、数字微镜器件(DMD)和驱动镜阵列(AMA)是其例子。对二进制空间光调制器的寻址的方法之一是脉冲宽度调制(PWM)。进入的视频数据流，如果需要的话，进行数字化，然后送到某种类型的存储器。存储器通过视帧储存数据流。对于阵列中一个给定的像素具有在视帧中为该像素特别设定的数据。数据组的大小依赖于系统使用的强度的位数。如果系统用8位强度，那么对每个像素有8位数据。
给每一位以一个二进制权重而达到灰度级。例如，对一个8位系统，有256个灰度级，其中的255个级是非零的。为使PWM达到256个灰度级，把帧时间分成255个时间片，最高位(MSB)接收128个时间片用于其显示。显示时间是指当受照明时像素对给定的数据位起作用的时间。有效位的数据可使一个像素在ON位置而另一个在OFF位置。像素是ON位置还是OFF位置，依赖于它们的驱动电路上的数据。对于DMD和LCD，驱动电路通常至少包括一个电极。对于AMA，驱动电路典型地包括压电晶体。此外，能用可充放电的电容。
接下来，次高位(Next MSB)接收64个时间片，继续下去直到最低位(LSB)接收1个时间片。有许多装入和显示数据的方法，这些方法在前述专利，即美国专利5278652，“用于脉冲宽度调制显示系统的DMD结构和定时”中做了描述，该专利包括于此作为参考。
在前述类型的方案中，装入时间必须等于1个时间片。因为LSB仅接收1个时间片，通常称这些时间片为LSB时间。在像素接收到数据后，它们适当个的LSB时间内被锁存在其位置上。这允许下一数据位被装入配属于每个像素的存储器单元。如果PWM方案很简单，且每一位按一帧中从MSB到LSB的顺序装入，则下一帧的MSB必须在先前帧的LSB显示时间内装入。所以，装入时间必须等于LSB时间。
这导致极高的数据率(burst data rate)。如果阵列是2048×1152，那么在1个LSB时间要装入2359296个像素。LSB时间能用下式计算： LSB = 1 F * 1 R * 1 2 I - 1
其中，R等于每秒30帧的帧时间，R是每帧的彩色数，而I是强度的整数位数(对于256级系统，I=8)。
每帧的彩色数据依赖于系统结构。如果系统有一个空间光调制器，对于金色系统，它需要有色滤光器或者与对调制器照明着色相等效的东西。所以，每帧必须有3彩色，这要求前述讨论的PWM方案每帧进行3次，每次用于一个彩色。LSB时间是(1/30)*(1/3)*(1/255)=43.5μS。2359296个像素必须装入。另一种结构有3个空间光调制器，每一个对应于某一种彩色，使每一种器件的每一帧彩色数减少到1。这样就有130.5μS的帧时间。
数据率用下式计算：
Figure C9510804100081
其中，R是行数，C是列数。前述系统的数据率是(2048*1152)/43.5μS或每秒54.2兆位。
为降低数据率可作调整，例如对每一列用二个列驱动器，使数据率减少一半。如果所用器件有128个输入脚，可把这些列加以组合以使用移位寄存器，根据每个移位寄存器的宽度，能进一步减少数据率。多重存储器结构的优点之一是它减少了在一个LSB时间内装入的存储器单元数，因此显著地降低了峰值数据率。
然而，使用多重存储器结构的最大缺点在于
其中，n是强度的位数，扇出是在制造前为使输入数据率低而对每一个器件设定的。用图1表示多重存储器结构的一个例子，存储单元是10，它对应的像素元件是12a,12b,12c和12d。所示的实施例是对扇出是4(一个4位系统)而言的，其中扇出是每个存储器单元的像素数。为了把已设定扇出的器件用于具有不同强度级的其它应用，增加了峰值数据率。这个增加由新的级的扇出除以器件的扇出乘以当器件把适当的强度级用于其扇出时器件的数据率。
例如，具有10.9MHz和11个扇出(64个强度级的扇出是10.5，四舍五入)的一块芯片，能用于要求256个强度级的系统。具有256个强度级(255加上OFF状态)的器件的最优扇出是28-1或255，除以8，等于31。新数据率是31(新扇出)/11(旧扇出)乘以10.9MHz等于30.7MHz。观察下表中的其它计算，易于明白为什么使用已设定扇出的器件对于其它应用是无法实现的。
           表一：具有非最优扇出的器件的数据率
位数 最优扇出 最优扇出数据率     新数据率(扇出=11)
    8     (255-1)/8=31     27.3MHz     76.9MHz
    9     (512-1)/9=57     30.3MHz     157.0MHz
   10    (1024-1)/10=102     33.3MHz     308.8MHz
器件的扇出=11(64个强度级)
新数据率=(最优扇出/器件扇出)×最优扇出数据率
1空间光调制器2048×1152有180Hz输入率
128输入脚
然而，在存储器单元和配属给的像素间采用额外的电路，就有可能在不显著增加数据率的情况下，使已设定扇出的器件可用于新的应用。图3所示的是其中一例，参看图3a定时图就很容易理解。
在图2中，数据输入总线14传送第1位数据(它是与是LSB相邻的一位)到基本存储器单元或数据锁存器16，它表示在定时图图3a的第一行。当第1位装入所有相应的存储单元后，有二个控制信号产生。第一个控制信号表示在图3a的第二行，是屏蔽传送信号(22)，它从基本存储器单元传送数据到第二或屏蔽存储器单元(18)。为了说明，这里假设是数据锁存器，但也能是任何能够包括存储和清除数据的电路。它也传送数据到电极或其它像素20a-20k(对于11个扇出)的电路。电极状态表示在图3a的第三行。第二个控制信号是像素传送信号，它表示在图3a的第四行。像素然后调整以响应于像素传送信号来显示第1位数据，表示在图3a的第四行。处理传送信号顺序的流程图和由虚线围住范围的数据运动表示在图3b中。
对于第0位(它是LSB)重复相同的过程。但是，屏幕存储器被分别用信号(24)从第二存储器清零，表示在图3a的第六行。当施加像素传送信号时，它使像素成为OFF状态。在这种情况下，屏蔽清零和像素传送信号的定时是这样的，即第0位的显示时间是第1位显示时间的一半。流程图的这部分是表示在图3C的虚线围住的部分的定时图。
通过在LSB的显示时间对第二存储器清零，给器件的装入时间比LSB的显示时间要多。第0位为清零位，它表示它的显示时间少于装入时间。例如，如果位0(在它通常的显示时间后LSB被清零)和下一个屏蔽传送信号对另一个LSB时间没有来到，则器件的装入时间有效地增加了一倍。不必在一帧的1/255中装入器件，而能在一帧的1/128中装入器件。
通过不同地识别位数，这个过程得到多重存储器结构。代替强度的n位，现在有二类位：I位，是装入时间小于等于它们显示时间的整数位；C位是清零位。扇出的计算变成：这降低了在表1中，器件不用最优扇出计算新数据率时的数据率。下表显示了系统的强度位数和有效位。
                表二：使用清零位器件的数据率
位数 有效位 最优扇出 最优扇出数据率   新数据率(扇出=11)
  8    8    31   27.3MHz   76.9MHz
 7+1    8    16   26.5MHz   38.6MHz
  9    9    56   30.3MHz  154.3MHz
 7+2    9    14   30.5MHz   38.8MHz
 8+1    9    28   30.3MHz   77.1MHz
 10    10   102   33.3MHz  308.8MHz
 8+2   10    25   34.0MHz   77.3MHz
 8+5  10+1    20   43.3MHz   78.7MHz
 9+3  10+1    42   40.5MHz  154.6MHz
器件的扇出=11
新数据率=(最优扇出/器件扇出)×最优扇出数据率
1空间光调制器2048×1152
128数据脚
由上可见，对于8个和9个有效位，用一个清零位能有效地减低一半数据率。使用第二个清零位又能使数据率减低一半。应该指出，如果器件有16个扇出，则用1个清零位的8个有效位将与用8位强度制造的器件有相同的数据率。对于7个整位和1个清零位的最优扇出是27-1+1(或128)，除以8，即等于16。此外，如果器件有14个扇出，则用7个整位和2个清零位与用9位扇出制造的器件有相同的数据率。
采用降低了的存储器要求和多重存储器结构数据率关系的能力，能降低系统的费用且允许高速操作。此外，用多重存储器结构使平均数据率接近或等于峰值数据率，因而，不需要昂贵的高速处理器。但是，多重存储器结构的局限在于其扇出要联系到一定强度位数。
如前所述，当存储器需要加倍使用额外的存储器单元，与前述的装入方案相连系，它允许对于需要不同强度级的应用使用带有已设定扇出的器件。加倍对存储器的要求不是个大问题，因为多重存储器结构使每个像素一个存储单元的存储器要求减少到原来的1/4。所以，即使增加存储器要求，器件与在每个像素一个存储单元的系统中那样同样良好。
这样，虽然前述这些适用于多重存储器结构空间光调制器的特殊实施例，然而，除下述权利要求外，这种特殊的参考并不意味着对本发明范围的限制。

Claims (8)

1．一种具有改善的数据装入的空间光调制器，其特征在于，该调制器包括：一个独立可寻址的像素阵列，每个像素由一个接收输入光的作用区域和驱动电路组成，由该驱动电路接收数据，所述数据引起所述作用区域改变所述输入光；与所述像素电连接的存储器单元，对每一个存储器单元至少有二个单独的像素与其连结；在所述存储器单元和所述像素间的附加电路，使所述附加电路接收来自所述附加电路前的存储器单元的数据并且允许所述存储器单元接收新数据，其中所述附加电路能接收独立控制信号。
2．如权利要求1所述的调制器，其特征在于所述像素是数字式镜器件。
3．如权利要求1所述的调制器，其特征在于所述像素是液晶单元。
4．如权利要求1所述的调制器，其特征在于所述像素是驱动镜阵列。
5．如权利要求1所述的调制器，其特征在于所述驱动电路至少有一个电极。
6．如权利要求1所述的调制器，其特征在于所述驱动电路至少有一个电容。
7．如权利要求1所述的调制器，其特征在于所述附加电路是一个数据锁存器。
8．一种改善空间光调制器数据装入的方法，其特征在于，该方法包括：送第一数据信号到一个存储器单元阵列，其中每个所述存储单元至少配有所述空间光调制器的二个单独的独立可寻址的像素；所述存储器单元阵列接收所述第一数据信号；送一个传送控制信号到所述存储器单元阵列，使每个所述存储器单元传送所述第一个数据信号到第二存储器单元；从所述第二个存储器单元送所述第一数据信号到所述每个像素的驱动电路；送第二个控制信号使所述像素响应所述第一数据信号；当在所述第一存储器单元接收第二数据信号时，可选择地送第三控制信号使被选择的所述像素之一停止响应所述第一数据信号。
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CN1120678A (zh) 1996-04-17
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