CN1129184C - 用于半导体器件的引线框架 - Google Patents

用于半导体器件的引线框架 Download PDF

Info

Publication number
CN1129184C
CN1129184C CN95101193A CN95101193A CN1129184C CN 1129184 C CN1129184 C CN 1129184C CN 95101193 A CN95101193 A CN 95101193A CN 95101193 A CN95101193 A CN 95101193A CN 1129184 C CN1129184 C CN 1129184C
Authority
CN
China
Prior art keywords
lead frame
lead
lead portion
mould
die base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN95101193A
Other languages
English (en)
Other versions
CN1113608A (zh
Inventor
辛永议
金京燮
任旻彬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN1113608A publication Critical patent/CN1113608A/zh
Application granted granted Critical
Publication of CN1129184C publication Critical patent/CN1129184C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

一种用于半导体器件的树脂模注引线框架，它具有一个其上安放管芯的管芯底座，由键合线与键合焊接区电连接的内引线和与印刷线路板电连接的外引线，管芯底座和内引线由树脂模注，其特征是引线框架由热膨胀系数与印刷线板上线路相近的金属制成，且管芯底座和内引线的表面用金属包覆层覆盖。该引线框架的外引线的热膨胀系数与印刷线路板的热膨胀系数相近，从而可防止外引线与印刷线路板焊区间的焊料连接点龟裂，提高了表面安装的可靠性。

Description

用于半导体器件的引线框架
本发明涉及用于半导体器件的引线框架，特别是涉及能防止因引线框架的外引线和印刷电路板的焊区之间热膨胀系数的不同而引起的焊料连接点破裂的引线框架。
近年来，半导体器件的集成度愈来愈高，而且其存储容量、信号处理速度和功率急速增加。这一趋势加速了半导体器件封装技术的发展，因此，半导体器件封装的重要性已受到人们的关注。
半导体器件的高集成度以及存储器的增加还使得输入和输出接触端子的数量相应增加，继而也使引线的数目相应增加。因此，这些引线必须精细地布置。
为了适应精细设置间距的引线，封装技术最近的趋势是从使用双列直插式封装(DIP)的通孔(TH)型移向表面安装技术(SMT)，后者使用小外形(small outline)封装(SOP)和方板型封装(QEP)的鸥翼状引线，以及小外形J状弯曲封装和塑料有引线芯片载体(PLCC)的J状弯曲引线(如图1所示)。
常规的半导体器件是用这种方式封装的：把与电路图形集成在一起的管芯粘接到由铁镍合金制成的引线框架的管芯底座上，用键合线把管芯的键合焊接区与引线框架的内引线连接起来，用诸如环氧树脂模注化合物之类的绝缘模注化合物将内引线和管芯埋封住。用这种方法，只有引线框架的外引线伸出到模注树脂的外侧。
然后，用焊料糊剂把如此封装好的半导体器件经外引线焊到由银和铂形成的混合集成电路的电极焊接区或由铜构成的印刷线路板(PWB)的焊区上。
引线框架的引线通常都由铁镍合金制成，因为铁镍合金的机械强度、耐热或酸的性能，以及在模注树脂和键合线之间的粘接性能都比较好，尽管它们的导电性或导热性能不如铜。
在多芯片组件或混合器件技术中，具有由铁镍合金制成的引线框架的半导体封装被安装在印刷线路板的表面上，并经受诸如高温或高温循环试验之类的可靠性试验。
然而，如图1所示，印刷线路板的焊区11和引线框架的外引线(12)之间的焊料连接点(14)受到了由铜与铁镍合金间热膨胀系数的不同所引起的剪切应力。通常，用于制造引线框架外引线的铁镍合金和PWB的焊区以及PWB的热膨胀系数分别为4×10-6/℃、16×10-6/℃，以及15-17×10-6/℃。
特别是，在温度循环试验的情况下，累积的应力所造成的变形速率很高，因此，引线精细配置且焊接点面积被减小的这种半导体封装的可靠性是个问题。而这个问题在焊接点面积大到足以能容许因累积的应力所造成的变形的情况下是不存在的。
本发明的目的是提供一种由一种金属制成的半导体引线框架，这种金属的热膨胀系数与印刷线路板的焊区的相同。
本发明的另一个目的是提供一种用于半导体器件的树脂模注的引线框架，这种引线框架包括一其上安装管芯的管芯底座、通过键合线与管芯的键合焊接区电连接的内引线以及与印刷线路板电连接的外引线，所述管芯底座与内引线被模注在树脂中，其特征在于：
所述引线框架由一种热膨胀系数与印刷线路板上的焊区的热膨胀系数相同的金属制成，且管芯底座和内引线通过热压工艺覆盖有一层金属层。
该形成在内引线和管芯底座的表面上的金属包覆层由铁镍或锡铅合金制成，其厚度为引线框架厚度的10％-40％。引线框架本身由铜构成。
由于，本发明的引线框架外引线的热膨胀系数与印刷线路板的热膨胀系数相近，故可防止引线框架的外引线和印刷线路板的焊区之间的焊接点区域内发生焊料连接点龟裂，并可提高表面安装封装的可靠性。
为了更全面地理解本发明及其优点，下面结合附图作详细说明。
图1示出了鸥翼状引线(左)和J状弯曲引线(右)类型的器件中引线框架的外引线与印刷线路板的焊区间的焊料连接点。
图2为使用本发明的引线框架的半导体封装的截面图。
参看图2，这是使用本发明引线框架的半导体封装的截面图，其中，半导体管芯(22)、键合线(23)、管芯底座(24)和引线框架(30)的内引线(26)被埋封于模注树脂(20)中，而引线框架(30)的外引线(28)伸出在模注树脂(20)之外。
引线框架(30)由管芯底座(24)、内引线(26)和外引线(28)构成。在本说明书中，内引线(26)指的是引线框架(30)被埋置在模注树脂(20)中的那部分引线，而外引线(28)指的是引线框架(30)伸出在模注树脂(20)之外的那部分。在内引线(26)和管芯底座(24)的表面上形成有由铁镍或锡铅合金构成的金属包覆层。这些合金的熔点等于或低于180℃。
金属包覆层(27)通过热压粘结到引线框架(30)埋置在模注树脂(20)中的那些部分上，即内引线(26)和管芯底座(24)。该包覆层的厚度范围为由铜制成的引线框架(30)的厚度的10-40％。
模注树脂(20)是任一种用于包封半导体器件的模注树脂，而且能由本领域的普通技术人员毫无困难地选用。
如上所述，本发明的引线框架具有热膨胀系数与印刷线路板的焊区的热膨胀系数一样的外引线(28)，从而能够消除因热膨胀系数的不同而加在焊料连接点上的应力，因此能防止焊料连接点中发生龟裂。
埋置于模注树脂(20)之中的引线框架(30)的内引线(26)和管芯底座(24)的表面上形成的包覆层解除因内引线(或管芯底座)和模注树脂间的热膨胀系数不同而产生的应力。通过在引线框架这些被埋置部分的表面上形成一层金属包覆层，能够改善引线框架与模注树脂的粘结性能并防止水或杂质通过引线框架和模注树脂间的粘结界面侵入到封装内，这种现象在由铜制成的引线框架上因存在氧化层而未形成金属包覆层时有可能发生。
由此可知，本发明的引线框架有以下优点：防止因外引线和印刷线路板的管芯焊接区间的热膨胀系数的差异引起的焊料连接点龟裂，改善与模注树脂的粘结性，减少引线框架和模注树脂间的热膨胀系数的不同，因此，可防止根部断裂、封装剥离、龟裂或类似情况，改善了表面安装半导体器件的可靠性。
用在本领域中熟知的各种树脂涂覆具有该引线框架的表面安装型多芯片组件或混合器件，能够避免暴露在模注树脂之外的外引线的可能发生的腐蚀。
因此，本发明的引线框架适用于制造高安装密度的器件，例如多芯片组件或混合器件等。
尽管本发明只参照用铁镍合金或锡铅合金把被模注部分的上、下表面包覆住的引线框架进行了说明，但应该理解，只用这些合金包覆模注部分的上表面的引线框架也属于本发明的范畴。
此外，虽然就一个具体的较佳实施例描述了本发明，但本领域的普通技术人员可以由此得出各种变化和改型，我们认为本发明包括了所附权利要求书所包含的这些变化和改型。

Claims (5)

1.一种用于半导体器件的树脂模注的引线框架，包括：一个在其上安放管芯的管芯底座、通过键合线与管芯的键合焊接区电连接的内引线以及与印刷线路板电连接的外引线，所述管芯底座和内引线被模注在树脂中，其特征在于：
所述引线框架由热膨胀系数与印刷线路板的焊区的热膨胀系数相同的金属制成，且所述管芯底座和内引线通过热压工艺由一金属层覆盖住。
2.如权利要求1所述的引线框架，其中，金属包覆层由铁镍合金或锡铅合金构成。
3.如权利要求2所述的引线框架，其中，所述合金的熔点等于或低于180℃。
4.如权利要求1所述的引线框架，其中，所述金属包覆层的厚度范围为引线框架厚度的10％-40％。
5.如权利要求1所述的引线框架，其中，所述引线框架由铜制成。
CN95101193A 1994-01-13 1995-01-13 用于半导体器件的引线框架 Expired - Fee Related CN1129184C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR516/94 1994-01-13
KR516/1994 1994-01-13
KR94000516A KR970011623B1 (en) 1994-01-13 1994-01-13 Lead frame of semiconductor package

Publications (2)

Publication Number Publication Date
CN1113608A CN1113608A (zh) 1995-12-20
CN1129184C true CN1129184C (zh) 2003-11-26

Family

ID=19375603

Family Applications (1)

Application Number Title Priority Date Filing Date
CN95101193A Expired - Fee Related CN1129184C (zh) 1994-01-13 1995-01-13 用于半导体器件的引线框架

Country Status (5)

Country Link
US (1) US5844305A (zh)
JP (1) JP3169781B2 (zh)
KR (1) KR970011623B1 (zh)
CN (1) CN1129184C (zh)
GB (1) GB2285883B (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0646971B1 (de) * 1993-09-30 1997-03-12 Siemens Aktiengesellschaft Zweipoliges SMT-Miniatur-Gehäuse für Halbleiterbauelemente und Verfahren zu dessen Herstellung
EP2267798B1 (de) * 1997-07-29 2015-09-30 OSRAM Opto Semiconductors GmbH Optoelektronisches Bauelement
JP2000003988A (ja) * 1998-06-15 2000-01-07 Sony Corp リードフレームおよび半導体装置
US7181438B1 (en) 1999-07-21 2007-02-20 Alberti Anemometer, Llc Database access system
US6868525B1 (en) 2000-02-01 2005-03-15 Alberti Anemometer Llc Computer graphic display visualization system and method
US6798078B2 (en) * 2000-12-14 2004-09-28 Yamaha Hatsudoki Kabushiki Kaisha Power control device with semiconductor chips mounted on a substrate
JP2006100752A (ja) * 2004-09-30 2006-04-13 Sanyo Electric Co Ltd 回路装置およびその製造方法
TW200631111A (en) * 2004-11-04 2006-09-01 Koninkl Philips Electronics Nv Nanotube-based circuit connection approach
KR101210006B1 (ko) * 2005-06-13 2012-12-07 파나소닉 주식회사 반도체 소자 접합 장치 및 이를 이용한 반도체 소자 접합방법
JP4768384B2 (ja) 2005-09-29 2011-09-07 株式会社東芝 光伝送路保持部材及び光モジュール
US7814040B1 (en) 2006-01-31 2010-10-12 The Research Foundation Of State University Of New York System and method for image annotation and multi-modal image retrieval using probabilistic semantic models
WO2009038822A2 (en) * 2007-05-25 2009-03-26 The Research Foundation Of State University Of New York Spectral clustering for multi-type relational data
US9899282B2 (en) * 2015-07-24 2018-02-20 Infineon Technologies Americas Corp. Robust high performance semiconductor package
JP2017032875A (ja) * 2015-08-04 2017-02-09 株式会社フジクラ 光学装置
JP2021067625A (ja) * 2019-10-28 2021-04-30 セイコーエプソン株式会社 慣性計測装置、電子機器及び移動体

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4707724A (en) * 1984-06-04 1987-11-17 Hitachi, Ltd. Semiconductor device and method of manufacturing thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5001546A (en) * 1983-07-27 1991-03-19 Olin Corporation Clad metal lead frame substrates
JPS60218863A (ja) * 1984-04-13 1985-11-01 Furukawa Electric Co Ltd:The 半導体リ−ドフレ−ム
US4673967A (en) * 1985-01-29 1987-06-16 Texas Instruments Incorporated Surface mounted system for leaded semiconductor devices
US5276351A (en) * 1988-10-17 1994-01-04 Semiconductor Energy Laboratory Co., Ltd. Electronic device and a manufacturing method for the same
JPH02231751A (ja) * 1989-03-03 1990-09-13 Sumitomo Special Metals Co Ltd リードフレーム用材料
EP0425691A4 (en) * 1989-05-01 1993-03-31 Sumitomo Electric Industries, Ltd. Lead frame for semiconductor devices
KR920000127A (ko) * 1990-02-26 1992-01-10 미다 가쓰시게 반도체 패키지와 그것을 위한 리드프레임
EP0448266B1 (en) * 1990-03-23 1996-06-05 Motorola, Inc. Surface mountable semiconductor device having self loaded solder joints
JPH0451554A (ja) * 1990-06-19 1992-02-20 Fujitsu Ltd リードフレーム
US5360991A (en) * 1993-07-29 1994-11-01 At&T Bell Laboratories Integrated circuit devices with solderable lead frame
US5455446A (en) * 1994-06-30 1995-10-03 Motorola, Inc. Leaded semiconductor package having temperature controlled lead length

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4707724A (en) * 1984-06-04 1987-11-17 Hitachi, Ltd. Semiconductor device and method of manufacturing thereof

Also Published As

Publication number Publication date
KR950024315A (ko) 1995-08-21
GB2285883A (en) 1995-07-26
GB2285883B (en) 1998-01-21
JP3169781B2 (ja) 2001-05-28
GB9500411D0 (en) 1995-03-01
US5844305A (en) 1998-12-01
JPH07263611A (ja) 1995-10-13
KR970011623B1 (en) 1997-07-12
CN1113608A (zh) 1995-12-20

Similar Documents

Publication Publication Date Title
CN1065662C (zh) 半导体芯片封装及其制造方法
CN1129184C (zh) 用于半导体器件的引线框架
US5821615A (en) Semiconductor chip package having clip-type outlead and fabrication method of same
CN100397639C (zh) 形成多引线框半导体器件的结构和方法
US6162664A (en) Method for fabricating a surface mounting type semiconductor chip package
CN100365804C (zh) 封装集成电路元件及其制造方法
CN1041254C (zh) 三维结构的半导体器件
JP4658268B2 (ja) 電力用半導体モジュール
CN1833317A (zh) 用于引线接合焊球阵列的接地拱顶
US20100270667A1 (en) Semiconductor package with multiple chips and substrate in metal cap
CN101060087A (zh) 电极及其制造方法,以及具有该电极的半导体器件
CN101174602B (zh) 高电流半导体功率器件小外形集成电路封装
CN1099131C (zh) 栅阵列球半导体封装
CN1134839C (zh) 引线框架及涂敷引线框架的方法
KR100226335B1 (ko) 플라스틱 성형회로 패키지
US20050224937A1 (en) Exposed pad module integrated a passive device therein
CN101882606B (zh) 散热型半导体封装构造及其制造方法
CN100576522C (zh) 半导体封装结构及其制造方法
CN102339762B (zh) 无载具的半导体封装件及其制造方法
US20040080034A1 (en) Area array semiconductor device and electronic circuit board utilizing the same
JPH1051034A (ja) 面実装型電子部品、その製造方法、これを回路基板上に実装する方法、およびこれを実装した回路基板
CN101656247A (zh) 半导体封装结构
CN220692011U (zh) 汽车保护器件及二极管
JPH06163812A (ja) 半導体装置および半導体装置の製造方法
CN114864534A (zh) 一种半导体芯片封装组件

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20031126

Termination date: 20140113