CN1149639C - 半导体器件 - Google Patents

半导体器件 Download PDF

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CN1149639C
CN1149639C CNB981209785A CN98120978A CN1149639C CN 1149639 C CN1149639 C CN 1149639C CN B981209785 A CNB981209785 A CN B981209785A CN 98120978 A CN98120978 A CN 98120978A CN 1149639 C CN1149639 C CN 1149639C
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film
nickel
channel region
semiconductor device
silicon
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CN1223459A (zh
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大谷久
治
宫永昭治
司
张宏勇
福永健司
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Abstract

一种半导体器件，包括至少一个含有结晶硅膜的有源区，在绝缘表面上形成，其特征在于，所述硅膜含促进非晶硅膜晶化过程的催化元素。

Description

半导体器件
技术领域
本发明涉及具有结晶态半导体的半导体器件的制造方法。本发明进一步涉及薄膜晶体管。
背景技术
薄膜晶体管(以下简称为“TFT”)是公知的并被广泛应用于各种型式的集成电路中或电-光器件中，特别是被用作为有源矩阵(可编址的)液晶显示器件的各象素所设的开关元件以及用于外围电路的驱动元件。
非晶硅膜极易用作为用于TFT的薄膜半导体。然而，非晶硅膜的电特性很差。使用属于结晶态硅的多晶硅(多晶体的硅)薄膜可以解决此问题。结晶体硅所指是，例如，多晶硅，多晶体的硅，及微晶硅结晶态硅膜的制备可以首先形成非晶硅膜，然后将形成的膜热处理使其晶化。
为使非晶硅膜结晶化的热处理要求将膜在温度600℃或以上加热10小时或更长时间。这样的热处理对玻璃衬底是有害的。例如，通常被用作有源矩阵液晶显示器件的衬底的Corning 7059玻璃的玻璃变形点为593℃，因此不适合用作要受到在600℃或更高的温度下加热的大面积衬底。
根据本发明人的研究，发现非晶硅膜的结晶化可以通过在550℃下加热此膜4小时来实现。这可通过把微量的镍或钯，或其他元素如铅，布置到非晶硅膜表面上来实现。
上面的元素(以下称之为“能加速非晶硅膜晶化的催化元素”或简称之为“催化元素”)可以用等离子处理或汽相淀积来淀积元素，或者用离子注入来渗入元素的办法被导入非晶硅膜的表面中去。等离子处理更详细地包括了用以下办法将催化元素加入非晶硅膜中：在平行板式或正柱式等离子CVD装置中使用含有催化元素的电极在诸如气态氢或氮的气氛里产生等离子体。
然而，在半导体中存在大量的催化元素并不可取，因为使用这种半导体大大损害了半导体使用于其中的器件的可靠性及电气稳定性。
这就是，催化元素对非晶硅膜的晶化是必需的，但最好是不混入结晶硅中。这互相抵触的要求可通过选择一种对结晶硅是无作用的元素作为催化元素，以及通过掺入对膜的结晶来说尽可能小的量的催化元素来满足。因此，被掺入膜中的催化元素的量必需高度精确地被控制。
使用镍或类似元素的晶化方法被详细研究了。结果获得以下发现：
(1)在用等离子处理将镍掺入非晶硅膜的情况里，发现镍在膜受到热处理之前就进入非晶硅膜达到相当大的深度；
(2)最初的晶核形成从镍被掺入的表面发生；
(3)当镍层是被淀积到非晶硅膜时，非晶硅膜的晶化发生方式与实行等离子处理情况时相同。
有鉴于上述，可假设并非所有由等离子处理导入的镍都起了促进硅的晶化作用。这就是说，假如导入大量的镍，就存在不起有效作用的过量的镍。因此原因，发明人考虑，正是镍和硅接触的点或面起了促进硅在低的温度下晶化的作用。进而，假设镍必以原子形态被散布在硅中。即，假设镍需要以原子形态被散布在非晶硅膜表面附近，且镍的浓度应尽可能小但在足以能促进低温晶化的范围内。
微量的镍，即能加速非晶硅晶化的催化元素，能被用，例如，汽相淀积法掺入非晶硅膜表面附近。然而，汽相淀积对于膜的可控性是不利的，因此不适合于精确控制被掺入非晶硅膜的催化元素的量。
发明内容
鉴于上述情况，本发明目的在于使用催化元素，精确控制其被导入的量，通过在相对低的温度下热处理的方法以高生产率制造结晶硅半导体的薄膜。
按照本发明的一个方面，上述目的可以这样被达到：提供具有用来促进其晶化的催化元素的非晶硅膜或者提供包含催化元素的化合物并与非晶硅膜接触，对具有所述催化元素的非晶硅或者非晶硅接触的所述化合物进行热处理，从而，硅膜被晶化了。
更详细地，为了将催化元素导入非晶硅膜，提供含有催化元素的溶液与非晶硅膜接触。
本发明的另一个特点是将从由Ni，Pd，Pt，Cu，Ag，Au，In，Sn，P，As和Sb组成的组中选出的材料以微量加入硅半导体膜中，方法是将含有所述材料的溶液与硅膜接触，然后在相对低的温度下加热来使硅半导体膜晶化。
利用具有如此形成的结晶性的硅膜，可以构成有源区，其中至少包含诸如PN，PI或NI结的一个电结。半导体器件的例子有薄膜晶体管(TFT)，二极管，光传感器等。
附图说明
本发明的上述目的和特点将参阅附图详细地予以说明：
图1A到1D是按照本发明为形成结晶硅膜的截面图；
图2A和2B是表示按照本发明的结晶硅膜的形式的截面图；
图3是表示晶体横向生长长度与溶液中镍浓度的关系曲线；
图4是表示SIMS数据与直接加入镍的硅区中的镍的关系曲线；
图5是表示SIMS数据与硅区中镍的关系曲线，在那里晶体从镍直接加入的区域沿横向生长；
图6A到6E是表示本发明实例3的半导体器件制造工艺的各截面图；
图7表示经等离子处理的硅膜中Ni的浓度；
图8是镍直接加入的区域的Raman光谱图；
图9是晶体横向生长区域的Raman光谱图；
图10A-10F是表示按照本发明实施例4的电-光器件制造工艺截面图；
图11A-11D是表示按照本发明实施例5的TFT制造工艺截面图；
图12表示一个按照本发明实施例6的有源矩阵型电-光器件的示意图；
图13A和13B是表示按照本发明实施例7的结晶硅膜形成的截面图；
图14A-14E是表示按照本发明实施例8的TFT制造工艺的截面图；
图15A和15B是表示按照本发明实施例8的TFT有源层布置的示意图。
具体实施方式
按照本发明使用用来添加镍或类似物的溶液的优点在于以下各点：
(a)在溶液中催化元素(例如镍)的浓度可被预先精确地控制；
(b)掺入非晶硅膜的催化元素的量可以由溶液中催化元素的浓度来决定，只要非晶硅膜的表面和溶液接触；以及
(c)催化元素可以按晶化所必要的最小浓度来掺入非晶硅膜，因为被非晶硅膜表面吸收的催化元素主要用于膜的晶化。
“包括”或“包含”一词在本说明书中所述应理解为或者是(a)催化元素简单地分散在溶液中或者是(b)催化元素以化合物的形式含于溶液中。作为溶液，各种水溶液或者有机溶剂溶液可被使用。那些溶剂可规范地分为极化溶剂和非极化溶液。
水，酒精，酸或铵可被用作为极化溶剂。适合极化溶剂的镍的化合物的例子是溴化镍，乙酸镍，乙二酸镍，碳酸镍，氯化镍，碘化镍，硝酸镍，硫酸镍，甲酸镍，乙酰基丙酮镍，4-环己基丁酸，氧化镍及氢氧化镍。
苯，甲苯，二甲苯，四氯化碳，氯仿或乙醚可被用作非极化溶剂。适合于非极化溶剂的镍化合物的例子是乙酰基丙酮镍及2-乙基己酸镍。
进一步，可以将界面活性剂添加到含有催化元素的溶液中。这样掺杂后，可以使溶液高效率地粘到或者被表面吸收。界面活性剂可在表面被溶液覆盖之前覆盖在表面上。
还有，当使用元素镍(金属)时，必需用一种酸来溶解它。
在前述例子中，镍可以完全被溶剂溶解。但是，即使镍未完全被溶解，也可能使用一种像乳剂的材料，在其中金属镍或镍的化合物被均匀地分散在悬浮介质内。
当使用极化溶剂，像水来溶解镍时，大概非晶硅膜会排斥这样的溶液。此情况下，最好在非晶硅膜上形成一层薄氧化膜以便溶液能均匀地附于其上。氧化膜的厚度最好是10nm或以下。还有可以添加界面活性剂到溶液中，以便增加湿润性。
再有，可以对薄氧化膜表面施加磨擦处理以便使表面形成具有均匀间隔、宽度和方向的不平整性。这种不平整性有助于溶剂渗透，由此增大晶粒尺寸和方向的均匀性。还有，为了提高器件性能的均匀性，采用这种晶粒在特定方向上取向的结晶半导体膜用作半导体器件是有利的。
此外，当使用非极化溶剂如甲苯来获得2-乙基己酸镍溶液时，溶液可直接复盖于非晶硅膜表面上。然而，可以在非晶硅膜和溶液之间插入一种材料来增加它们之间的粘附性，例如，OAP(含有六甲基二硅氮烷作为主要成分，由Tokyo Oka Kogyo公司所生产)，可用于增加抗蚀剂的粘附力。
溶液中催化元素的浓度与溶液的种类有关，但是，粗略地讲，催化元素的浓度，像镍，在溶液中的重量含量为1ppm到200ppm，更好的是1ppm到50ppm，最好是10ppm或以下。根据硅膜中镍的浓度或膜在完成晶化后抗氢氟酸的能力来决定浓度。
可以将含有催化元素的溶液施加到非晶硅膜的选定部分上去来控制晶体生长。特别是，用加热硅膜的办法可使晶体在硅膜中以与硅膜平面大致平行的方向从直接施加溶液的区域向不加溶液的区域生长。
也已证实，此种横向生长区含催化元素为低浓度。利用结晶硅膜作为半导体器件有源层区是有用的，不过，一般在有源区中杂质的浓度最好尽可能地低。因此，对有源层区使用横向生长区有利于器件制造。
使用镍作为催化元素在按本发明的方法中是特别有效的。然而，其他有用的催化元素包括镍(Ni)，钯(Pd)，铂(Pt)，铜(Cu)，银(Ag)，金(Au)，铟(In)，锡(Sn)，磷(P)，砷(As)，及锑(Sb)。另外，催化元素可以是选自属于周期表中VIII，IIIb，IVb，及Vb族的元素中的至少一种。
实施例1
本实施例涉及在玻璃衬底表面上制备结晶硅膜的方法。参见图1A-1D，将催化元素(在本情况中为镍)掺入非晶硅膜的工艺在下面叙述。使用Corning 7059 100mm×100mm尺寸的玻璃衬底。
厚度从10到150nm的非晶硅膜用等离子CVD或LPCVD淀积而成。尤其是在本情况中，通过等离子CVD淀积厚度为100nm的非晶硅膜12(图1A)。
然后，非晶硅膜经氢氟酸处理除去杂质及在其上形成的固有氧化物，如有必要的话。此处理之后，在非晶硅膜上淀积一层厚度为1到5nm的氧化膜13。固有氧化膜可利用来作氧化膜层。氧化膜13的厚度无法十分精确，因为此膜太薄。不过，固有氧化膜厚度多半约2nm。氧化膜13通过在氧气气氛中照射5分钟紫外(UV)辐射来形成。氧化膜13也可以通过热氧化来形成。再进一步，氧化膜可以通过采用含水过氧化氢的处理而形成。
氧化膜13之作用在于使在以后步骤中施加入的含镍乙酸盐溶液充分分散在非晶硅膜的全部表面上。更简单地说，设置氧化膜13是用来改善非晶硅膜的湿润性。如果直接施加乙酸盐水溶液，非晶硅膜将排斥乙酸盐水溶液，以此防止镍均匀地掺入非晶硅膜的表面。
随后制备添加所用的含镍乙酸盐水溶液。更具体地，制备浓度为10到200ppm，例如100ppm的含镍乙酸盐水溶液。2毫升配好的乙酸盐溶液滴到非晶硅膜12上的氧化膜13的表面上，并维持一定时间，最好0.5分钟或更长些，例如5分钟时间。随后用离心机以2000rpm甩干60秒钟以除去不需要的溶液(图1C及1D)。
在乙酸盐溶液中镍的浓度实际上是1ppm或更高些，最好是10ppm或再高些。溶液不必只是乙酸盐溶液，其它可应用的溶液包括盐酸盐，硝酸盐，及硫酸盐。另外，那些有机辛酸盐以及甲苯也可以使用。在使用有机溶液的场合，无需设置氧化膜13，因为溶液可以直接加到非晶硅膜将催化元素导入膜内。
溶液的涂覆可以一次实行或者重复多次，从而，可以在甩干后在非晶硅膜12的表面上均匀地形成厚度为几埃到几百埃的含镍的膜。在此膜中所含的镍在此后实行的加热过程中将扩散到非晶硅膜中去并起到促进非晶硅膜晶化的作用。顺便，这也是本发明人的设想，就是含镍或其他材料的膜并非必需是完全连续的膜的形式，即它可以是不连续的，例如，是若干簇状的形状。
涂覆以上溶液之一的非晶硅膜维持此状态达5分钟。在结晶硅膜12中的镍催化元素的最后浓度可以通过改变此保持时间来控制，然而，对控制在结晶硅膜中镍催化元素最后浓度最有影响的因素是在溶液中镍催化元素的浓度。
对由此获得的涂覆含镍溶液的硅膜在加热炉中氮气氛内受到温度为550℃，4个小时的热处理。因而，在衬底11上形成结晶硅薄膜12。
热处理可在450℃或以上的任何温度下实行。假如选择低的温度，那么热处理将花费较多时间而生产效率低。反之，假如选择550℃或更高的热处理温度，就必需考虑玻璃衬底的耐热问题。
实施例2
本实施例涉及类似于实施例1中叙述的工艺，除了厚度为120nm的氧化硅膜被选定用来将氧化硅膜作掩膜而把镍掺入非晶硅膜选定的区域这一点之外。
参阅图2A到2C，下面叙述按照本实施例制造半导体的工艺在非晶硅膜12上淀积厚100nm或以上的氧化硅膜，例如120nm作为掩膜。然而，如果膜作为掩膜是足够密集的话，氧化硅膜21可以比100nm薄，例如50nm。此后，采用通常的光刻技术把氧化硅膜21制成规定的图形。在氧气气氛中用UV辐射5分钟形成薄的氧化硅膜20。氧化硅膜20的厚度大约为2到5nm(图2A)。如此形成的为改进非晶硅膜的湿润性的氧化硅膜的作用往往是由在溶液和掩膜图形的尺寸相匹配的场合下由作为掩膜而形成的氧化硅膜的亲水性质来提供。不过，这是个特殊的情况，一般确实使用氧化硅膜20。
随后，类似于在实施例1中描述的工艺，5毫升(对于衬底尺寸10cm×10cm)含100ppm镍的乙酸盐溶液滴到所得结构的表面。经离心机以50rpm旋涂10秒钟，在衬底的全部表面上形成均匀的含水膜。此后，再维持此状态5分钟，所得结构用离心机以2000rpm转速甩干60秒钟。在维持期间，衬底可在离心机上以100rpm或以下的转速旋转(图2B)。
在这之后，非晶硅膜12在气体氮中以550℃热处理4个小时而被晶化。可以见到，晶体生长沿着从镍被导入的区域22如用箭头23所示向着镍未被直接导入的区域25的横向进行。
在图2C中，标号24表示镍被直接导入以造成结晶化的区域，而标号25表示晶化从区域24横向进行的区域。
通过电子透射显微镜(TEM)及电子衍射证实了：
(a)横向生长的晶体是宽度均匀的针状或柱状单晶；
(b)晶体生长方向虽然和膜厚有关但大致是平行于衬底表面；
(c)晶体生长方向实质上取向于晶体的[111]轴。
根据上述事实，可得出结论，横向生长区25的表面是垂直于[111]方向的平面，即平面{111}中的至少一个及那些由{hkI}(h+k＝1)表示的面，例如，{110}，{123}，{134}，{235}，{145}，{156}，{257}，或{167}，或其相邻的面。
应注意，当以上的指数hkI是偶奇混合时，由于结晶硅具有其空间组由Fd3m表示的金刚石结构，会发生禁带反射，且用电子衍射不能观察到。
图3表示晶体沿横(测)向生长到区域23的距离(μm)与在乙酸盐水溶液中镍的浓度(ppm)之间的关系。
由图3可知，通过制备含镍浓度为100ppm或更高的溶液来实现晶体生长25μm或更长。从图3也可推测，沿横向晶体生长的10μm可以用浓度为10ppm的含镍乙酸盐水溶液来获得。
图3中所用的数据是该结构在施加了含镍乙酸盐水溶液后保持5分钟时间的场合的。但是，晶体沿横向生长的距离随保持时间而改变。
例如，在应用浓度为100ppm的含镍乙酸盐水溶液的场合，增加保持的时间达1分钟可获得较长的晶体生长距离。然而，一旦保持时间达到1分钟或更长，再延长则变化不明显。
在应用浓度为50ppm的含镍乙酸盐水溶液的场合，保持时间的增加和晶体沿横向生长的距离成正比。但是，保持时间增加到5分钟或更长，此增加趋于饱和。
进而，应注意到温度极大地影响达到平衡状态的反应所必需的时间。因此，保持时间也受温度支配，严格控制温度是必需的。因此，晶体生长的距离总体上随提高热处理温度及延长热处理时间而增加。
图4及5表示使用含有100ppm镍的乙酸盐水溶液导入镍及随后将硅膜在550℃下热处理4小时获得的硅膜中的镍浓度。镍的浓度用二次离子质谱仪(SIMS，secondry ion mass spectroscpy)取得。
图4表示图2C中的区域24的镍浓度，即，镍被直接掺入的那个区域。图5表示图2C中区域25，即发生晶体从区域22沿横向生长的那个区域的镍的浓度。
比较图4和图5的数据，可见发生晶体沿横向生长的区域的镍浓度比起镍被直接导入的区域的浓度要低大约一个数量级。
还可以看到，在镍被直接导入区域的结晶硅膜中镍的浓度，通过使用镍浓度为10ppm的含镍乙酸盐水溶液可被抑制到1018cm-3水平。
结果，可以明白，在发生晶体沿横向生长的结晶硅区域中的镍浓度，通过使用镍浓度为10ppm的含镍乙酸盐水溶液并在550℃中更高温度下热处理4小时或更长时可被抑制到1017cm-3或以下。
结论是，通过控制溶液的浓度及保持时间，可把硅膜中直接加入镍的区域24中镍的浓度控制在1×1016原子数/cm3到1×1019原子数/cm3范围内，并进而使横向生长区域25中镍的浓度低于它。
为了比较，用以下方法制备试样，此方法中代替使用含镍溶液，将非晶硅膜曝露于等离子体，此等离子体是由含有一定量镍的电极产生的，这是为了把镍加入硅中(此被称之为等离子处理)，再在550℃下热退火4小时使硅膜晶化。选择等离子处理的条件，使横向晶体生长的程度与使用100ppm的含镍乙酸的场合相同。关于此试样的SIMS数据示于图7。可以看到，在使用等离子处理的场合，在横向生长区域中镍的浓度高于5×1018原子数/cm3，这种高浓度对于半导体器件的有源区来说是不希望的。所以，由此可以明白使用溶液对减小横向生长区内镍的浓度是有利的。
图8表示图4中相应区域、即镍被直接导入的区域的Raman光谱结果。图8表明在此区域中结晶度极高。图9表示了晶体横向生长区域的Raman光谱结果。可以看到，即使在横向生长区，Raman谱图的强度也大于单晶硅强度的1/3。因此，可得出结论，在横向生长区中结晶度也高。
按照本发明方法制造的结晶硅膜的特征是呈现出优异的抗氢氟酸性。以本发明人的知识而言，假如用等离子处理来导入镍，结晶硅的抗氢氟酸性能是差的。当必需对形成于结晶硅膜之上的氧化硅膜进行蚀刻，以便构成通过它的接触孔时，氢氟酸通常被用作腐蚀剂。若结晶硅膜有足够高的抗氢氟酸能力，为只除去氧化硅膜就不需要大的选择比(氧化硅膜和结晶硅膜腐蚀速率的差别)。所以，有高的抗氢氟酸腐蚀力的结晶硅膜在半导体器件制造工艺中有极大好处。
实施例3
本例涉及制造TFT的工艺，此TFT用于使用了按照本发明方法制造的结晶硅膜的有源距阵液晶显示器件的每个象素。所得到的这种TFT不仅可以用于液晶显示器件，也可用于通常称为薄膜集成电路(IC)的广泛领域。
参照图6A到6E，按照本例制造TFT的工艺叙述于下。在玻璃衬底上淀积一层氧化硅膜(图中未表示)，厚度为200nm，作为基层。此氧化硅膜被用来阻止杂质从玻璃衬底扩散到器件结构中去。
此后，以相似于例1中所用方式淀积厚100nm的非晶硅膜。在利用氢氟酸处理除去自然氧化膜后，通过在氧气气氛中UV辐射形成厚度2nm的一薄层氧化膜。
采用镍浓度为10ppm的含镍乙酸盐水溶液对所得的其上具有氧化膜的非晶硅膜进行涂覆。将得到的结构保持5分钟时间，随后用离心机甩干。以后用过渡的氢氟酸除去氧化硅膜，通过对所得的结构在550℃下加热4小时使硅膜晶化。到这一步为止的工艺与例1中叙述的一样。
把由此而结晶化的硅膜制成岛状区104如图6A所示，岛状区104为TFT提供有源层。此后，形成厚度从20到150nm的氧化硅膜105如100nm。氧化硅膜起着栅绝缘膜作用(图6A)。
采用TEOS(四乙氧基硅烷)通过RF等离子CVD工艺淀积氧化硅膜105。这就是，在150到600℃、最好在300到450℃范围内的衬底温度TEOS被分解并与氧气一起被淀积。当所加RF功率为100到250W时，总压强为0.05到0.5Torr下，1.1到1.3的压强比导入TEOS和氧气。另外，氧化硅膜可以用减压CVD或常压CVD方法制备，采用TEOS和臭氧一起作为原始气体，同时将衬底温度保持在350到600℃范围，最好在400到550℃的范围内。由此淀积得出的膜在氧气或臭氧中、400到600℃的温度范围内进行30到60分钟的退火。
硅区104的结晶化可以采用照射KrF激发物激光束(工作波长为248nm，脉宽20nsec)或等效于此的强光束来加速。应用红外辐射的RTA(快速热退火)是特别有效的，因为可以有选择地加热硅膜而不加热衬底。而且，RTA在制造绝缘栅场效应半导体器件特别有用，因为它降低了硅层与氧化硅膜之间的界面能级。
其次，用电子束汽相淀积法淀积一层厚度从200nm到1μm的铝膜，并制成栅电极106。铝膜可以含0.15到0.2％重量的钪作为掺杂剂。把衬底浸入含有1到3％的酒石酸且pH值控制大约为7的乙二醇溶液中进行阳极氧化，以铂为阴极，以铝栅电极为阳极。阳极氧化的实施是首先以固定的速率把电压升到220V，再使电压在220V维持一个小时来完成氧化。在本例加恒定电流的场合，最好以2到5V/min的速率提高电压。按此方式形成为厚度为150nm到350nm、特别是200nm的阳极氧化层109(图6B)。
使用栅电极部位作为掩膜，通过离子掺杂(等离子掺杂)以自对准方式把杂质(本情况中是磷)注入TFT的岛状硅膜中。以磷化氢(PH3)作为掺杂气体，以1×1015到4×1015cm-2的剂量注入磷。
其结晶度因导入杂质而受到损害的部位之结晶度采用工作波长为248nm、脉宽20nsec的KrF激发物激光束照射来予以消除。激光工作能量密度为150到400mJ/cm2，最好在200到250mJ/cm2的范围内由此形成N-型掺杂区(由磷掺杂的区域)108。该区的表面电阻为200到800Ω/平方范围内。
激光退火这一步骤可以用RTA工艺来代替，亦即使用闪光灯的快速热退火法来代替，它把硅膜的温度快速地提高到1000到2000℃的范围内(在硅监视器上测量)。此这退火法也被称为RTP(快热法)
此后，采用TEOS和氧气、由等离子CVD，或者采用TEOS和臭氧、由减压CVD或常压CVD淀积厚300nm的氧化硅膜作为层间介电体110。衬底温度保持在250到450℃范围内，例如，在350℃。随后通过机械抛光所制得的氧化硅膜获得光滑的表面。利用溅射淀积ITO涂层于其上，并蚀刻出图形提供象素电极111(图6D)。
层间介电体110经蚀刻形成源/漏的接触孔，如图6E所示，使用铬或氮化钛构成内连接112及113，将内连接113接到象素电极111。
在按照本发明的方法中，用浓度低达10ppm的含镍水溶液将镍掺入硅膜。因此，具有高的抗氢氟酸能力的硅膜可以实现，可以稳定地和以高重复性来构成接触孔。
将硅膜在氢气中、温度300到400℃的温度范围加氢处理0.1到2小时，以此完成硅膜氢化从而形成完整的TFT。同时制造多个与此相同的TFT，并布置成矩阵，以构成有源矩阵液晶显示器件。
按照本实施例，有源层内所含镍的浓度是在5×1016到3×1018原子数/cm3范围内。
如上所述，按照本实施例的方法包括了使镍导入部位晶化。然而，可以如实施例2那样来改进工艺。即，可以通过掩膜将镍掺入选定的部位，并且晶体从该部位横向生长。此晶体生长的区域被用于器件。从电气稳定性和可靠性的观点，可以通过进一步降低在器件有源层区的镍浓度来制造更为可取的器件。
实施例4
本例针对用来控制有源矩阵象素的TFT的制造。图10A-10F是用于解释按照本例制造TFT的截面图。
参阅图10A，衬底201、例如玻璃衬底经冲洗并在其表面设置一层氧化硅膜202。以氧气及四乙氧基硅烷作为原始气体，通过等离子CVD形成氧化硅膜202。膜厚为例如200nm。然后，具有厚度为50-150nm，例如100nm的本征型非晶硅膜203形成于氧化硅膜202之上，随之50-200nm例如100nm的氧化硅膜205连续地被形成于非晶硅膜之上。再有，氧化硅膜205被选择地蚀刻，以便构成一个曝露非晶硅膜的开口206。
此后，把含镍溶液(这里是乙酸盐溶液)以例2相同的方式覆盖在全部表面上。乙酸盐溶液中镍的浓度为100ppm。其他条件和例2一样。这样，形成含镍的膜207。
附有相接触的含镍膜的非晶硅膜203通过在氮气氛中500-620℃下热退火4小时来被晶化。晶化从开口206之下的区域开始，那里硅膜直接和含镍膜相接触，再在平行于衬底的方向上发展。在图中，标号204指的是硅膜的那一部位，在这里，硅膜直接被加入镍及晶化，而标号203则指晶体横向生长的那一部位。横向生长的晶体大约有25μm。晶体生长的方向大致是沿[111]轴。
晶化之后，除去氧化硅膜205。此时，形成在开口206内硅膜上的氧化物膜同时被除去。进而，硅膜204被干蚀刻出图形以形成呈岛状的有源层208，如图10B所示。要注意，以较高浓度被含于硅膜中的镍不仅在镍被直接加入的开口206处，而且也在晶体的顶端存在的地方。在硅膜上应该这样来做出图形：制出图形的硅膜208不应包括含有较高浓度镍的这种部位。
然后把构成图形的有源层208曝露于10atm的含100％水蒸汽500-600℃、典型地为550℃的气氛中1小时，使其表面氧化，从而形成100nm的氧化硅膜209。氧化之后，衬底保持于400℃的氨气氛中(1atm，100％)。在此条件下，氧化硅膜209受到强度峰值在波长为0.6-4μm，例如，0.8-1.4μm的红外线照射30-180秒，以便对氧化硅膜209渗氮。HCl可以0.1-10％加到气氛中。卤素灯用作为红外线的光源。IR线的强度被控制得使监测的单晶硅片表面上温度在900-1200℃之间。特别是，温度由埋在单晶硅片内的热偶来监测并传回到IR光源(反馈)。在本例中，温度上升率在50-200℃/sec范围内保持恒定，并且树底以20-100℃/sec自然冷却。由于IR可有选择地加热硅膜，因而可以减少玻璃衬底的发热。
参见图10C，用溅射法形成厚度300-800nm、例如600nm的铝膜，再制成栅电极210。铝膜最好含有0.01-0.2％的钪。
参见图10D，铝电极210表面在含1-5％酒石酸的乙二醇溶液中经阳极氧化形成阳极氧化膜211。氧化膜211的厚度是200nm，它将决定偏置栅区的尺寸，此区将在以后步骤中形成，如下所述。
再参阅10E，利用栅电极及周围的阳极氧化膜作为掩膜，以自对准方式用离子掺杂法(也称为等离子掺杂法)把N-型传导杂质(这里是磷)导入有源层，以便形成掺杂区212及213。磷化氢(PH3)被用作为掺杂剂气体。加速电压为60-90KV，例如，80KV。剂量为1×1015-8×1015cm-2，例如，4×1015cm-2。从图中可以看到，掺杂区212及213是从栅极偏移了距离“X”。这样布置对降低泄漏电流(截止电流)是有利的，它是在加反向偏压(即在NTFT情况是负电压)到栅极时发生的。尤其是，由于为了获得优良的显示而要求贮存在象素电极的电荷不泄漏，偏置结构在TFT被用于如本例情况这样控制有源矩阵的象素时特别有利。
此后，以激光照射实施退火。作为激光，可以使用KrF激光(波长：248nm，脉宽20nsec)或其他激光。在KrF激发物激光的情况，激光照射的条件是：能量密度为200-400mJ/cm2，例如，250mJ/cm2，射束数为每一处2-10束，例如，2束。最好把衬底加热到200-450℃，以加强照射的效果。
参照图10F，通过等离子CVD形成600nm厚度的氧化硅的层间绝缘膜214。进一步，一层透明的聚酰亚胺膜215用离心涂覆法形成，以得到平整的表面。然后，用溅射法在平整表面上形成厚为80nm由例如铟锡氧化物做成的透明导电膜并制成象素电极216。
层间绝缘膜214及215上开有接触孔，通过它电极/导线217及218可到达TFT的掺杂区。电极/导线217及218由金属材料做成，例如，多层的氮化钛及铝。最后，在1atm的氢气气氛中在350℃下热处理30分钟，以此制成一个有TFT的有源矩阵电路的象素电路。
实施例5
此例针对TFT的制造并将参阅图11A-11D来叙述。叙述到与以前各例中相同或相似的元件时用相同的标号。
参阅图11A，用溅射法先将氧化硅的基膜202形成于Corning 7059衬底201上达到200nm厚。衬底在高于衬底变形点的温度对衬底退火，随后以0.1-1.0℃/分的速率使玻璃冷却到低于变形点。从而有可减少因以后发生的衬底加热(例如，热氧化，热退火)所致的衬底收缩，结果，便于掩膜对准的处理。此步骤可以在形成基膜201之前或之后进行，或者在形成基膜201之前和之后都进行。在使用Corning 7059衬底的场合，衬底可在620-660℃下加热1-4小时，随后以0.1-0.3℃/分冷却，当温度降到400-500℃时拿出炉子。
以后，通过等离子CVD，形成50-150nm厚的本征(I-型)非晶硅膜，例如，100nm。此非晶硅膜以与例中同样的方式被晶化。所以，省去重复的解释。晶化之后，把硅膜制成尺寸是10-1000平方微米的岛状。因此，成岛状的结晶硅膜208构成为TFT的有源层，如图11A所示。
参阅图11B，将硅膜的表面曝露于氧化性气氛中使其氧化，形成氧化膜209。氧化性气氛含有70-90％的水蒸汽。气氛的压强和温度是1atm及500-750℃，典型地为600℃。气氛由氢气和氧气以1.5-1.9的氢/氧比而发生的生热反应所产生。硅膜曝露在由此而形成的气氛中3-5小时。结果形成厚50-150nm、例如100nm的氧化物膜209。由于硅膜表面因氧化而减少(吃掉)5nm或更多，所以硅膜最上部的表面受污损的后果不会带入氧化硅交界面。换句话说，由于氧化，有可能获得干净的硅-氧化硅界面。还有，由于氧化硅的厚度二倍于要被氧化的硅膜部位厚度，当硅膜原本厚100nm，所得到的氧化硅膜是100nm时，氧化后剩下的硅膜厚度是50nm。
一般，氧化硅膜(栅绝缘膜)及有源层越薄，迁移率越高，截止电流越小。另一方面，当非晶硅膜的厚度越厚，其初始晶化越容易。因此就有源层厚度而言，晶化工艺与电性能之间存在矛盾。本例很好地解决了此问题。即，起先形成较大厚度的非晶硅膜以便能得到较好的结晶硅膜，随后由氧化使硅膜的厚度减小，导致TFT有源层性能的改进。而且，在热氧化时包含在结晶硅膜中非晶成分或晶界势必被氧化，导致减少在有源层中所含有的重组合中心。
通过热氧化形成氧化硅膜209后，衬底在1atm及600℃、一氧化二氮为100％的气氛中退火二个小时。
参阅图11C，通过低压CVD把含0.01到0.2％磷的硅淀积达300-800nm厚，例如，600nm，再制成栅电极210。进一步，用栅电极210为掩膜，用离子掺杂法以自对准方式将N-型导电杂质加入有源层的部位。磷化氢用作掺杂剂气体。掺杂条件基本上和例4中一样。剂量是例如5×1015cm-2。由此，形成N-型掺杂区212及213。
此后，采用与例4同样方式完成以KrF激发物激光的退火。激光热处理可以用近红外线灯退火代替。结晶硅吸收近红外线比非晶硅更有效。因此，用近红外线退火可和在1000℃或更高下热退火相比拟。另一方面，有可能防止玻璃衬底受热损坏，因为玻璃衬底不太吸收近红外线。即，虽然远红外线可被玻璃衬底吸收，波长为0.5-4μm的可见光或近红外线是不太被吸收的。
参阅图11D，由等离子CVD形成600nm厚的氧化硅的层间绝缘膜214。聚酰亚胺可以用来代替氧化硅。进一步，穿过绝缘膜形成接触孔。用多层氮化钛和铝膜穿过接触孔形成电极/导线217及218。最后，在350℃及1atm的氢气气氛中退火30分钟。这样，TFT就完成了。
这样做成的TFT的迁移率是110-150Cm2/Vs。S值是0.2-0.5V/数字。还有，在用把硼掺到源区和漏区来形成P-沟道型TFT场合，迁移率是90-120Cm2/Vs，S值是0.4-0.6V/数字。按照本实施例，与用已知的PVD或CVD法形成栅绝缘膜场合相比，迁移率可增加20％或以上，S值可降低20％或以上。
此外，按照本例制成的TFT的可靠性可与通过在温度高达1000℃的热氧化法生产的TFT相比拟。
实施例6
图12表示了按照实施例的有源矩阵型液晶器件的一个例子。
图中，61标号表示玻璃衬底，63表示有多个象素组成矩阵形式的象素区，其每一个由一个TFT作为开关元件。标号62表示外围驱动区，其中设置驱动TFT，以此驱动象素区的TFT。象素63及驱动区62统一做在同一衬底61上。
设置于驱动区62中的TFT需要有高的迁移率，以便让大的电流过它。还有，设置于象素区63内的TFT需要有低的漏泄电流性能，以便增加象素电极维持电荷能力。例如，按照例3制造的TFT适合于象素区63的TFT。
实施例7
本例是例1的改进。即，在形成镍的乙酸盐水溶液之前，先在氧化硅表面进行磨擦处理以便形成一些细微的划痕于其上。
参阅图13A，提供Corning 7059衬底11，其上有作为基膜18的氧化硅膜。用溅射构成厚度例如为200nm的氧化硅膜。在氧化硅膜上，用等离子CVD形成厚度30-80nm、例如50nm的非晶硅膜12。接着，用氢氟酸处理非晶硅膜，以便除去形成于其上的沾染物或自然氧化物。这以后，将衬底曝露于氧气气氛中，其表面用UV光照射(未示出)，形成1-10nm厚的氧化硅膜。可通过氧化氢处理或热氧化法来进行氧化。
此后，细的划痕(不均匀或不平整)用磨擦处理形成于氧化硅膜上，如以标号17所示。磨擦处理用金刚石磨浆实现。然而，棉布或橡皮可用来代替金刚石磨浆。要求划痕有均匀的方向、宽度和间隔。
磨擦处理之后，用离心被覆法以和例1中同样的方式形成乙酸镍膜。乙酸镍溶液被划痕均匀地吸收。
参阅图13B，非晶硅膜再被像在例1中在氮气气氛的550℃炉中退火4小时。由此得到结晶硅膜。在所得到的膜中晶粒尺寸和晶粒19的取向方向比在例1中所得的更均匀。晶粒19在一个方向延伸并有大致为矩形或椭圆形状或相似形状。
划痕的尺寸或数目可以通过改变金刚石磨浆的密度来控制。因为用显微镜很难观察此划痕，所以磨擦条件这样来决定：使晶粒尺寸或在得到的结晶硅膜中剩下的非晶硅的密度最大。在此例中，选择处理条件使得在晶化后剩下的非晶区的长度是1μm或以下，最好为0.3μm或以下。
在例1的情况并不做磨擦处理，趋势是镍不是均匀地扩散，观察到非结晶区为1-10μm的圆形。所以，磨擦处理改进了所得到晶体的均匀度。
实施例8
本例针对用于开关例7的有源矩阵的象素的TFT的制造方法。图14A-14E是表示制造方法的截面图。
参阅图14A，用等离子CVD法在由Corning 7059玻璃(10平方厘米)做成的衬底201上形成300nm厚的氧化硅膜202。然后，用等离子CVD在氧化硅膜202上形成厚30-100nm的非晶硅膜203，例如50nm。
由此形成的非晶硅膜用例7的方法进行晶化。在热结晶化后，实行激光热退火，使用Kr激发物激光(248nm波长)，能量密度为200-350mJ/cm2，以便改进结晶度。结果，剩留在结晶硅膜中的非晶成分完全被晶化了。
晶化以后，硅膜203被制成岛状硅膜208，如图14B所示，此时，硅岛的位置才方向与晶界的相对关系可以按如示于图15A和15B那种方式来选择。
当TFT的电流穿过晶界时，晶界起电阻作用。另一方面，电流容易沿晶界流动。所以，TFT的电特性极大地受到包括在沟道区域中晶粒(晶界)的数目和方向的影响。例如，当有若干TFT时，每个TFT的漏电流性能随包含在沟道区域内的晶粒数目和方向而变化。
当晶粒尺寸与沟道的尺寸接近一样或小于它时，上述问题变得严重。沟道比晶粒足够大时，这种分散被平均化，看起来不明显。
例如，假如在沟道中没有晶界，可以预期TFT的电性能和单晶TFT的一样。另一方面，当晶界沿漏区电流的方向穿过岛延伸时，泄漏电流就变大。相反，当晶界延伸方向垂直于漏区电流的方向时，泄漏电流就变小。
当TFT如此布置，使其漏区电流沿磨擦方向流动，因为晶体沿磨擦方向伸长，包括在沟道中的晶界数目势必不均匀，因此泄漏电流很可能分散。然而，漏泄电流强度变大，因为晶界与漏区电流的方向对齐，如图15A所示。另一方面，如图15B所示，假如漏区电流流动方向垂直于磨擦方向，截止电流性能就能稳定。这是因为晶粒19的宽度近似恒定，存在于沟道区26中的晶粒数目可以做得恒定。结果，需要这样来布置有源区208：TFT的漏区电流流动方向垂直于晶界的方向，即磨擦方向。而且，磨擦处理使得晶粒尺寸均匀，这导致非晶区由随后的激光照射能被外延生长地结晶化。
如示于图14B，通过等离子CVD形成厚度20-150nm、例如100nm的氧化硅膜，作为栅绝缘膜209。
然后，含Si为重量1％或Sc为重量0.1-0.3％的铝被溅射构成为100nm到3μm，例如500nm，随后制成栅电极210。再用含酒石酸为1-3％的乙二醇溶液对铝电极进行阳极氧化处理。电解液的pH值约是7。铝电极用作为阳极而铂电极用作为阴极。在保持电流恒定下使电压上升直到它达到220V，此条件再维持1小时。结果，形成厚为150-350nm的阳极氧化膜211，例如200nm。
参阅图14C，将一种导电型(硼)杂质用栅极210为掩膜以自对准方式由离子掺杂法导入硅岛。乙硼烷(B2H6)被用作掺杂剂气体。剂量为4-10×1015cm-2。加速电压为65KV。因而，得到一对掺杂区(P-型)212及213。
此后，由照射KrF激发物激光(248nm波长，20nsec脉宽)来激活掺杂区212及213。激光束的能量密度为280-400mJ/cm2，最好为250-300mJ/cm2。
参阅图14D，采用等离子CVD形成厚度为300nm由氧化硅做成的层间绝缘膜214。然后，用蚀刻法穿过层间绝缘膜214及栅绝缘膜209在掺杂区212(源区)上形成接触孔。再用溅射法形成铝膜并制成源电极217。
参阅图14E，用等离子CVD淀积200-600nm的氮化硅作钝化膜215。采用蚀刻法穿过钝化膜215、层间绝缘膜214及栅绝缘膜209在掺杂区(漏区)213上形成接触孔。最后，用铟锡氧化物膜(ITO)构成象素电极216。这样就获得象素TFT。
尽管由优选实施例公开了本发明，但应理解，本发明的范围并不限于实施例。可以做各种修正。
例如，含镍的膜可以用无水溶液如酒精来形成。当使用酒精时，溶液可以直接形成于非晶硅膜上而不需用氧化膜。特别是，含镍化合物像乙酰基丙酮镍可用酒精来溶解。此材料可能在为了晶化而加热时被分解，因为其分解温度相对地低。乙酰基丙酮镍的量这样选择，使溶液中镍的浓度控制在100ppm。可以用溶液涂覆，再在1500rpm下用离心甩干法甩干1分钟来得到含镍的膜。由于酒精的接触角比水的要小，所以用来形成膜的溶液的量可以小于用水溶液的场合。在此情况，对于100平方毫米，2ml的微量是适宜的。以后的形成结晶硅的各步骤可以完全和在优选实施例中所解释的一样。
对另外的例子，元素镍可以用酸来溶解。即，0.1mol/l的硝酸被用作此酸。50ppm的镍粉末被溶解在这种酸中。

Claims (14)

1.一种具有至少一个薄膜晶体管的半导体器件，所述薄膜晶体管包括：
一沟道区，具有一个含硅的结晶半导体层，在绝缘表面上形成；
源区和漏区，所述沟道区即夹在此源区与漏区之间；
一栅绝缘膜，毗邻所述沟道区；和
一栅极，毗邻所述栅绝缘膜；
其特征在于，所述结晶半导体层的表面具有一个{110}、{123}、{134}、{235}、{145}、{156}、{257}和{167}诸平面的至少其中之一平面，但没有{111}平面。
2.如权利要求1所述的器件，其特征在于，所述结晶半导体膜经过加氢处理。
3.如权利要求1所述的器件，其特征在于，所述半导体层含选自由镍、钯、铂、铜、银、金、铟、锡、磷、砷和锑组成的元素群的催化元素，其含量浓度不高于1×1019原子/立方厘米。
4.一种具有至少一个薄膜晶体管的半导体器件，所述薄膜晶体管包括：
玻璃衬底；
一沟道区，具有一个含硅的结晶半导体层，在所述玻璃衬底上形成；
源区和漏区，两者之间夹有所述沟道区；
一栅绝缘膜，毗邻所述沟道区；和
一栅极，毗邻所述栅绝缘膜；
其特征在于，所述结晶半导体层的表面具有一个{110}、{123}、{134}、{235}、{145}、{156}、{257}和{167}诸平面的至少其中之一平面，但没有{111}平面。
5.如权利要求4所述的半导体器件，其特征在于，所述结晶半导体层经过加氢处理。
6.如权利要求4所述的半导体器件，其特征在于，所述结晶半导体层包含催化元素，用于在浓度不高于1×1019原子/立方厘米的范围内促成结晶。
7.如权利要求6所述的半导体器件，其特征在于，所述催化元素含选自由镍、钯、铂、铜、银、金、铟、锡、磷、砷和锑组成的元素群的物质。
8.一种具有至少一个薄膜晶体管的半导体器件，所述薄膜晶体管包括：
玻璃衬底；
一沟道区，有一个含硅的结晶半导体层，在所述玻璃衬底上形成；
源区和漏区，两者之间夹有所述沟道区；
一栅绝缘膜，毗邻所述沟道区；和
一栅极，毗邻所述栅绝缘膜；
其特征在于，所述结晶半导体层的轴线平行于所述玻璃衬底的表面。
9.如权利要求8所述的半导体器件，其特征在于，所述结晶半导体层经过加氢处理。
10.如权利要求8所述的半导体器件，其特征在于，所述结晶半导体层包含催化元素，用于在浓度不高于1×1019原子/立方厘米的范围内促成结晶。
11.一种具有至少一个薄膜晶体管的半导体器件，所述薄膜晶体管包括：
一沟道区，包含多个形成在一绝缘表面上的结晶硅；
源区和漏区，两者之间夹有所述沟道区；
一栅绝缘膜，毗邻所述沟道区；和
一栅极，毗邻所述栅绝缘膜；
其特征在于，所述每个结晶硅的轴线平行于所述绝缘表面。
12.如权利要求11所述的半导体器件，其特征在于，所述沟道区经过加氢处理。
13.如权利要求11所述的半导体器件，其特征在于，所述沟道区包含催化元素，用于在浓度不高于1×1019原子/立方厘米的范围内促成结晶。
14.如权利要求13所述的半导体器件，其特征在于，所述催化元素选自由镍、钯、铂、铜、银、金、铟、锡、磷、砷和锑组成的元素群的物质。
CNB981209785A 1993-10-29 1998-10-12 半导体器件 Expired - Lifetime CN1149639C (zh)

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US6998639B2 (en) 2006-02-14
US6335541B1 (en) 2002-01-01
TW264575B (zh) 1995-12-01
US5643826A (en) 1997-07-01
CN1143362C (zh) 2004-03-24
US20060131583A1 (en) 2006-06-22
EP0651431A3 (en) 1995-06-07
CN1110004A (zh) 1995-10-11
KR100273831B1 (ko) 2001-01-15
EP0651431B1 (en) 2002-03-13
US6285042B1 (en) 2001-09-04
CN1223459A (zh) 1999-07-21
US20090035923A1 (en) 2009-02-05
KR100273827B1 (ko) 2001-01-15
US20120034766A1 (en) 2012-02-09
EP1158580A2 (en) 2001-11-28
CN1238553A (zh) 1999-12-15
CN1054943C (zh) 2000-07-26
EP0651431A2 (en) 1995-05-03
US20020053670A1 (en) 2002-05-09
DE69430097T2 (de) 2002-10-31
KR100297315B1 (ko) 2001-11-03
EP1158580A3 (en) 2004-07-28
DE69430097D1 (de) 2002-04-18

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