CN1189760A - 印刷电路板和电子元件 - Google Patents
印刷电路板和电子元件 Download PDFInfo
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- CN1189760A CN1189760A CN97126319A CN97126319A CN1189760A CN 1189760 A CN1189760 A CN 1189760A CN 97126319 A CN97126319 A CN 97126319A CN 97126319 A CN97126319 A CN 97126319A CN 1189760 A CN1189760 A CN 1189760A
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Abstract
一种印刷电路板具有:具有第一通路孔的基底材料层;以及具有第二通路孔的绝缘层,绝缘层设在基底材料层的一个表面上,其中第二通路孔的截面积小于所述第一通路孔的截面积,第一和第二通路孔填充有导电材料。
Description
本发明涉及具有两层或更多层的印刷电路板以及电子元件。
近几年,随着电子设备变得更小而紧凑,无论是在工业设备领域,还是消费品设备领域中,都强烈需求廉价的多层印刷电路板(其中可高度密集地安装半导体芯片诸如LSI)。在这种多层印刷电路板中,把层上间距精细的互连图案高度可靠地作层间电气连接是很重要的。
就此需求而言,利用常规的印刷电路板制造方法(对涂敷铜的叠层或镀层进行钻孔、蚀刻)来满足需求是极其困难的,因此正在开发具有新结构的印刷电路板。
当前,高密度印刷电路板的代表例子包括:
第一个例子是一种叫做拼装工艺的方法,其中把常规的双面或多层印刷电路板用作核心板,在其上层叠具有较小通路孔和较精细布线层的绝缘层(见SusumuHonda在Magazine of Japan Institute for Interconnecting and Packaging ElectronicCircuits,Vol.11,No.7,pp.462-468(1996)中的“拼装多层印刷电路板技术的当前情况和问题”一文)。依据此方法,通过利用光致抗蚀性绝缘材料或可化学蚀刻材料的光刻或化学蚀刻,在绝缘层中形成用于较小通路孔的小孔。近来,已开发了使用等离子体或激光器在绝缘层上形成孔的方法。在使用激光器时,所使用的材料不必具有光致抗蚀性或可化学蚀刻的性能,从而可在较宽的范围内选择绝缘材料。
第二个例子是在聚酯胶片(prepreg)(具有填充了导电糊的孔)上层叠铜箔的堆叠工艺(见Hiroyuki Okano在1995 Microelectronics Symposium,p.163(1995)中的“以具有IVH结构的所有层涂敷多层电路板”一文)(一般,这类电路板常常被归类于拼装多层印刷电路板)。已对具有粘合剂的薄膜代替聚酯胶片的电路板进行了研究(见Keiichi Takenouchi等人在Papers Presented at the Tenth Lecture Meeting onInterconnecting and Packaging Electronic Circuits,pp.81-82(1996)中的“聚酰亚胺多层电路板的开发”一文)。
第三个例子是使用薄膜多层电路板的方法,它类似于第一个例子所述的拼装工艺。这是一种薄膜多层电路板,其中把常规的陶瓷多层电路板用作核心板,在其表面上层叠通过电镀和光刻等构图的无机或有机绝缘层和导电布线层。目前,使用薄膜技术的本方法是制造最密集的印刷电路板的方法。对于绝缘层,最常使用光致抗蚀的聚酰亚胺。
然而,这些印刷电路板制造方法存在缺陷。
依据拼装工艺,因为把常规的低密度环氧玻璃多层电路板用作内层的核心,因此难于获得较密集的印刷电路板。此外,为了获得更密集的印刷电路板,必须增加所拼装的绝缘层和布线层的数目,从而在技术上难于平整印刷电路板的表面,或者增加了成本。
依据堆叠工艺,难于以低成本在具有较高密度用厚度的聚酯胶片或薄膜(基底材料)上形成小孔。
依据使用薄膜工艺的薄膜多层方法,成本也很高。
考虑到常规多层印刷电路板制造方法的这些问题,本发明的一个目的是提供一种印刷电路板制造方法,其中很容易以低成本制造高密度的印刷电路板,并可使用具有最大工作尺寸的核心板。
为了实现上述目的,依据本发明的印刷电路板包括具有第一通路孔的基底材料层和具有第二通路孔的绝缘层,所述绝缘层设在所述基底材料层的至少一个表面上,其中所述第二通路孔的截面积小于所述第一通路孔的截面积,所述第一和第二通路孔填充有导电材料。由于这些特征,可在具有大工作尺寸的印刷电路板中实现精细布线和精细通路孔连接,从而获得低成本的印刷电路板和电子元件。
权利要求1的本发明的印刷电路板包括:具有第一通路孔的基底材料层;以及具有第二通路孔的绝缘层,所述绝缘层设在所述基底材料层的至少一个表面上,其中所述第二通路孔的截面积小于所述第一通路孔的截面积,所述第一和第二通路孔填充有导电材料。
依据权利要求1所述的本发明的印刷电路板,所述导电材料是导电糊。
依据权利要求2所述的本发明的印刷电路板,填充所述第一通路孔的所述导电材料与填充所述第二通路孔的所述导电材料是相同的。
依据权利要求2所述的本发明的印刷电路板,填充所述第一通路孔的所述导电材料与填充所述第二通路孔的所述导电材料不同。
依据权利要求1所述的本发明的印刷电路板,所述绝缘层设在所述基底材料层的两面上。
依据权利要求1所述的本发明的印刷电路板,在所述绝缘层外部设有布线部分。
依据权利要求1所述的本发明的印刷电路板,在所述绝缘层的内部设有布线部分。
依据权利要求7所述的本发明的印刷电路板,所述辅助绝缘层包括若干层。
本发明的多层印刷电路板层叠了若干依据权利要求1到8中任一项的所述印刷电路板。
本发明的电路元件安装单元所安装的电路元件连接到依据权利要求1到8中任一项的所述印刷电路板最外层上的所述布线部分,或连接到依据权利要求9的所述多层印刷电路板最外层上的所述布线部分。
依据权利要求10所述的本发明的电路元件安装单元,所述电路元件包括裸露的集成电路。
本发明的电子元件组合件包括:具有第一通路孔的基底材料层,所述基底材料层具有附加到一个表面的铜箔焊接区(pad);具有第二通路孔的绝缘层,所述绝缘层设在所述基底材料的另一个表面上;以及电子元件,具有对应于所述第二通路孔位置的电极,其中所述第二通路孔的截面积小于所述第一通路孔的截面积,所述第一和第二通路孔填充有导电材料。
依据权利要求12所述的本发明的电子元件组合件,所述导电材料是铜糊。
依据权利要求12到13中任一项所述的本发明的电子元件组合件,所述导电糊包括研磨剂。
依据权利要求12到14中任一项所述的本发明的电子元件组合件,所述铜箔焊接区并不存在,填充第一和第二通路孔的所述导电材料是可焊接的。
依据权利要求12到15中任一项所述的本发明的电子元件组合件,所述绝缘层和所述导电材料具有挠曲性。
依据权利要求12到16中任一项所述的本发明的电子元件组合件,所述电子元件的所述电极是铝电极。
本发明的印刷电路板制造方法包括:
第一步骤,在具有第二通路孔的绝缘层上形成布线层;以及
第二步骤,把所述绝缘层和所述布线层转移到具有第一通路孔的基底材料层上,所述第一通路孔填充有导电材料,所述第一通路孔的截面积大于所述第二通路孔的截面积。
依据权利要求18所述的本发明的印刷电路板制造方法,在所述第一步骤中,所述第二通路孔填充有导电糊。
本发明的印刷电路板制造方法包括在基底材料层上层叠绝缘层并在所述绝缘层上形成布线层的步骤,所述基底材料层具有填充有导电材料的第一通路孔,所述绝缘层具有截面积小于所述第一通路孔截面积的第二通路孔。
本发明的电子元件组合件制造方法包括以下步骤:
在电子元件的一个表面上形成绝缘树脂层,在所述表面上具有预定电极;
在所述绝缘树脂层中形成通孔,使所述通孔对应于所述电极的位置;
把导电糊埋入所述通孔;以及
对填充有所述导电糊的所述绝缘树脂层进行加热和加压,从而把所述绝缘树脂层粘接到所述电子元件。
依据权利要求21所述的本发明的电子元件组合件制造方法,所述导电糊是铜糊。
依据权利要求21、22或23所述的本发明的电子元件组合件制造方法,所述导电糊包括研磨剂。
依据权利要求21、22或23所述的本发明的电子元件组合件制造方法,所述绝缘树脂层具有可压缩性。
依据权利要求24所述的本发明的电子元件组合件制造方法,所述绝缘树脂层是聚酯胶片,具有作为加固材料的聚芳香胺类无纺布。
图1是依据本发明一个实施例的双面印刷电路板的剖面图;
图2是双面印刷电路板的剖面图,其中在本发明该实施例的绝缘层内部设有布线层;
图3示出一个实施例,其中绝缘层只设在本发明该实施例的基底材料的一个表面上;
图4是依据本发明一个实施例的多层印刷电路板(四层印刷电路板)的剖面图;
图5示出通过转移工艺制造的使用本发明一个实施例的电路板的电路元件安装单元;
图6示出本发明的多层印刷电路板的另一个实施例;
图7示出依据本发明一个实施例的转移媒体的一个例子;
图8示出依据本发明一个实施例的转移工艺的一个例子;
图9示出依据本发明一个实施例的转移媒体的一个例子;
图10是通过使用图9的转移媒体而制造的双面印刷电路板的剖面图;
图11示出用于本发明一个实施例的可挠曲印刷电路板;
图12是依据本发明一个实施例使用可挠曲印刷电路板的双面电路板的剖面图;
图13示出依据本发明一个实施例的拼装工艺的一个例子;
图14示出具有本发明的一个实施例中所使用的具有绝缘层的铜箔;
图15示出使用图14的铜箔的一个工艺;
图16示出依据本发明一个实施例用于制造多层印刷电路板的方法的一个例子;
图17示出依据本发明一个实施例的转移媒体;
图18示出通过制备图17所示的两个转移媒体所制造的双面印刷电路板;
图19示出依据本发明一个实施例的小尺寸封装诸如半导体芯片的一个例子;
图20是图19的透视图;以及
图21示出依据本发明的一个实施例的小尺寸封装诸如半导体芯片的另一个例子。
下面,参照附图描述本发明的实施例。
(第一实施例)
图1是根据本发明的第一实施例的双面印刷电路板的剖面图。设有带有第一通路孔103的基底材料层101,在基底材料层101的每个表面上设有带有其截面积小于第一通路孔的第二通路孔105的绝缘层104。在通路孔105上设有通路焊接区106。标号107表示布线。线和通路焊接区构成布线层。由第一通路孔103和第二通路孔105电气连接上、下布线层107,并作为整体构成双面印刷电路板。
由于电路板具有这种结构,所以第二通路孔105的截面积很小。此外,虽然在绝缘层104上形成布线107,但由于第二通路孔105的尺寸很小,所以它的通路焊接区106可以很小,从而即使第一通路孔103具有较大的截面积,也可获得精细的印刷电路板,而与第一通路孔103的截面积无关。于是,即使布线间隔108很小,也不会发生由第一和第二通路孔103和105引起的短路。此外,由于如上所述第一通路孔103的截面积很大,也有助于印刷电路板的制造。
较佳的是,基底材料层101是电绝缘是,并具有作为电路板所需的机械强度。可以运用包括带有玻璃纤维作为加固材料的硬化环氧树脂的玻璃环氧板或包括带有聚芳香胺类纤维作为加固材料的硬化环氧树脂的聚芳香胺类环氧板。可以采用已知的树脂制成印刷电路板。
用导电材料填满包括第一通路孔103和第二通路孔105的通路孔102。作为导电材料,可以采用在树脂中混合有铜粉和银粉的硬化导电糊,或金、银、铜、铅等或它们的合金。
用来填满第一通路孔103的导电材料和用来填满第二通路孔105的导电材料可以是相同,也可以是不同的。对于填满具有不同直径的通路孔来说,最好用不同的材料。
虽然在图1绝缘层104的外部形成布线层107但也可(如图2所示)在图1双面电路板201的外部形成绝缘层202,从而布线层107位于整个绝缘层(包括绝缘层104和绝缘层202)的内部。当制造多层印刷电路板时,如图2所示的结构是十分有效的。在表面中形成的孔203作为通孔,用以连接上、下层。可以任意决定孔023的截面积。当把绝缘层用作表面层时,绝缘层202是焊接树脂层。下面,描述制造具有图1和2结构的印刷电路板的方法。
图3示出其中只把绝缘层304设置在基底材料层301的一个表面上的实施例。标号303表示第一通路孔。标号305表示具有较小截面积的第二通路孔。通路焊接区306和布线307构成布线层。由于绝缘层304防止布线307与具有较大截面积的第一通路孔303短路,所以能获得精细的布线。
在上述实施例中所提供的绝缘层不但能够使布线精细,而且对于保证布线307的胶黏强度也是十分有效的。
图4示出根据本发明的多层印刷电路板(四层印刷电路板)的剖面图。两个双面印刷电路板401与图2所述的相同。通过具有通路孔403的基底材料层402,机械并电气连接两个双面印刷电路板401。通路孔403包括设置在基底材料层402中的第一通路孔404和设置在绝缘层406中并具有比第一通路孔404小的截面积的通路孔405。作为用于基底材料层和通路孔的材料,可以采用与图1所述的相同的材料。
作为上、下双面印刷电路板401,并不是经常需要运用具有根据本发明结构的双面印刷电路板。例如,图6示出四层印刷电路板的剖面图,其中把根据该实施例的印刷电路板结构施于常规双面印刷电路板。标号501表示常规通路孔玻璃环氧双面印刷电路板。通过通路孔511,电气连接在两个表面上的布线512。虽然,一般通路孔的内部510是空的,但在这个实施例中用树脂填满通路孔511。通过具有通路孔503的基底材料层502,机械和电气连接两个常规双面电路板501。通路孔503包括设置在基底材料层502中的第一通路孔504和设置在绝缘层506中并具有比第一通路孔504小的截面积的通路孔505。作为基底材料层和通路孔的材料,可以采用与图1所述的相同的材料。
虽然,参照图4和6描述四层印刷电路板,但应理解本发明并不局限于此。可以类似的结构层叠更多层。
下面,描述制造根据本发明的上述实施例的印刷电路板的方法。
首先,描述运用转移技术的制造方法。这种方法运用如图7所示的转移媒体。在支撑架601的表面上(处理该表面使其可剥离),形成布线层,从而布线层107包括通路焊接区106。通过运用电镀术、蒸发和光学处理的布线形成处理,执行该形成过程。在布线层上,形成具有作为第二通路孔的孔602的绝缘层104。然后,制备具有这种结构的转移媒体603。具体地说,在由不锈钢制成的支撑架上形成通过电镀术形成的铜图案。
制备两个这样的转移媒体,把具有孔(它作为第一通路孔并由导电糊填满)的非硬化基底材料层701夹心在如图8所示的转移媒体之间。然后,在真空中对其加压并加热,以硬化导电糊和集成用的基底材料层(图8A)。然后,剥去支撑架(图8B)。例如,作为未硬化基底材料层701,可以运用聚芳香胺类环氧聚酯胶片(它是带有环氧树脂的聚芳香胺类无纺布)。作为导电糊,可以运用铜糊。可以用激光形成孔,或用钻子机械形成孔。对于孔的大小,当非硬化基底材料层的厚度大约为150μm时,容易形成直径从100μm到300μm的孔。当加压并加热时,压缩内部具有多个空腔的聚芳香胺类环氧聚酯胶片,从而基底材料层的厚度减小(如图8B所示)。此时,铜糊和第一通路孔构成第二通路孔。实际上,也会出现在图8的部分703处挤出铜糊的情况。可以使导电糊702突出于聚酯胶片的表面。
另一种方法是在下侧第二通路孔上形成包括硬化导电糊的圆锥形突出部分,而且把该突出物导体与穿透由软化树脂制成的基底材料层的上侧第二通路孔相连。
虽然,在上述实施例中把聚芳香胺类环氧聚酯胶片用作非硬化基底材料层,但是本发明并不局限于此。例如,可以用包括覆盖有粘合剂的绝缘薄膜的薄片,或者可以用薄片型粘合剂。导电糊并不局限于铜糊。例如,可以用金、银或碳等的导电糊。
此外,不必只用导电糊填满第一通路孔。例如,可将金属球嵌入孔中,从而由导电糊(用它来填满第二通路孔)形成电气连接。
当图7的布线107和通路焊接区106必须精细时,通过附加处理可以形成它们。即,在电镀之前,在支撑架601的表面上形成图案电镀抗蚀层,而且在导电支撑架的暴露部分上沉积电镀薄膜。根据这种方法,可以获得精密且具有较厚薄膜厚度的图案。通过印刷导电糊可以形成布线和通路焊接区。这是一种非常容易的方法。在转移的时进行加压和加热的情况下,导电率比在只通过加热进行硬化的情况下的导电率要高。
通过采用如图9所示的转移媒体,保证在第一通路孔和第二通路孔之间的电气连接。标号801表示用来填满第二通路孔的导电糊。通过印刷可以形成导电糊801,不用说,通过采用电镀和制作布线图案技术也可形成导电糊。在运用如图9所示的转移媒体的情况下,比起如图7所示的转移媒体,大大排除了导电糊流入小尺寸的第二通路孔的困难度。图10是通过运用如图9所示的转移媒体所制成的双面印刷电路板的剖面图。虽然,在这个电路板中第一通路孔的导电材料和第二通路孔的导电材料有所不同,但不用说它们也可以是相同的。在图10中,在双面印刷电路板上的上、下图案相互位置被偏移了。这说明在该实施例中,上、下图案的位置对准是不精确的。即,由于在本实施例中可以形成大第一通路孔,所以即使图案位置互相稍有偏移,连接条件还是十分良好的。既然图案位置可被互相稍有偏移,就使能形成具有较大工作尺寸的电路板并通过最后划分它获得成品(虽然,在具有较大工作尺寸的电路板中通路孔趋于互相偏移位置,但在即使通路孔互相稍有位置偏移(与本实施例类似)也能提供确保连接的足够大的工作尺寸的电路板)。于是,本发明具有这样的优点,即,虽然图案和通路孔是精密的,但能制成具有大工作尺寸的电路板。
接着,描述软印刷电路方法作为根据本发明的另一种制造方法。图11示出包括绝缘层1001和布线1002的软印刷电路板。绝缘层1001包括薄膜,并通常运用聚芳香胺类薄膜。布线1002包括通过光刻制成图案的铜箔。孔1003作为第二通路孔。通过运用激元激光可以容易地形成这样的孔。除了孔的大小,这种结构的电路板以TAB带而闻名。图12示出根据采用软印刷电路板的本实施例的双面印刷电路板的剖面图。
接着,图13示出作为根据本发明制造方法的组装工艺。其中把层相继层叠在基底材料层上。在该过程中,采用已经被硬化的基底材料层1201,它具有已经被硬化的第一通路孔。在基底材料层1201的上、下表面上形成具有第二通路孔1203的绝缘层1204,而且通过电镀或另一种导电薄膜形成法形成布线1205。在这种结构中,用来填满第二通路孔的导电材料与用来填满第一通路孔的导电材料不同。
如图14和15所示的处理类似于软印刷电路法,只是制造步骤次序不同。如图14所示,在铜箔1301上制备具有作为第二通路孔的孔1302的上、下绝缘层1303,而且把非硬化基底材料层(其中,用非硬化导电糊填满作为第一通路孔的孔)插入其中。对叠层加压并加热,以使集成用的基底材料层和导电糊硬化(图15A)。然后,通过蚀刻给在表面上的铜箔制成图案以获得双面电路板(图15B)。
图16示出制造多层印刷电路板的方法。制备参照图2所述的两个双面印刷电路板1501,而且把非硬化基底材料层1502(其中,用导电糊填满作为第一通路孔的孔)夹在其中。在真空中,对叠层加压并加热(图16A),从而硬化导电糊和基底材料层用以集成(图16B)。然后,制造四层印刷电路板。容易制造包括多层的印刷电路板,而且印刷电路板是双面的。通过在每个表面上再层叠一双面印刷电路板,实现六层印刷电路板,而且通过层叠两个四层印刷电路板,实现八层印刷电路板。
如图17所示的转移媒体是对于根据另一种模式制造双面印刷电路板有效的转移媒体。将脱模处理施于支撑架1601的表面,而且在表面上形成绝缘层1602。然后,形成必要孔1606,而且层叠包括导电薄膜的布线1603。然后,形成作为第二通路孔的孔1605。于是,形成转移媒体。通过制备两个这样的转移媒体并以与参照图7所述类似的方法制造双面印刷电路板,实现如图18所示的双面印刷电路板。双面电路板的表面是平的。
图5示出运用根据本发明通过转移处理制造的电路板的电路元件安装单元。标号407表示裸芯片。标号408表示凸起。标号409表示下垫板。标号410表示图4的多层印刷电路板。由于印刷电路板的表面很平,虽然电路元件安装单元高密度和小尺寸,但它还是很便宜,而且没有焊桥,产品是极好的。特别是,电路元件安装单元(其中,根据本发明,裸LSI是焊接在印刷电路板上的倒装晶片)是小尺寸、高速度和便宜的。
图19是根据本发明的另一个实施例的电子元件(诸如,半导体芯片)组合件的剖面图。从顶部到底部层叠下列元件:在其一个表面上设有铜箔焊接区1706并具有第一通路孔1707的基底材料层1704;具有第二通路孔1708并设置在基底材料层1704的另一个表面上的绝缘层1703;和具有电极1702以与第二通路孔1708的位置相对应的半导体芯片1701。第二通路孔1708的截面积小于第一通路孔1707的截面积。用导电材料1705填满第一和第二通路孔。在半导体芯片的情况下,输入和输出焊接区(电极)1702一般是铝电极。由绝缘树脂制成基底材料层1704。绝缘-与-保护薄膜(insulation-cum-protective film)1703是在半导体芯片上的绝缘-共-保护薄膜(insulation-com-protect film),而且一般是由氮化硅制成。最近,经常使用涂有聚芳香胺类的碳化硅薄膜。
由于绝缘树脂用作基底材料层,所以现在已知许多种类的树脂。在该领域中广泛用到环氧树脂。对于孔的形成,提供一些具有光敏性的树脂。由于现在可将激光用于形成孔,因而树脂的选择范围扩大。由于将树脂用作电子元件,因而具有低吸湿性的树脂是最理想的。已经开发出多种此类树脂。此外,作为与半导体相接触的树脂,最好是具有低杂质含量的树脂。虽然,热膨胀系数最好接近于硅的热膨胀系数,但由于不存在具有这种热膨胀系数的简单材料,所以通常混合充填物。
为了在铝电极和导电材料之间良好的电气连接,需要除去在铝电极表面上的氧化物薄膜。在使导电糊与铝电极接触之前,通过反向溅射或还原处理,除去铝表面上的氧化物薄膜。
图19的组合件具有与半导体芯片相同的尺寸,而且由于它的小尺寸而且容易制造,所以它的成本很低。
图21示出组合件的另一个实施例。当导电糊1705是可焊接型时,可将组合件作为在图21所示的条件下可安装在印刷电路板上的组合件。图20是从底面看图19的印刷电路板的透视图。
作为可焊接导电糊1705,导电糊最好包括铜粉、树脂和硬化剂。铜粉的成分最好是85重量百分比或更高。可购得这种导电糊,它是可焊接的,而且在硬化后不用对其进行任何处理。即使在运用常规铜糊时,通过在硬化之后机械或化学去除在表面上的树脂,可以进行焊接。作为这种方法的简单例子,机械抛光表面,可以进行焊接。
本发明不一定要进行焊接。最近,经常尝试着把电子元件连接到具有导电糊的印刷电路板上,而不用进行焊接处理以避免铅污染。该组合件符号这种趋势。
制造具有如图19或21所示结构的组合件的简单方法包括这种方法,其中在绝缘树脂薄片中,在与电子元件的电极位置相对应的位置上形成通孔,把导电糊嵌入孔中并对其加压并加热,从而硬化导电糊以连接电子元件。
与此同时,通过把具有作为加固材料的聚芳香胺类无纺布的聚酯胶片用作绝缘树脂薄片,由于导电糊的压缩性,在加热和加压的同时压缩导电糊,从而在硬化糊后导电率增加。不用说,可将简单用作绝缘树脂薄片。由于在加热和加压的同时流入树脂,所以获得与压缩绝缘树脂薄片相同的效果。加压处理是十分重要的。此外,由于通过加热处理可使在铝电极上的氧化物薄膜裂开,所以可以省略预先进行的氧化物薄膜去除处理。为了有效地利用这一效果,最好在导电糊中掺入研磨剂。
应理解,可以在晶片中,而不是芯片中处理这种结构的组合件。在把晶片分成芯片之前进行预处理,随后划分晶片。因而组合件的成本大为降低。显而易见的是,制造具有本发明结构的印刷电路板的方法并不局限于上述制造方法。还有许多其它制造方法。一个例子是这种方法,即,把半导体晶片涂上绝缘树脂、通过加热硬化绝缘树脂、用激元激光在绝缘树脂中形成通孔,从而露出铝电极、用导电糊填满孔、加热并加压导电糊,而且抛光表面。
从上述实施例可见,本发明提供电路板,它包括具有第一通路孔的基底材料层和具有第二通路孔并至少设置在基底材料层的一个表面上的绝缘层,而且由于可形成精细互相连接的图案而且工作尺寸很大(虽然第一通路孔很大,但由于第二通路孔的截面积小于第一通路孔的截面积,因而工作尺寸很大),所以它很便宜。此外,由于在晶片中进行处理,所以可获得价廉的组合件。
Claims (25)
1.一种印刷电路板,包括:具有第一通路孔的基底材料层;以及具有第二通路孔的绝缘层,所述绝缘层设在所述基底材料层的至少一个表面上,其特征在于所述第二通路孔的截面积小于所述第一通路孔的截面积,所述第一和第二通路孔填充有导电材料。
2.如权利要求1所述的印刷电路板,其特征在于所述导电材料是导电糊。
3.如权利要求2所述的印刷电路板,其特征在于填充所述第一通路孔的所述导电材料与填充所述第二通路孔的所述导电材料是相同的。
4.如权利要求2所述的印刷电路板,其特征在于填充所述第一通路孔的所述导电材料与填充所述第二通路孔的所述导电材料不同。
5.如权利要求1所述的印刷电路板,其特征在于所述绝缘层设在所述基底材料层的两面上。
6.如权利要求1所述的印刷电路板,其特征在于在所述绝缘层外部设有布线部分。
7.如权利要求1所述的印刷电路板,其特征在于在所述绝缘层的内部设有布线部分。
8.如权利要求7所述的印刷电路板,其特征在于所述绝缘层包括若干层。
9.一种多层印刷电路板,其特征在于层叠了若干如权利要求1到8中任一项所述的印刷电路板。
10.一种电路元件安装单元,其特征在于所安装的电路元件连接到如权利要求1到8中任一项所述的印刷电路板最外层上的所述布线部分,或连接到如权利要求9所述的多层印刷电路板最外层上的所述布线部分。
11.如权利要求10所述的电路元件安装单元,其特征在于所述电路元件包括裸露的集成电路。
12.一种电子元件组合件,包括:具有第一通路孔的基底材料层,所述基底材料层具有附加到一个表面的铜箔焊接区;具有第二通路孔的绝缘层,所述绝缘层设在所述基底材料的另一个表面上;以及电子元件,具有对应于所述第二通路孔位置的电极,其特征在于所述第二通路孔的截面积小于所述第一通路孔的截面积,所述第一和第二通路孔填充有导电材料。
13.如权利要求12所述的电子元件组合件,其特征在于所述导电材料是铜糊。
14.如权利要求12到13中任一项所述的电子元件组合件,其特征在于所述导电糊包括研磨剂。
15.如权利要求12到14中任一项所述的电子元件组合件,其特征在于所述铜箔焊接区并不存在,填充第一和第二通路孔的所述导电材料是可焊接的。
16.如权利要求12到15中任一项所述的电子元件组合件,其特征在于所述绝缘层和所述导电材料具有挠曲性。
17.如权利要求12到16中任一项所述的电子元件组合件,其特征在于所述电子元件的所述电极是铝电极。
18.一种印刷电路板制造方法,其特征在于包括:
第一步骤,在具有第二通路孔的绝缘层上形成布线层;以及
第二步骤,把所述绝缘层和所述布线层转移到具有第一通路孔的基底材料层上,所述第一通路孔填充有导电材料,所述第一通路孔的截面积大于所述第二通路孔的截面积。
19.如权利要求18所述的印刷电路板制造方法,其特征在于在所述第一步骤中,所述第二通路孔填充有导电糊。
20.一种印刷电路板制造方法,其特征在于包括在基底材料层上层叠绝缘层并在所述绝缘层上形成布线层的步骤,所述基底材料层具有填充有导电材料的第一通路孔,所述绝缘层具有截面积小于所述第一通路孔截面积的第二通路孔。
21.一种电子元件组合件制造方法,其特征在于包括以下步骤:
在电子元件的一个表面上形成绝缘树脂层,在所述表面上具有预定电极;
在所述绝缘树脂层中形成通孔,使所述通孔对应于所述电极的位置;
把导电糊埋入所述通孔;以及
对填充有所述导电糊的所述绝缘树脂层进行加热和加压,从而把所述绝缘树脂层粘接到所述电子元件。
22.如权利要求21所述的电子元件组合件制造方法,其特征在于所述导电糊是铜糊。
23.如权利要求21、22或23所述的电子元件组合件制造方法,其特征在于所述导电糊包括研磨剂。
24.如权利要求21、22或23所述的电子元件组合件制造方法,其特征在于所述绝缘树脂层具有可压缩性。
25.如权利要求24所述的电子元件组合件制造方法,其特征在于所述绝缘树脂层是聚酯胶片,具有作为加固材料的聚芳香胺类无纺布。
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-
1997
- 1997-12-23 DE DE69725689T patent/DE69725689T2/de not_active Expired - Lifetime
- 1997-12-23 US US08/997,624 patent/US6192581B1/en not_active Expired - Lifetime
- 1997-12-23 EP EP97122824A patent/EP0851724B1/en not_active Expired - Lifetime
- 1997-12-23 EP EP02013314A patent/EP1250033B1/en not_active Expired - Lifetime
- 1997-12-23 DE DE69730629T patent/DE69730629T2/de not_active Expired - Lifetime
- 1997-12-26 KR KR1019970073891A patent/KR100338908B1/ko not_active IP Right Cessation
- 1997-12-26 CN CN97126319A patent/CN1116790C/zh not_active Expired - Lifetime
-
1999
- 1999-08-10 US US09/371,603 patent/US6281448B1/en not_active Expired - Lifetime
-
2000
- 2000-06-12 JP JP2000175838A patent/JP3429734B2/ja not_active Expired - Lifetime
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EP0851724A2 (en) | 1998-07-01 |
DE69725689T2 (de) | 2004-04-29 |
EP0851724A3 (en) | 2000-09-27 |
CN1116790C (zh) | 2003-07-30 |
DE69725689D1 (de) | 2003-11-27 |
DE69730629D1 (de) | 2004-10-14 |
US6281448B1 (en) | 2001-08-28 |
EP0851724B1 (en) | 2003-10-22 |
US6192581B1 (en) | 2001-02-27 |
KR19980064661A (ko) | 1998-10-07 |
DE69730629T2 (de) | 2005-02-03 |
EP1250033B1 (en) | 2004-09-08 |
EP1250033A3 (en) | 2003-01-02 |
JP2001028483A (ja) | 2001-01-30 |
KR100338908B1 (ko) | 2002-11-30 |
JP3429734B2 (ja) | 2003-07-22 |
EP1250033A2 (en) | 2002-10-16 |
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