CN1194059A - 用于粘合电子器件的可变形基片部件 - Google Patents

用于粘合电子器件的可变形基片部件 Download PDF

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CN1194059A
CN1194059A CN96196568A CN96196568A CN1194059A CN 1194059 A CN1194059 A CN 1194059A CN 96196568 A CN96196568 A CN 96196568A CN 96196568 A CN96196568 A CN 96196568A CN 1194059 A CN1194059 A CN 1194059A
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Prior art keywords
substrate
adhesive
boss
lines
poly
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彼得·B·霍格通
肯尼斯·E·卡尔森
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3M Co
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Minnesota Mining and Manufacturing Co
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Publication of CN1194059A publication Critical patent/CN1194059A/zh
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Abstract

本发明涉及一种用于微电子元件(10)的可变基片部件(20),它包括在其一表面上的上有可延展电路线条(22)的阵列。当电子元件粘合到基片部件上,而元件上的接合件(16)接触线条时,基片具有允许各个接合件使线条局部延展直至线条陷入基片表面内的材料属性。

Description

用于粘合电子器件的可变形基片部件
发明背景
发明领域
本发明涉及微电子部件及它们的生产方法。更具体地说,本发明涉及一种微电子部件,该部件中的一个微电子元件被接合到基片部件上,并且把元件上的接合位置与基片部件上相应的接合位置电气连。再具体地说,本发明涉及一种用于微电子元件的可延展的基片部件(在其表面上有一可延展的金属电路线条的阵列)。当电子元件被接合到基片部件上,且元件的接合件接触到线条时,基片具有允许各个接合件使线条局部延展直至线条陷入基片表面的材料属性。
相关技术的描述
目前在微电子技术中一个重要问题是,将更多的集成电路器件连同它们相关的互连电路装配到更小的空间内的复杂课题。增加的器件密度需要基片上的被更接近(间距小)的电路线条的厚度更薄。对更高的信息流速度的需要还要求更高的信号频率。为适应这些需要,使用倒装直接世道睛附着法(FDCA)直接将芯片附着在电路板上,并在元件之间提供了可得到的最短的路径长度,从而使高频时的信号传播延迟减到最小。
FDCA中使用的最普遍的附着方式是焊料凸台/倒装芯片互连。用于焊料凸台/倒装芯片互连的传统的技术是控制熔化高度芯片连接技术(“4C”),这种方式中,金属焊料连接提供了芯片和基片之间的机械和电气连接。只有有限数量的基片材料和芯片设计可以通过C4技术得到可靠的电气连接。另外,再流焊连接处的形状和高度(对于可靠性能而言很严格)需要使用精细、昂贵、而且工艺细致的凸缘层冶金术(Pad Layer Metallurgy),PLM工艺。C4工艺具有固有的工效限制,并且不能适应基片的缺点,例如平滑度和弯曲度。芯片和基片之间热膨胀系数(CTE)不一致在C4工艺的再流焊连接处导致了较高的切应力,这会影响互连的可靠性。见R.R.Tummala和E.J.Rymaszewski,Microelectronics Packaging Handbook(VanNorstrand Reinhold,1989),pp.280-309,366-391,和K.Nakamura,NikkeiMicrodevices,June 1987。灾难性的失败是任何在焊接连接处发生的开裂的直接结果,这种开裂是那些较高的切应力的反应。焊料凸台接合中固有的缺点需要现有技术中对FDCA和其它应用提供可靠互连的另一种方法。
一种方法包括使用可以因化或不可因化的热接合粘合剂,以提供密切的机械的倒装芯片接合,并提供与基片用压力的而不是冶金的电气互连接。粘合剂中的导电微粒或芯片上的金属凸台,提供了这种方法的电气互连的媒介。媒介中需要热和/或固化收缩应力以建立用压力的接触。
在图1A和图1B中描述的粘合剂接合工艺中(颁给Hatada的第4,749,120号美国专利),通过(1)在有凸起的器件10和板16之间分配绝缘的粘合剂树脂22;(2)将器件上的凸台14与相应的布线图案20上的接合位置对准;(3)用工具24施加压力,从而凸台14和布线图案20被压在一起;(4)施加光或热28使绝缘树脂22变硬;(5)树脂22变硬之后除去压力,而将电子元件10上被称为凸台的金属结合位置电气连接到布线板16上的电路布线图案20。
在颁给Hatada的‘120专利的图2所示的另一个实施例中,把一种柔软的熔化温度较低的金属30施加在凸台14和布线图案20之间。如果器件10暴露在极端温度或机械力下,Hatada的专利在第4列第49-58行处说明了金属30将作为吸收体,以保持凸台14和布线板16之间的电气连接。
Hatada的工艺依赖于粘合剂收缩,不是焊料再流,以在凸台和布线板上的电路之间建立电气连接。因此,粘合剂接合工艺提供了细间距连接和避免许多和C4C处理相关联的困难的可能性。粘合剂的收缩产生用压力的连接,它遭受的应力小于从再流焊得到的。另外,粘合剂包住连接处,并提供了抵抗环境和机械应力的保护。
不幸的是,消除焊料再流的步骤将不提供适应凸台厚度变化、基片上线条的厚度变化,基片弯曲和接合压力分布不均匀等缺点的机制。Hatada在’120专利的第1列中指出,象电路板平坦度之类的缺点会影响在C4工艺中焊接连接的可靠性。考虑到刚性的高模数材料(玻璃、陶瓷、树脂或金属,见Hatada的第3列,第37-41行)在其工艺中用作基片,具有相对较低的屈服应力的金属(Au、Ag、Cu、焊料)被用作凸台材料,则很清楚,即,凸台的的塑性延展必需补偿所述的缺点,而且保持电气连接的可靠性。但是,凸台的塑性延展常常需要不可接受的较高的接合力。另外,加速可靠性试验表明Hatada所述的用压力的连接典型地具有有限的能力以适应粘合剂本体中的松弛和应变。如果集成电路器件的高密度阵列要被可靠地电气连接到电路结构,当容许减小接合力时,粘合的电路元件必需设计得能适应凸台厚度和跨过接合区的接合压力的改变。
发明内容
本发明涉及“倒装芯片”的电气连接,该连接中有一个未封装的电子器件,诸如一个集成电路器件(IC)被面朝下地直接安装到可变基片表面上的电路结构上。用接合剂组分建立及维持IC上的接合件与电路结构之间的电气连接。本发明者已经发现,在接合电子电路部件中由IC上的接合件高度的变化、基片上电路结构高度的变化,基片翘曲及在IC到电路结构的接合过程中压力分布中的不均匀性所引起的对电气连接的有害效果,可以通过在IC接合件接触在基片上的电路结构的位置处提供局部可延展的一种电路基片材料而减到最小。
在一个方面,本发明提供了一种用于安装接合微电子器件的基片部件,该部件包含一可变基片,在基片的表面上有可延展的金属电路线路。在接合操作中,当IC器件上的接合件接触线条时,本发明的基片具有可允许各个接合件使线条各局部延展,直至互连的粘合件及线条陷入到基片表面下一预定的深度的材料属性。基片中这种局部的延展在IC接合件及电路线条之间产生一种“擦拭作用”,导致在它们之间形成紧密而具有高度完整性的电气连接。另外,基片中的形变适应接合件的高度变化及跨过接合区域的接合压力的变化,而在电气接触点的周围的材料内并不产生过度的应力。
制造本发明的基片所使用的材料必需在接合温度下局部延展,从而使已由接合件使之延展的电路线条陷入到基片表面内一预定的深度,以在接合件及线条之间形成可靠的电气连接。更可取的,本发明的可变基片由一种聚合物材料制成,这种材料的璃态转变温度(Tg)低于处理用粘合剂接合所述部件的温度(这里称为“接合温度”)。另外,制造基片所使用的聚合物材料在接合温度的压缩屈服强度最好低于在接合温度下IC上的接合件的屈服应力。这可以用比现有技术中对所述的刚性基片所需的接合力更小的接合力建立高度完整性的接合。
设置在基片表面上的电路图案线条必需由可延展的金属材料制成,其厚度足够允许在接合温度下小规模/局部塑性形变而不会裂开。这些材料属性允许IC接合件最初地局部地使线条形变,然后在接合过程中将它们压到基片的表面内。
在另一方面,本发明提供了一种接合微电子电子电路部件,这种部件在IC和上述基片部件之间具有特别稳定而可靠的电气的互连。
本发明延及制造接合微电子电子电路部件的方法。在本发明的方法中,准备一个叠层状的构造,该构造包括一具有金属接合位置的电子器件、本发明的基片部件及粘合剂。金属接合位置与在基片部件上的电路图案线条对准,而粘合剂通过现有技术中已知的一种适当的方法变硬。接合力被提供给所述叠层以压迫接合位置与电路线条电气连接,从而线条延伸入基片表面内一预定的深度。
本发明的可变基片部件允许以低于传统的刚性基片所需的接合力形成高度可靠的倒装芯片连接。另外,本发明中使用的基片材料的可延展的性质适应IC接合位置和电路结构中的变化,而不形成局部应力区域(这会在粘合剂本体中在重复的松弛和应变之后危及IC与基片之间的电气连接)。
附图概述
图1A是本发明的工艺中所使用的元件的剖面示意图;
图1B是本发明的工艺的剖面示意图,示出IC凸台与在本发明的基片部件上的电路线条之间的互连;
图1C是本发明的工艺程序的剖面示意图,示出IC凸台与本发明的基片部件上的电路线条之间完整的接合;
图2A是示出了在例1中制备的电子电路部件的环境试验结果的图表;
图2B是示出了在例2中制备的电子电路部件的环境试验结果的图表;
图3A是示出了在例3中制备的电子电路部件的环境试验结果的图表;
图3B是示出了在例4中制备的电子电路部件的环境试验结果的图表;
图4是在接合过程之前,在3M-D120X的测试晶片上所照的放大倍数为500X的凸台的一截面的电显微镜照片;
图5A是可接合地连接到本发明的基片部件的MCC“细长”测试晶片(它是典型的电子器件)的放大倍数为18X的电子显微镜照片;
图5B是一组在图5A的测试晶片上的放大150X的电子显微镜照片;
图5C是在图5A的测试晶片上凸台放大400X的电子显微镜照片;
图5D是在图5A的测试晶片上凸台放大1500X的电子显微镜照片;
图6A是描述本发明的基片部件上电路线条的放大50X的电子显微镜照片,线条是在例1所述的结合过程之后与3M-D120X测试晶片上的凸台分开的;
图6B是描述3M-D120X测试晶片上的凸台放大50X的电子显微镜照片,它是在例1所述的接合过程之后与本发明的基片部件上电路线条分开的;
图7A是描述本发明的基片部件上的电路线条的放大100X的电子显微镜照片,它是在例1所述的不使用粘合剂的接合过程之后与3M-D120X测试晶片上的凸台分开的;
图7B以1000X示出了图7A的电路线条的一部分;
图7C是描述3M-D120X测试晶片上的凸台的放大100X的电子显微镜照片,它是在例1中所述的不使用粘合剂的接合过程之后,与本发明的基片部件上的电路线条分开的;
图7D以1000X示出了图7C的凸台的一部分;
图8A是图7A中被拉开的接合的放大190X的电子显微镜照片,其中样品被从垂直方向转过了70°;
图8B是图7C中被拉开的接合的放大200X的电子显微镜照片,其中样品被从垂直方向转过了70°;
图9A是描述本发明的基片部件上的电路线条的放大800X的电子显微镜照片,线条是在例1中所述的条接合过程之后与3M-D120X上的凸台分开的;
图9B是描述3M-D120X测试晶片上的凸台的放大800X的电子显微镜照片,它是在例1所述的接合过程之后,与本发明的基片部件上的电路线条分开的;
图10A是描述图7A的被拉开了的粘合剂的放大5000X的电子显微镜照片;
图10B是描述图7C的被拉开了的粘合剂的放大5000X的电子显微镜照片;
图11A是描述用133N的接合力接合到本发明的基片部件上的电路线条的凸台的截面图的放大500X的电子显微镜照片;
图11B是图11A的粘合剂放大1000X的电子显微镜照片;
图11C是描述用200N的接合力被接合到本发明的基片部件上的电路线条的凸台的截面图的放大500X的电子显微镜照片;
图11D是图11C的粘合剂放大1000X的电子显微镜照片;
图11E是描述用267N的接合力被接合到本发明的基片部件上的电路线条的凸台的截面图放大500X的电子显微镜照片;
图11F是图11E的粘合剂放大1000X的电子显微镜照片;
图12A-12D是描述例5中的接合器件的截面图的放大500X的电子显微镜照片;
图12E-12H是描述与图12A-12D器件相应的截面图放大200X的电子显微镜照片;
图12I是背散射模式的放大600X的扫描电子显微镜照片,显示了擦拭作用,在凸台边缘使电路线条各延展及伸展时发生该作用;及
图13是例5的八种测试模型的每一种的四探针连接电阻(范围及平均值)的图表。
较佳实施例的详细描述
在图1中描述的本发明的微电子电路部件的一个实施例中,显示了一个集成电路器件10(例如,一块IC芯片),该器件包含硅基底12,它具有至少一个附在其上的电极区。电极区14典型地由用铝、铬、铜等金属材料制成的多层的金属薄膜构成。将至少一个这里被称为凸台(bump)的金属接合件16固定到电极区14上,该接合件16超出电极区的表面向外延伸一距离为B(在本申请中被称为“凸台高度”,范围从大约3μm到大约40μm)以提供到IC芯片10的电气连接。金属凸台通常由如金、银、铜、焊料及它们相容的合金之类的金属材料制成。用熟知的光刻法及电镀法(这里不进一步详述)将电极区14及凸台16加到硅基底12上。
本发明的一种可变基片部件18包含了厚度为S的基片20,该基片的一个表面上有电路图案22。电路图案22由总厚度为T的可延展的金属线条的分布组成。线条可以由单一的基底层24构成,所述基底层为直接被加到基片上的铜、银、金、铝、焊料之类材料制成。可选地,可以将一层通常用金做的附加表面层26电镀到基底层24上,以防止基底层24的氧化。表面层26最好与IC芯片上的凸台材料一致,促进在相同的金属之间形成熔合。在本申请中,总厚度T指基底层24和附加表面层26(如果有)的组合厚度。
将绝缘的粘合剂材料30置于IC10与基片部件18之间。粘合剂可以置于IC底部表面上,或可以设置在基片部件18的表面上的电路图案22之上。粘合剂30可以是液体或薄片材料,并可以通过现有技术中熟知化学的交链的方法变硬。
如图1B中所示,在凸台16与电路线条22对准之后,向下的压力沿箭头40的方向被加到IC10上。当凸台16接触电路线条22后,把粘合剂30朝外推,并从金属凸台16和电路线条22之间的区域被基本上除去。然后,粘合剂通过例如加热之类的任何适当方式变硬。在接合温度,基片20变得在每一相互接合的凸台16和线条22之下的区域可局部延展。加到IC10上的压力导致凸台16压在接合件上、可延展线条22发生延展,且延展的线条22陷入基片20的表面内。在线条22延展后,凸台16的一部分也可能在基片20的表面之下。
如图1C中所示,由于接触凸台16的边缘并在其外围向上及在凸台周围移动,线条22通过同时地弯曲和伸展而发生延展。虽然不希望被任何理论所束缚,可以相信线条22的延展提供了局部的“擦拭作用”(wiping action),该作用将氧化从凸台的外围除去。线条22的延展还增加了线条22和凸台16之间的接触区域,提高了电气连接的质量及可靠性。根据加在IC和基片之间的接触力,线条22的延展还可以较轻微地使凸台16的边缘延展,这将进一步电气连接的质量。最后,相互接合的凸台16及线条22陷入基片20的表面内一预定的深度D,以保证在IC及电路结构之间建立了可靠的电气连接。
存在一个复杂的而且难以用公式表示的变量的内部关系,它定量地描述了当在凸台的周围被弯曲及伸展时可延展的金属电路线条的延展。虽然不愿被一种特殊的理论所束缚,本发明者相信,对于具有已知几何形状的凸台/线条的界面、接合力的指定值及给定的粘合剂,重要的变量包含基片的组分及线条的厚度。
本发明的基片20可以由任何一种在接合温度可足够地延展,使相互接合的线条22和/或凸台16在接合过程中陷入其表面以下一预定的深度,以形成可靠的电气连接的材料制成。本发明中的接合温度可以是任何不损害要接合到基片上的IC的温度,通常范围从大约50℃到大约200℃。接合温度较好是大约70℃到大约180℃,再更好是大约130℃到大约160℃。
基片最好由可延展的聚合物材料制成。在本发明中作为基片而有用的聚合物的玻璃化转变温度(Tg)低于接合温度。这里使用的“玻璃化转变温度”定义为在无定形的聚合物中发生二级相变的温度(实际上是一很窄的温度范围)。在Tg之上,聚合物是柔软、易延展、有弹力的材料,而在Tg以下,它们相反是坚硬、刚性的塑胶,就象玻璃那样。给定的无定形聚合物的未知Tg可以使用各种方法来确定,而且较好是差分扫描量热法(DSC)。
较佳的基片聚合物是那些Tg稍稍低于接合温度的材料。合适的可延展的聚合物的例子有(但不限于)聚(对苯二酸-乙二醇)(PET,Tg=大约342K),聚(1,4-萘二甲酸乙二醇酯),(1,4-PEN,Tg=大约337K),聚(1,5-萘二甲酸乙二醇酯),(1,5-PEN,Tg=大约344K),聚(2,6-萘二甲酸乙二醇酯),(2,6-PEN,Tg=大约386K),聚(2,7-萘二甲酸乙二醇酯),(2,7-PEN,Tg=大约392K),及间同规聚苯乙烯。一种特别值得推荐的基片材料是PET,通常知道在无定形状态它的Tg大约是342K。如果以晶状取导向薄膜的形式提供,则PET的Tg可以高到大约398K。
另一方面,这里使用的“可延展”描述了一种聚合物,在接合温度流动性足够好,以允许延展的电路线条陷入基片表面内至少大约1-2μm,最好2-5μm(见图1A中的深度D)。通常,基片被作为聚合物薄膜提供,该薄膜厚度为(见图1A中的S)大约10μm到大约100μm,最好是大约10μm到大约50μm,而且制造薄膜的材料应允许线条陷入基片至少大约5%的距离D/S。如果考虑凸台(见图1A中的B)的厚度,制造基片的材料应允许线条陷入凸台高度的至少大约3%到大约5%的距离D/B。
制造本发明的基片的聚合物在接合温度应具有压缩屈服强度,它小于在接合过程中由相互接合的凸台及线条经电路线条传送的压力。该参数是聚合物屈服的难易及在周围流动并离开在先相互接合的线条及凸台的程度。据报告PET薄膜的压缩屈服强度室温下通常为大约8,000到大约2,000PSI(55-140兆帕)。但是,对于在本发明中用作电路基片的,取向,晶态的,化学交链的,或玻璃纤维增强的聚合物的压缩屈服强度较难测量。在这种情况下,聚合物压缩强度(用温度规定为23℃+2℃的ASTM-695测量)可以作为压缩屈服强度的粗略指示。在本发明中有用的可变基片在室温下压缩屈服强度小于(MPa),在用ASTM-695测量时大约为175兆帕最好小于大约125MPa。
本发明中使用的聚合物可选地包含少量的填充物,例如粉末、颜料、片状粉末、碎纤维,等等,其浓度足够低从而填充物基本上不会影响聚合物的可延展性。
加到可变基片上用于形成本发明的基片部件的的电路线条由一种可延展的金属制成。这里使用的“可延展金属”定义为任何一种可以在本发明的接合温度及压力下塑性地发生延展而不会开裂的金属材料。本发明中有用的可延展的金属包含(但不限于)铜、金、银、铝、锡、铅、锌及它们的相容的合金。铜是较佳的线条材料。加至可变基片的可延展金属线条的厚度根据用途可以有很大变化,但是典型地,包含加到基底底层上以提供与凸台材料的相容性的任何可选表面层的线条厚度大约为1μm到大约10μm,较好为大约2μm到大约8μm厚,更好为大约2μm到大约5μm厚。可以用于提供与凸台的相容性的可选层通常为邻近基片表面的基底层厚度的四分之一。可选表面层可以由任何与凸台材料相容的的金属材料制成,较佳地由金制成。
本发明中的粘合剂根据用途可以有范围很广的变化,任何在接合温度下容易流动的绝缘的粘合剂都可以使用。“易流动”定义为一种粘合剂,在高于其Tg的温度下可以容易地被挤压出接触区域以提供、在凸台及相应的的电路线条之间的界面上一干净的金属-金属电气连接。粘合剂材料通常是一种可以用热、光化学辐射(即,紫外线)、粒子束(如E-束)、或粘合剂中的相变(如从无定形的到结晶性的)来变粘的树脂。上述任何一种材料可以和一种硬化剂(如金属有机化合物)合用。有用的粘合剂包含那些还氧树脂组、丙烯组、硅树脂组、丁二烯组、改性丙烯酸盐组、氰酸盐酯组,及它们的可相容的混合物。较佳的,粘合剂包含环氧树脂、苯氧树脂及它们的相容的混合物。
本发明中使用的粘合剂可以选择性地包含导电微粒。导电微粒的数量可以是任意的,但粘合剂中导电微粒的数量最好不要导致粘合剂各向同性地导电。通常将大约5%到30%(重量)的导电微粒用于本发明的粘合剂中,最好是大约10%到大约20%。
本发明还包含用上述基片部件制造接合连接的微电子部件的过程。如图1图示的,本发明的过程包括提供至少有一个金属凸台的电子器件,及可变形基片,在所述基片的一个表面上有由可延展金属电路线条构成的电路结构。然后,在IC凸台及基片部件之间放置(最好是薄膜形式)可变硬的绝缘粘合剂,以形成叠层。
然后,IC上的凸台和它们在基片部件上相应的电路线条对准。典型地,用倒装片接合机、精密压床(提供叠层的IC的极为准确的对准)、粘性剂膜、及可变基片部件来实行该对准。倒装片接合机还包括准确控制施加给叠层的力及温度的装置。IC芯片、粘合剂膜及基片部件的对准常常用视频显微镜(video-microscope)执行。在现有技术中,芯片接合机是熟知的,并且可以从新泽西州Pis cataway的RD Automation、加利福尼亚州Carlbar dHughes Bonding Equipment Products,及马萨诸塞州Chelmsford的Micro Robotics Systems,Inc.买到。
在IC芯片、粘合剂膜及电路对准之后,叠层通过施加一接合力而接合。本发明的过程中使用的接合力可以根据使用的基片材料、粘合剂、电路线条的厚度和组成,及接合温度而有很大的变化,但典型地范围从大约50牛顿到大约500牛顿。然后,粘合剂通过上面列出的熟知的技术(包含热、光化学辐射(即,紫外线)、微粒束(即,E-束)、或粘合剂中的相变(即从无定形态到晶态))而变硬。在这些变硬技术中,热固化较佳,而且为了清楚起见,下面的讨论将假定选定热固化作为固化粘合剂的技术。
接合力可以在叠层处于或接近室温时施加,在叠层或叠层的一些部分被加热到接合温度以开始使粘合剂变硬时施加,或在接合温度下施加-然后,加热接合区域(最好是快速加热)使温度从室温升高到接合温度,最好在小于大约10秒的时间之内。使接合区域在一预定的时间(最好是大约额外的20秒〕内维持在接合温度下。在这段时间中,粘合剂在IC凸台周围流动,凸台陷入粘合剂,并且按压IC凸台以和基片部件上的电路线条接触,形成许多接合位置。如在图1B和1C中描述的,线条在前的凸台周围延展,并陷入基片的表面内一预定的深度D。凸台厚度B的变化及电路线条厚度T的变化可导致个别的线条陷入基片表面内略有不同的深度D,以在IC及电路线条之间获得可靠的电气连接。但是,如上指出的,对于每个相互接合的凸台及线条,线路的陷入距离D至少为大约1-2μm,最好为大约5μm。
当相互接合的凸台及线条被推入基片的表面,在在IC及电路结构之间形成电气连接,且粘合剂变硬之后,随后冷却接合区域,最好直到温度达到80℃或更低。冷却处理可以在全接合力下进行,或者,如果粘合剂在冷却下来之前全部变硬,则接合力可以在冷却处理之前就除去。然后,去除接合力,并且准备对电路元件进行测试和评估。
现在将根据下面的实施例进一步描述本发明。
例子
所有的例子都使用被称为3M-D120X的相同的硅测试芯片。这种芯片的尺寸为6.7×6.7×0.5mm,并包含120个接合电极区,它们被置于芯片周围200μm的中心-中心间隔中。所有的接合电极区都用金作凸台。所有的凸台尺寸都是100μm×100μm×30μm,而且金是电镀的而且被完全地退火。
在例子中使用两种基片部件。第一种基片材料,即本发明的基片材料的一个实施例,由厚25μm的聚酯对酞酸盐(PET)基膜构成,所述薄膜的表面上设置有专门用于3M-D120X测试芯片的Cu测试电路。Cu线条的厚度接近2μm,并且在Cu上电镀了厚度大约0.5μm的Au表面线条。这些电路线条的面电阻率大约为每方10毫欧姆(mΩ),而且用对熟悉本领域的人公知的电路制造方法提供线条。
用于下面的对比例子中的第二种基片由厚1mm的碱石灰玻璃基底构成,其上有专门用于3M-D120X测试芯片的铟-锡氧化物(ITO)的测试电路线条。ITO电路线条的面电阻率约为每方30Ω。
例子中使用两种粘合剂。第一种粘合剂(下面称为LT-IU)不包含导电微粒。第二种粘合剂(下面称为LT-1F)和第一种粘合剂完全相同,但是它包含12%(重量)(6%(体积))的导电粉末,可商业牌号20GNR4.6EH由JCI.Inc.买到。这种粉末包含直径为5μm的塑胶微粒(用Ni和Au金属化,覆盖量为20%(重量))。经填充的粘合剂不包含足以获得各向同性的导电性的导电材料。
以薄膜形式提供LT-1U及LT-1F粘合剂。粘合剂包含环氧热固化树脂与苯氧塑性树脂以接近1∶1比例混合的混合物,并用颁发给Schenz的第4,769,399号美国专利中揭示的材料及方法进行制备。用颁发给Kropp等人的第5,362,421号美国专利中揭示的较佳热激发催化剂系统对粘合剂的变硬(如固化)进行催化。这种催化剂系统的使用在接合温度下(范围从大约130℃到140℃)允许大约10到20秒的极为迅速的固化。粘合剂的成分是在室温下稍有粘性的薄膜。当被加热至大约110℃到140℃时,薄膜先软化及流动,然后迅速固化为玻璃化的固体热固化树脂。在固化后LT-1粘合剂的Tg大约是130℃到140℃。
所有的倒装片接合都在上述倒装片接合机上进行,并且用视频-显微镜进行测试芯片上的凸台起与电路线条的对准。在接合过程中,最先施加如下所述进行变化的全接合力,而对准部分处于室温或者接近室温。当施加全接合力后,使接合区域在大约5到10秒之内加热到130-140℃,并且然后将接合区域再保持在那个温度大约20秒。随后样品在全压力之下被冷却直至其温度到达80℃或者更低。
然后,样品电路部件被置于环境室中进行耐久性试验。在经历各个指定的时刻,将试验样品从环境室中移出,并且实施现有技术中熟知的四点电阻试验法,以测量凸台与电路线条电气连接的接触电阻。对试验芯片及试验基片的布线进行设计,从而芯片上的120个电极区中的38个可以用四点测量技术相当准确地测出它们的相互接合处的电阻。在剩下的82个电极区中,80个被用于建立菊花链(daisy-chain)电路,从而所有的80个电极区可以用一次测量顺序测出。用这些试验基片还可以对邻近的电极区之间的短路进行测试。对于PET试验基片,每个四点电阻的测量包括接近2方,或0.020欧姆(Ω)外电阻。
例1
例1说明了发明的接合处理,并提供了本发明的经接合的电路元件。由上述Cu/PET基片部件及LT-1U粘合剂制备十个样品。两个样品各在67,133,200及267牛顿这四种不同的接合力下的每种力进行接合。这些经接合的样品在60%/95%RH下老化1000小时,并为了相互接合处的电阻的稳定性定期地进行监视。由于考虑到在更极端的老化条件下PET基片会相当迅速地劣化,将这些样品在60℃下而不是在85℃下老化。对于所有的接合力经1000小时的试验期,所有接合线条保持无剥离现象。
例1的电路部件试验的环境试验结果示于图2A中。相互接合的凸台及线条陷至可变基片的表面内产生一种电路元件,即使在考虑到凸台厚度及线条的厚度变化时,该元件仍具有很均匀的连接电阻及很好的连接稳定性。这种均匀的良好性能是在接合压力低至133N时被发现的。
图6A描述了在例1中所述的接合过程之后与3M-D120X测试芯片上的凸起分开的本发明的基片部件上的电路线条。图6B描述了在例1中所述的接合过程之后与本发明的基片部件上的电路线条分开的本发明的3M-D120X测试芯片上的凸台。图6中的接合条件是:温度140℃,力267N,时间20秒。
图7A和图7B描述了在例1中所述的未使用粘合剂的接合过程之后与3M-D120X测试芯片上的凸台分开的。本发明的基片部件上的电路线条。图7C及7D描述了接在例1中所述的未使用粘合剂的接合过程之后与本发明的基片部件上的电路线条分开的3M-D120X测试芯片上的凸台。在图7D的高倍放大的显微图中,可以看见来自电路线条的金/铜镀层和一些PET附在凸台上(卷起)。图7中的接合条件为:温度,140;力,267N;时间,20秒。
图8A和图8B显示了图7的被拉开的接合,其中样品已从垂直方向转过了70°。图8A显示了接合的电路侧,而图8B显示了接合的凸台(芯片)侧。从这个视角,可以清楚地看到金属电路线条从基片表面剥离。该剥离是由拉开被接合部件所需的力引起的。
图10A和10B分别高倍放大地描述了图7A和7C的被拉开的接合。这些图显示了在接合过程之前存在的凸台金的凹凸不平在接合过程中变平了。一簇对着在图10A的浅坑中的阴影区域的稍带白色的小球相信是延性开裂,这可能是金凸台与电路线条的金表面熔接的证据。
图9A描述了在例1中所述的接合过程之后与3M-D120X测试芯片上的凸台分开的。本发明的基片部件上的电路线条,图9B描述了接在例1所述的接合过程之后与本发明的基片部件上的电路线条分开的3M-D120X测试芯片上的凸台。黑暗区是由反向散射的电子所揭示的粘合剂。图9中的照片清楚地描述了在进行接合时,粘合剂从凸台-线条界面被除去,以产生高度可靠的的电气连接。
图11A-F描述了接合到本发明的基片部件(基片在照片的顶部)上的电路线条的凸台的截面图,根据例1中的过程用更大的接合力进行制备。当施加增加的结合压力时,凸台的“松饼状”边缘显得被压向下面。在267牛顿的例子中(图11E和11F),所述边缘都向下折向芯片。图11A-F显示了敷金的铜线条在凸台延展时在边缘发生弯曲并依照凸起的周边伸展。线条可能在这一点被接合到凸台,并且部分伸展(拉伸的张力)和凸台的延展一致。凸台的柔软度及凸台边缘处较小的曲率半径趋向于对在较大区域上散开在线条内产生的的张力。
图11A-F清楚地显示了当接合力从0增加到133N到200N然后到267N(分别见图11A、B、C、D及E、F)时,金凸台的压扁(厚度从40、到36、到34而最后到24μm),粘合剂薄膜的变薄,及PET薄膜的陷入深度的增加(从0到4.5到7而最后到8μm)。
例2
例2和例1相同,但是使用粘合剂LT-1F。按照和例1中的样品类似的方法制备、老化及监视十个样品。如在例1中那样,接合线条在测试过程中在所有的样品中保持无剥离。
图2B中显示,环境试验的结果。例2的结果显示出在较低的接合力下其变化性要比例1的更大。但是,即使接合力为67牛顿,导电微粒的存在防止了接触失效。这些例子中测出的较高的电阻大概是由于导电微粒的较高的电阻率。导电微粒电镀到20%(重量)的程度。对于一个直径5μm的微粒,相应于仅仅大约为1000埃的金属肤厚(shin thickness)。因此,这样一个微粒的欧姆电阻可以至少为几百毫欧姆。在较大的接合力下,连接电阻的减小可能是凸台与电路线条之间的直接接触的程度增加的象征,它抑制了微粒的影响。
例3
例3是一个对比实施例,以表明现有技术的结合方法的有效性。使用LT-1U粘合剂,通过将10个3M-D120X测试芯片结合到10个ITO/玻璃测试基片上来制备十个样品。使用的结合方法类似于颁给Hatada的第4,749,120号美国专利中描述的方法。固化条件为在140℃,20秒。对两个样品都用五个不同的接合力:66,7,133,222,334,和445N中的每一种力进行接合。经接合的样品在85℃/85%的相对湿度下老化1000小时,并对相互接合电阻的稳定性作定期监视。
环境试验的结果示于图3A中。在该老化条件下,粘合剂连接都比它们的Tg低很多,故应是稳定的。在222牛顿及445牛顿的接合力下,发现在老化环境下几周之后,在粘合剂与玻璃的界面上有剥离现象。这表示这些接合力过大,导致接合线条太薄。在所有其它的接合力下,接合区域保持干净而且无剥离。在接合力的所有值下,连接电阻大于本发明中的电阻,并且示出有更多数量的开路。这些结果被认为是由于不可延展的基片部件不能适应凸台厚度和线条厚度的变化所致。
例4
例4和例3相同,但是使用的是LT-1F粘合剂。以和例3中的样品相同的方法制备、老化及监视10个样品。环境试验的结果示于图3B中。
例4的结果显示了通过加上少量可延展导电粉末而获得的显著的进步。当使用刚性的,不可延展的基片时,导电粉末在粘合剂中提供对应力松弛的适应,这是不能单由凸台提供。
例5
这个例子表明改变铜线条厚度,PET基片厚度,及接合温度对于相互接合的凸台和线条陷入到基片的表面的影响。用例1中描述的标准的接合过程制备样品。使用的粘合剂是厚度为25μm的LT-1U薄膜。基片是厚度为25或50μm的PET,它镀有厚度为3或8μm的镀金的铜电路线条。
使用的接合条件为:接合温度140或150℃,接合力200N,时间20秒。
因此,这个例子包含2×2×2=8种试验模型,它有2种温度(140℃和150℃),2种PET厚度(25和50微米),及2种铜线条厚度(3和8μm)。为每个试验模型制备两个样品,总共16个样品。该16个样品在60C,相对湿度为95%下环境老化100小时(用例1中描述的标准老化过程)。
在所有的情况下都凸起陷入柔性基片。图12A-12D(基片在照片)示出了接合接合部件的截面图扫描电镜的显微照片(500X)。
图12E-12H基片在(照片顶部)描述了图12A-12D中的相应的截面图的光学显微照片(200X)。
图12中描述的柔性电路具有如下面的表1所示的PET基片厚度和铜电路线条厚度。
表1
    图     放大率(X) PET厚度(μm) 线条厚度(μm)
    12A   500(扫描电镜)     50     8
    12B   500(扫描电镜)     50     3
    12C   500(扫描电镜)     25     8
    12D   500(扫描电镜)     25     3
    12E     200(光学)     50     8
    12F     200(光学)     50     3
    12G     200(光学)     25     8
    12H     200(光学)     25     3
图12B、D、F、和H(3μm铜线条分别在50和25μmPET上)显示了当电路线条在凸台的周围弯曲时电路线条的急剧的弯曲(曲率半径小)。图12A、C、F和G(在50和25μmPET上8μm的铜线条)显示了平缓的弯曲,表明较厚的电路线条的较硬。
图12I是背散射模式的扫描电镜显微照片(600X基片在照片的顶部),显示了当凸台的边缘使电路线条延展和拉伸时发生的擦拭作用,因此而提高了凸台和电路线条之间金属-金属的接触,藉此提高形成的使用压力的电气连接的可靠性。这种密切的电子接触可以通过凸台边缘和相应变形的线条的图像明亮(由于金-金界面处丰富的电子发射所致)而推出。凸台中心的暗区被认为是由在接合过程中未被压出的凸台和相应的的电路线条之间的空隙内所剩的少量粘合剂所致。
在环境老化过程结束时,在16个样品中连接稳定性无显著差异,也无连接失效的现象。所有的接合温度、铜厚度和PET厚度都表现出极好的连接稳定性。更厚的铜的样品表现出更低的测得的电阻值。这一差异完全起因于通过铜的面电阻率引入的大约1.5方的外部电阻。在此例中,断定实际接触电阻对所有样品都是一样的。
图13中作为暴露在环境中的积累小时间的函数显示了八个试验模型的每个模型的四探针连接电阻。
例6
这个例子描述了凸台的陷入怎样随接合温度变化。用例1中描述的标准的接合过程制备样品。使用的基片是PET(厚度为25μm),在所述PET的主表面电镀厚度为3μm的铜再覆以厚度为750nm的电镀金而均匀地金属化。粘合剂薄膜被除去。
使用的接合温度是:(40-160℃,以10℃递增),力(200N)和时间(20秒)。
在13个接合温度的每一温度下制备13种样品(总共169个样品)。试验芯片不重复使用。接合之后,试验芯片被移去,并用激光测微计测量凸台陷入基片的深度。在由凸台的陷入所形成的周界之外用测微计测量间隔较远的三点,以建立基准面。每个压入中的最低点(最大值)被选作陷入深度。在沿芯片的每一侧的两个压入中量出深度(每个样品作8次测量)。
凸台和电路线条之间形成的金属间扩散接合剂足够高,以在130℃的接合温度或更高的温度下将铜有凸台压入的底部从PET拉开。
因此,有必要将在130℃或更高的温度下接合的样品测出的深度中减去3微米来校正原始数据。结果显示在下面的表中。
表2
    接合温度(℃)     凸  台  陷  入(μm)   铜基片剥离?(是或否)
    最小   平均   最大
    50     0.5     6   11.5     否
    60     0.5     7   13     否
    70     >0.1     6   12.5     否
80 >0.2 3 7
    90     2     6     11     否
    100     2     5     9     否
    110     0.5     6     12     否
    120     3     9     14     否
    130     7     12     17     是
    140     2     9     14     是
    150     6     12     15     是
    160     12     13     15     是
表2中的数据显示,对所有160℃以下的接合温度,凸台陷入的范围较大(数量级为10μm峰-峰)。这显示了芯片接合器中的平面控制较差。在低于90℃的温度下,最小凸台陷入小于1μm。因此,PET是“硬”的,且将不能适应凸台厚度的变化或在芯片和基片中芯的较差的平面性。但是,对于120℃或更高的温度,每个凸台都产生一个深度至少为2μm的凹陷。结果,在120℃和更高的温度下(对于取向PET薄膜,接近Tg),PET基片容易延展,并显得能够适应平面的几微米的变化。基于这些结果,对于最好的接触、完整性和可靠性,当然最好在130℃和更高的温度下进行接合。在这些温度下,在凸台-基片的界面上产生足够的应变,形成散布的接合,该接合相对于铜-PET界面的附着是相当强的,由把电路线条撕离从下面的基片可以证明。
应该理解,这里描述的例示的实施例决不限制本发明的范围。考虑到上面的描述,对熟悉本领域的人来说,本发明的其它修改是显而易见的。这些描述是为了提供实施例的具体例子来清楚地揭示本发明。相应地,本发明不限于所述实施例或使用特定的元件、尺寸、材料或其中包含的结构。把所有落在所附权利要求书的主旨和范围之内的其它的修改和变化都包含在本发明中。

Claims (13)

1.一种微电子电路部件,其特征在于包含:
(a)至少一个电子器件(10),其中所述至少一个电子器件(10)具有至少一个接合位置(16);
(b)基片部件(18),包含可延展聚合物基片(20),所述基片的Tg低于200℃,而且在所述基片的表面(20)上具有至少一条可延展的金属线条(22),其中所述至少一条可延展金属线条(22)厚度为大约1μm到大约10μm;及
(c)在所述器件(10)和所述基片部件(18)之间的粘合剂(30)。
2.如权利要求1所述的微电子电路部件,其特征在于所述聚合物材料的Tg从大约70℃到大约160℃。
3.如权利要求1所述的微电子电路部件,其特征在于所述聚合物材料从由聚(对苯二酸-乙二醇)、聚(1,4-萘二甲酸乙二醇酯)、聚(1,5-萘二甲酸乙二醇酯)、(聚(2,6-萘二甲酸乙二醇酯)聚(2,7-萘二甲酸乙二醇酯)及间规聚苯乙烯构成的组中选出。
4.如权利要求1所述的微电子电路部件,其特征在于所述粘合剂至少具有环氧树脂组、丙烯组、硅树脂组、丁二烯组、改性的丙烯酸组和氰酸盐酯中的一种。
5.如权利要求1所述的微电子电路元件,其特征在于所述粘合剂是从由环氧树脂,苯氧树脂和它们相容的混合物所构成的组中选出。
6.如权利要求1所述的微电子电路部件,其特征在于所述粘合剂还包含导电微粒。
7.一种制造粘合剂微电子部件的方法,其特征在于包含:
提供电子器件(10),它包括至少一个金属接合位置(16);
提供一个基片部件(18),该器件包含由聚合物制成的基片(20),其Tg低于200℃,在所述基片的一个表面上有电路线条(22)的图案,其中所述线条(22)是厚度至少大约1μm的可延展的金属;
在所述器件(10)和所述基片部件(18)之间设置可变硬的绝缘粘合剂(30),以形成叠层;
将所述金属结接合位置(16)和所述电路线条对准;
使粘合剂(30)变硬;及
对所述叠层施加接合力,以使所述接合位置(16)和所述电路线条(22)电气连接,从而所述线条(22)延伸至少大约1μm到基片(20)的表面内。
8.如权利要求7所述的方法,其特征在于所述粘合剂通过加热、光化学辐射及结晶处理中的至少一种方式变硬。
9.如权利要求7所述的方法,其特征在于所述聚合物基片的Tg为大约70℃到大约160℃。
10.如权利要求7所述的方法,其特征在于所述聚合物从由聚(对苯二酸-乙二醇),聚(1,4-萘二甲酸乙二醇酯),聚(1,5-萘二甲酸乙二醇酯),(聚(2,6-萘二甲酸乙二醇酯),聚(2,7-萘二甲酸乙二醇酯),及间规聚苯乙烯构成的组中选出。
11.如权利要求7所述的方法,其特征在于所述粘合剂还包含导电微粒。
12.如权利要求7所述的方法,其特征在于所述可延展的金属是从由铜、金、银、铝、锡、铅、锌和它们相容的合金所构成的组中选出。
13.如权利要求7所述的方法,其特征在于所述粘合剂通过施加热变硬。
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