CN1199924A - 芯片型半导体装置的制造方法 - Google Patents
芯片型半导体装置的制造方法 Download PDFInfo
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Abstract
一种芯片型半导体装置的制造方法,是在半导体晶片表面形成多个半导体元件的电极上形成了金属补片后,粘合在印刷电极图形的绝缘性基片的表面,使半导体元件的金属补片和绝缘性基片的电极图形接合。绝缘性基片和半导体晶片的尺寸、形状相同。接着,仅将半导体晶片按半导体元件的尺寸切断分别。然后,在切割成小方块切口灌入密封树脂,遮蔽被分割的半导体元件,使树脂硬化后,将树脂随着绝缘性基片按每个器件切断、分割。
Description
本发明涉及芯片型半导体装置的制造方法,尤其涉及内装半导体元件的芯片型半导体装置的制造方法。
以往,作为内装半导体元件的芯片型半导体装置的制造方法,曾有可对多个元件一次盖上引出头的芯片型半导体装置的制造方法(特开平4——148553号公报)。该以往的制造方法如图6所示,在包括多个基片的母基片24的上面和下面分别设置多个上面电极以及下面电极,为连接上面电极和下面极,设置通孔25,通过通孔26,使之导通,而且,在相邻通孔26之间的母基片24的上面分别装载元件27,在装载的元件27上面,用导线28分别电气连接上面的电极。
其次,如图7所示,将下面形成凹陷处32的密封用母盖31对准元件27固定在母基片24上面使各元件27封入凹陷处32内。之后,沿图7的C——C点划线,分别切离母基片24以及密封用母盖31含各元件27,如图8所示,制造多个芯片型器件41。
然而,用上述的以往方法,在母基片24上装载多个半导体元件27,为了用有凹陷处32的密封用母盖31密封半导体元件27,考虑到半导体元件27的装载精度以及半导体元件27和母基片24的配线材料,密封用母盖31的凹陷处32的空间对半导体元件27的尺寸增加200μm左右,要使芯片器件41的外形的尺寸接近半导体元件27的尺寸是非常困难的。
并且,即使用较快的速度将元件27装载在母基片24上,也要0.6秒/个。由于不能期望装载速度大幅度提高,存在该元件装载速度影响芯片器件41的生产效率,不能期望显著提高生产效率这一问题。
本发明鉴于上述各点,其目的在于提供一种制造小型芯片型半导体装置的芯片型半导体装置的制造方法。
本发明的另一目的在于提供提高每单位时间的生产能力的芯片型半导体装置的制造方法。
而且,本发明的目的还在于提供一种使生产效率和原料利用率提高的芯片型半导体装置的制造方法。
为达到上述第一目的,本发明提供了一种芯片半导体装置的制造方法,它包括在半导体晶片的表面的已知位置所形成多个半导体元件的电极上形成金属补片的第一工序,将在表面的已知位置所形成电极图形的绝缘性基片的该电极图形一侧和半导体晶片的半导体元件的形成面一侧粘结,将该电极图形和金属补片结合的第二工序;通过所述第二工序粘结的所述半导体晶片以及绝缘性基片中,仅将该半导体晶片按所述半导体元件各个的大小切断分割的第三工序;在切断分割半导体晶片切口和半导体晶片上灌入液态树脂使之固化的第四工序;和将硬化后的树脂和绝缘性基片同时切断,分别分离具有所述半导体元件的每个器件的第五工序。
在本发明中,将形成多个半导体元件的半导体晶片的面固定在形成电极图形的绝缘性基片上,由于半导体元件的金属补片和绝缘性基片的电极图形相结合,不需要对衬底分别装载每个半导体元件。
并且,在本发明中,把形成多个半导体元件的半导体晶片照原样粘合在绝缘性基片上,由于半导体元件的金属补片和绝缘性基片的电极图形相结合,所以绝缘性基片上的每个半导体元件的装载精度没有标准偏差能够用厚薄均匀的树脂密封层密封半导体元件。
还有,绝缘性基片的形状及尺寸和半导体晶片的形状及尺寸相同,由于使用半导体晶片上的半导体元件的电极位置的座标数据所决定的位置形成绝缘性基片的电极图形,因此,可以容易地决定半导体元件的金属补片和绝缘性基片的电极图形的位置。
另外,为达到上述目的,本发明提供了另一种芯片型半导体装置的制造方法包括使将在表面的已知位置形成具有电极图形的多个半导体元件的半导体晶片及对该半导体元件形成面和相反侧面的上第一树脂固化的第一工序;
和将绝缘基片粘合在具有固化第一树脂的半导体晶片的半导体元件形成面上的第二工序;
和在绝缘基片上,形成使半导体晶片的电极图形的一部分露出的通路孔和识别切断图形的第三工序;
和形成通过所述通路孔连接所述电极图形的金属补片的第四工序;
和利用所述识别切断图形,按所述每个半导体元件的尺寸,将所述半导体晶片及绝缘性基片同时切断去除的第五工序;
和在由所述第五工序使切断去除的区域,埋入第二树脂,使之固化的第六工序;
和将固化了的所述第二树脂和固化的所述第一树脂同时切断,分别将具有所述半导体元件的每个半导体装置分离的第七工序。
在本发明中,在绝缘性基片上形成识别切断图形,利用该识别切断图形,按每个半导体元件的尺寸,同时切断、去除半导体晶片及绝缘性基片。
这里,本发明使用的绝缘性基片,在形成电极图形,并且,用第六工序固化的第二树脂,分别保护用第七工序分离制造的半导体装置的半导体元件的切断面和绝缘性基片的切断面。还有,第一及第二树脂,分别是同一材料的液态树脂。并且,对用本发明的第七工序分离制造的半导体装置的金属补入上也可再包括连接电极引线的第八工序。
下面对附图进行简要说明:
图1是说明本发明制造方法的一实施例的各工序的立体图。
图2是图1的补充说明图。
图3是根据图1的制造方法制造的芯片型半导体装置的一部分剖开的立体图。
图4是说明本发明制造方法的另一实施例的各工序的剖面图。
图5是根据图4的制造方法制造的芯片型半导体装置的另一实施例的剖面图。
图6是作为以往的制造方法一例的第一工序的装置剖面图。
图7是作为以往的制造方法一例的第二工序的装置剖面图。
图8是用图6及图7的制造方法制造的芯片型器件的立体图。
符号说明:
1、14——半导体晶片;2、15——半导体元件;2′—被分割的半导体元件;3——电极;4、21——金属补片;5、18——绝缘性基片;5′——切断后的绝缘性基片;6、16——电极图形;7——切口;8、8′——定位平面;9、9′——切割成小方块切口;10、17、17′——树脂;11——切断面;12——芯片型半导体装置;13——光刻胶;19——通路孔;20——认识切断图形;22——切断区域;23——电极引线。
下面,说明附图的同时说明本发明的实施例。图1是说明本发明的芯片型半导体装置的制造方法的一实施例的各工序的立体图。图2是图1的补充说明图。在该实施例中,首先,如图1(a)所示,准备在表面形成了多个半导体元件2的半导体晶片1,在该半导体元件2上形成如图2(a)所示那样的电极3。接着,在该半导体元件2的电极3上形成如图1(b)以及图2(b)所示那样的金属补片4。通常是用通过金属线的球补片法和印刷和钎焊补片的方法形成金属补片4,也可以用其他方法形成金属补片。
其次,如图1(c)所示。将印刷电极图形的绝缘性基片5粘合在半导体晶片1的表面,接合半导体元件2的金属补片4和绝缘性基片5的电极图形。图2(c)是作为绝缘性基片5一侧的放大图。在这种情况,于绝缘性基片5上形成切口7,电极图形6通过切口7的侧面被金属化、使之成为达到绝缘性基片5的里面(图中未示出)。另外,电极图形6也可利用穿孔法形成。
这里,为了使半导体元件2的金属补片4和绝缘性基片5的电极图形6高精度重叠,在半导体晶片1上的半导体元件2的电极3的位置座标数据的基础上,决定绝缘性基片5的电极图形6的位置,形成电极图形6。
并且,使绝缘性基片5和半导体晶片1有同样尺寸,在绝缘基片5上设置了设在半导体晶片1的半导体制造过程中用于决定位置的定位平面8和相同的定位平面8′。
由此,在形成电极图形6时,使用印刷技术,可在与半导体晶片1一侧的电极3相同位置形成电极图形6。因此,决定半导体晶片1和绝缘性基片5贴合时的位置,只要使定位平面8、8′和各外沿一致就行了。贴合时用绝缘性粘接剂对金属补片4和电极图形6以外的数个部分粘合。
如图1(d)所示将半导体晶片1和绝缘性基片5如上述那样贴合后,仅将半导体晶片1按半导体元件2′的尺寸切断。也就是说,使用半导体元件2的位置座标数据决定切断位置,切断仅用定位平面8和外沿部分决定位置的半导体晶片1。在切断中使用切片锯,切割成小方块切口9的切口宽度(切断宽度)约为60μm。
接着,如图1(e)所示,在切割成小方块切口9用灌入密封用液态树脂10遮蔽被分割的半导体元件2′,使树脂10固化。使用热固化工艺或是光固化工艺,使该树脂10固化。
然后,如图1(f)所示,将树脂10随着绝缘基片5象分离每个器件那样切断。这时的切割成小方块切口9′的切口宽度比图1(d)所示的切割成小方块切口9的切口宽度要窄(例如:约20μm)。
这样被分别切断的每个器件,如图3所示的将一部分剖开的立体图那样,由于树脂10的外侧面是根据切割成小方块切口9′的切断面11,在切断的绝缘基片5′上构成装载了半导体元件2′的芯片型半导体装置12。并且,根据切割成小方块切口9决定半导体元件2的外侧面。
如按照本实施例,通过将装载了多个半导体元件2的半导体晶片1和形成了电极图形6的绝缘性基片5相粘合,使半导体元件每个的装载位置没有标准偏差,并且,由于用厚薄均匀的树脂10密封,然后按每个的尺寸切断,能够使芯片型半导体装置12的尺寸极接近如图3所示的半导体元件2′的尺寸。
并且,由于将半导体元件2成批装载在半导体晶片1上,显著提高了每个半导体元件的生产效率。例如:在直径为125mm的半导体晶片是晶体管的情况下,即约70000个元件贴合,假定需要5分钟,每个也只有0.004秒,是单个半导体元件装载时间的1/150,提高了生产效率。
可是,在上述实施例,作为绝缘性基片5与半导体晶片1同样形状,尺寸,并且,由于对半导体元件2的金属补片4重叠表面,使用印刷的电极图形,不怎么具有通用性,很难产生产量效果。
并且,根据在半导体元件2的电极3的半导体晶片1上的位置座标数据,决定绝缘性基片5的电极图形6的位置,决定切断区分位置,但读取半导体晶片1上的位置座标数据,如果透过绝缘性基片5不能读取,由于透过时的数据识别移位(折率等)可能有切断位置错误。
再有,在图1(d)所示的工序中,在半导体晶片1和绝缘性基片5粘合的状态,仅将半导体晶片1按半导体元件2′的尺寸切断,但由于半导体晶片1和绝缘性基片5的距离接近,可能产生半导体晶片1的芯片缺损等的不良切断。
因此,以下说明解决了上述问题的本发明的另一实施例。图4是表示说明本发明的芯片型半导体装置的制造方法的另一实施例的各工序的剖面图。
首先,如图4(a)所示,对形成半导体元件15的半导体晶片14(相当于形成所述半导体元件2的半导体晶片1)的里面,使液态树脂17固化,将形成半导体元件15的电极图形16的面(半导体晶片14的表面)和绝缘性基片18粘合。该绝缘性基片18和所述的实施例的绝缘性基片5不同,不形成电极图形。
其次,在图4(a)的绝缘性基片18的表面,除敷光刻胶,在对光刻胶形成印刷图形之后,将该光刻胶切割,如图4(b)所示,在绝缘性基片18上通过蚀刻形成通路孔19及识别切断图形20,之后去除光刻胶。在这里,通过形成通路孔19,使电极图形16的一部分露出。此外对不便形成图4(a)的光刻胶13时用的光刻胶,以后再作说明。
接着,如图4(c)所示,将连接外部元件的金属补片21通过通路孔19,在电极图形16上形成,能够连接半导体元件15和外部元件。
然后,如图4(d)所示,利用识别切断图形20,留出每个半导体元件15的尺寸,同时切断去除半导体晶片14及绝缘性基片18。因此,通过切断区域22露出固化树脂17。在该切断时(刻膜时),由于可直接识别在绝缘性基片18上形成的识别切断图形20,能够正确定位切断位置,在自动识别切断装置的操作中,也不会有误识别。
还有,在图4(d)中,由于识别切断图形20位于切断区域22,可通过切断,来消除识别切断图形,也可在半导体元件15中的绝缘性基片18上残留形成识别切断图形20。
接着,如图4(e)所示,尽量埋入切断区域22的内部,在露出了的固化树脂17上及半导体元件15、绝缘性基片18的侧面,流入液态树脂17′之后,使其固化。这时,树脂17和17′密切相合。还有,如图4(e)所示,即使流入液态树脂17′,由于半导体晶片14和绝缘性基片18的间隙(相当电极图形16的高度)极小,树脂17′不能到达电极图形16的侧面。
最后,如图4(f)所示,将固化的树脂17及17′同时切断,分离半导体元件15,得到芯片型半导体装置。因此,该实施例芯片型半导体装置的尺寸也能够极接近半导体元件15的尺寸。还有如图4(f)所示的切断宽度比图4(d)所示的切断宽度要窄,其结果,如图4(f)所示,在切断区域22的半导体元件15和绝缘性基片18的侧面,残留形成树脂17′。
在该实施例中,如图4(b)的通路孔19形成时和电极图形16的位置重合,利用预先形成的半导体晶片14的位置重合的识别图形,透过绝缘性基片18的位置重合,读取识别图形,用目视使用红外线透过显微镜来确认是否一致。这时,如图4(a)所示,形成通路孔19的光刻胶13的开口位置,由于绝缘性基片18的折率及其他原因,对实际的电极图形16的位置,如用箭头X表示的那样有偏移。
如能够通过光刻胶13的印刷图形检查,查出上述的位置偏移时,通过有机溶剂、O2等离子体等,全面去除其光刻胶13,在绝缘性基片18上再次形成制作布线图案的光刻胶。通过这样的再处理,能正确地进行能路孔19形成肘的电极图形16的位置重合。
还有,对于象这样制造的芯片型半导体装置,例如如图5所示,也有可能进一步附加对金属补片21连接电极引线23的工序。
下面,参照图4,说明本发明的实施例。如图4(a)所示,半导体晶片14由厚度为100μm左右的镓砷构成,在其背面涂敷液态树脂18使其固化。绝缘性基片18是厚度为100μm左右的高电阻镓砷基片,使用聚酰亚胺、光刻胶粘接半导体晶片14。
其次,如图4(b)所示,象位于半导体晶片14上的80μm角的电极图形16的内侧那样,对绝缘性基片18上形成40μm角的通路孔19。在形成通路孔19时,使用镓砷干腐蚀技术,其制作布线图案利用光刻胶技术。用光刻胶技术在绝缘性基片18上形成的通路孔图形和电极图形16的位置重合,利用透过双方的红外线确认,如果位置偏移,可进行再处理,将不良现象的产生防患于未然。在形成该通路孔的同时,也形成识别切断图形。
接着,如图4(c)所示,通过通路孔19在露出的电极图形16上形成金属补片21,使具有外部元件和半导体元件15连接的功能。
然后,如图4(d)所示,利用识别切断图形20,按半导体元件15的尺寸,通过切割,切断成150μm的宽度。再如图4(e)所示,对150μm宽度的切断区域22,流入与树脂17相同材料的液态树脂17′,使其固化。最后,如图4(f)所示,用30μm的宽度将树脂17′的中央切断,分离半导体元件15。
如以上说明的那样,如按照本发明,将形成多个半导体元件的半导体晶片照原样贴合在绝缘性基片上,通过半导体元件的金属补片和绝缘性基片的电极图形接合,绝缘基片上的半导体元件每个的装载精度没有标准偏差,由于可用厚薄均匀的密封树脂密封半导体元件,芯片型半导体装置的尺寸极接近半导体元件的尺寸,可做到小型化。
还有,如按照本发明,将形成多个半导体元件的半导体晶片的面粘着在形成电极图形的绝缘性基片上,通过半导体的金属补片和绝缘性基片的电极图形相接合,由于不需要将每个半导体元件单独装载,由此,显著提高芯片型半导体装置的生产效率。
另外,如按照本发明,绝缘性基片的形状及尺寸和半导体晶片的形状及尺寸相同,由于使用半导体晶片上的半导体元件的电极的位置座标数据,决定形成的位置;可以容易地决定半导体元件的金属补片和绝缘性基片的电极图形的位置,因此,可提高芯片型半导体装置的生产效率和可靠性。
再有,如按照本发明,在绝缘性基片上形成识别切断图形,利用该识别切断图形,通过按每个半导体元件的尺寸同时切断去除半导体晶片及绝缘性基片,由于可直接识别切断识别图形,能够正确按切割时的切断位置切割,因此,可提高成品率。并且,由于将半导体晶片和绝缘性基片同时切断,可做到不产生切割时芯片的缺损。
此外,本发明使用的绝缘性基片,由于使用了无任何图形的绝缘性基片,对半导体元件的电极图形不同的半导体晶片,可利用同一绝缘性基片,可使绝缘性基片具有通用性,可得到产量效果。并且,由于第一及第二树脂分别是同一材料的液态树脂,具有优秀的亲和性,可充分保护半导体元件及绝缘性基片。
Claims (10)
1.一种芯片型半导体装置的制造方法,其特征在于包括在半导体晶片表面的已知位置所形成多个半导体元件的电极上形成金属补片的第一工序;
将在表面的已知位置所形成电极图形的绝缘性基片的该电极图形一侧和所述半导体晶片的半导体元件的形成面一侧粘结,将该电极图形和所述金属补片结合的第二工序;
通过所述第二工序粘结的所述半导体晶片以及绝缘性基片中,仅将该半导体晶片按所述半导体元件各个大小切断分割的第三工序;
在切断分割所述半导体晶片切口和所述半导体晶片上灌入液态树脂使之固化的第四工序;
和将硬化后的树脂和所述绝缘性基片同时切断,分别分离具有所述半导体元件的每个器件的第五工序。
2.根据权利要求1所述的芯片型半导体装置的制造方法,其特征在于所述绝缘性基片的形状及大小与所述半导体晶片的形状及大小相同。
3.根据权利要求1或2所述的芯片型半导体装置的制造方法,其特征在于用所述半导体晶片上的所述半导体元件的电极的位置座标数据所决定的位置形成所述绝缘性基片的电极图形。
4.根据权利要求1所述的芯片型半导体装置的制造方法,其特征在于所述第三工序是用所述半导体晶片上的所述半导体元件的位置座标数据决定切断分割的位置只切断分割所述半导体晶片。
5.根据权利要求1所述的芯片型半导体装置的制造方法,其特征在于在所述第三工序中的切断分割的切断切口宽度比所述第五工序中的切断切口宽度要宽。
6.一种芯片型半导体装置的制造方法,其特征在于包括使将在表面的已知位置形成具有电极图形的多个半导体元件的半导体晶片及对该半导体元件形成面和相反侧面的上第一树脂固化的第一工序;
和将绝缘基片粘合在具有固化第一树脂的半导体晶片的半导体元件形成面上的第二工序;
和在绝缘基片上,形成使半导体晶片的电极图形的一部分露出的通路孔和识别切断图形的第三工序;
和形成通过所述通路孔连接所述电极图形的金属补片的第四工序;
和利用所述识别切断图形,按所述每个半导体元件的尺寸,将所述半导体晶片及绝缘性基片同时切断去除的第五工序;
和在由所述第五工序使切断去除的区域,埋入第二树脂,使之固化的第六工序;
和将固化了的所述第二树脂和固化的所述第一树脂同时切断,分别将具有所述半导体元件的每个半导体装置分离的第七工序。
7.根据权利要求6所述的芯片型半导体装置的制造方法,其特征在于不使所述绝缘性基片形成电极图形。
8.根据权利要求6所述的芯片型半导体装置的制造方法,其特征在于用在所述第六工序固化的所述第二树脂分别保护在所述第七工序分离制造的半导体装置的所述半导体元件的切断面和所述绝缘性基片的切断面。
9.根据权利要求6所述的芯片型半导体装置的制造方法,其特征在于还包括对用所述第七工序分离制造的半导体装置的所述金属补片上连接电极引线的第八工序。
10.根据权利要求6至9中其中任何一项所述的芯片型半导体装置的制造方法,其特征在于所述第一及第二树脂分别是同一材料的液态树脂。
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JP3441382B2 (ja) * | 1998-10-14 | 2003-09-02 | 日本電信電話株式会社 | 半導体装置の製造方法 |
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JP3813402B2 (ja) * | 2000-01-31 | 2006-08-23 | 新光電気工業株式会社 | 半導体装置の製造方法 |
US6875640B1 (en) * | 2000-06-08 | 2005-04-05 | Micron Technology, Inc. | Stereolithographic methods for forming a protective layer on a semiconductor device substrate and substrates including protective layers so formed |
US7214566B1 (en) * | 2000-06-16 | 2007-05-08 | Micron Technology, Inc. | Semiconductor device package and method |
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FR2819936B1 (fr) * | 2001-01-22 | 2003-05-30 | St Microelectronics Sa | Procede de fabrication d'un boitier semi-conducteur et boitier semi-conducteur a puces de circuits integres |
CN1221076C (zh) * | 2001-02-06 | 2005-09-28 | 松下电器产业株式会社 | 弹性表面波装置及其制造方法及电子电路装置 |
EP1466364B1 (de) * | 2002-01-17 | 2012-05-30 | Qimonda AG | Nutzen für elektronische bauteile sowie verfahren zu dessen herstellung |
US7510908B1 (en) | 2003-02-20 | 2009-03-31 | National Semiconductor Corporation | Method to dispense light blocking material for wafer level CSP |
JP2006196701A (ja) * | 2005-01-13 | 2006-07-27 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
JP2006278610A (ja) | 2005-03-29 | 2006-10-12 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP4799385B2 (ja) * | 2006-05-11 | 2011-10-26 | パナソニック株式会社 | 樹脂封止型半導体装置の製造方法およびそのための配線基板 |
JP5064157B2 (ja) * | 2007-09-18 | 2012-10-31 | 新光電気工業株式会社 | 半導体装置の製造方法 |
US8242616B1 (en) * | 2008-08-29 | 2012-08-14 | Renesas Electronics Corporation | Method for manufacturing semiconductor device and molded structure |
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CN1332430C (zh) * | 2000-11-17 | 2007-08-15 | 矽品精密工业股份有限公司 | 集成电路封装单元分割方法 |
CN1327491C (zh) * | 2002-03-04 | 2007-07-18 | 东京毅力科创株式会社 | 切割方法、集成电路元件的检查方法、基板保持装置和粘接薄膜 |
CN100350594C (zh) * | 2003-03-11 | 2007-11-21 | 株式会社迪斯科 | 分割半导体晶片的方法 |
CN100429755C (zh) * | 2004-12-21 | 2008-10-29 | 精工爱普生株式会社 | 半导体装置及其制造方法、电路基板、及电子仪器 |
CN104362100A (zh) * | 2014-10-15 | 2015-02-18 | 申宇慈 | 制造功能性基板的方法和功能性基板 |
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