CN1295751C - Method for making polysilicon film - Google Patents
Method for making polysilicon film Download PDFInfo
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- CN1295751C CN1295751C CNB031428827A CN03142882A CN1295751C CN 1295751 C CN1295751 C CN 1295751C CN B031428827 A CNB031428827 A CN B031428827A CN 03142882 A CN03142882 A CN 03142882A CN 1295751 C CN1295751 C CN 1295751C
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Abstract
The present invention provides a making method for polycrystalline silicon films. The method utilizes the phenomenon that surface projections has different heights during the formation of a polycrystalline silicon layer, utilizes part of the projections which has higher heights to generate seed crystal, and uses the seed crystal in the following crystallization step. Consequently, the polycrystalline silicon film which is newly formed can have crystal particles with uniform sizes and big particles, have the projections with less quantity and small density, and have favorable surface flatness.
Description
Technical field
The invention relates to the manufacture method of a kind of Thin Film Transistor-LCD (TFT-LCD), and particularly relevant for the manufacture method of the polysilicon membrane of thin film transistor (TFT) array in a kind of Thin Film Transistor-LCD.
Background technology
General active matrix LCD can be divided into two kinds of polycrystalline SiTFT and amorphous silicon film transistors because of material, wherein polycrystalline SiTFT is owing to can integrate drive circuit, so can provide than amorphous silicon film transistor and be high aperture opening ratio and reduce cost, yet the Another reason that the polycrystalline SiTFT technology is praised highly energetically is a polycrystalline SiTFT can significantly dwindle component size, to reach high-resolution, generally want volume production polycrystalline SiTFT LCD, must have low temperature manufacturing technology (450 to 550 degree Celsius approximately), the film formation at low temp technology of high-quality gate insulating film and three important documents of large-area implanting ions technology.
Price based on glass substrate is considered, and carry out the growth of film under the employing low-temperature condition, so solid-phase crystallization method (Solid Phase Crystallization was arranged before this, SPC) introduction, but the temperature of its reaction is still higher, reaction temperature be about 600 the degree and crystallinity poor, afterwards, then develop and excimer laser crystallizationization (the Excimer Laser Crystallization that excimer laser (Excimer Laser) is applied to above-mentioned low temperature thin film crystallization, ELC) or quasi-molecule laser annealing (Excimer Laser Annealing, ELA) technology makes its fusion by using laser that amorphous silicon membrane is scanned, and is recrystallized into to be polysilicon membrane again.
Because excimer laser crystallization technology has the ability that technological temperature is brought down below 450 degree Celsius, and have electron mobility and the lower leakage current high than the solid-phase crystallization method by the formed polysilicon membrane of laser crystallization method, thereby can adopt the more glass substrate of low price, further reduce the cost of technology, and obtain preferable thin-film transistor element characteristic.
Figure 1A to Figure 1B is depicted as the manufacturing flow chart of known polysilicon membrane.
At first, please refer to Figure 1A, a substrate 100 is provided, have insulating barrier 102 in this substrate 100, then on insulating barrier 102, form the smooth amorphous silicon layer 104 of layer of surface again.After amorphous silicon layer 104 depositions, utilize the excimer laser 106 of enough energy, make amorphous silicon layer 104 be close to complete fusion.So-called almost completely fusion refer on the surface of insulating barrier can more remaining not fusion amorphous silicon particle (not icon) with as crystal seed.
Then please refer to Figure 1B, the amorphous silicon layer 104 of fusion is crystal seed (Discrete Seeds) with the amorphous silicon particle of not fusion, becomes polysilicon layer 108 behind the crystallization, and this polysilicon layer 108 is regions and source and the passage area that are used for thin-film transistor.
General in the crystallization process of known polysilicon membrane, necessarily need energy density with excimer laser be controlled at just can to allow almost completely fusion of amorphous silicon layer, simultaneously amorphous silicon particle that again can more residual not fusion is with the crystal seed as crystallization, so just have preferable crystallization effect, but excimer laser belongs to pulse type laser, the energy density of each pulse is difference all to some extent, so the control of excimer laser on energy density is difficult for, make that the size dimension of last crystal grain is inconsistent, and form many projections (Protrusion) in the grain boundary, and then cause the uniformity of polysilicon membrane not good, and influence the transistorized element characteristic of subsequent thin film.
Summary of the invention
Therefore, purpose of the present invention is in the manufacture method that proposes a kind of polysilicon membrane, can form crystal grain with large-size, and can reduce the quantity and the density of the projection that is formed at the grain boundary, obtaining having the polysilicon membrane of preferable surface flatness, and this polysilicon membrane has preferable element characteristic when being applied to thin-film transistor and/or other electron component.
The present invention proposes a kind of manufacture method of polysilicon membrane, and the method is for providing a substrate, and forms first polysilicon layer in substrate, wherein has a plurality of first projections of differing heights on first polysilicon layer.Then, form first amorphous silicon layer on first polysilicon layer, have second projection of differing heights on this first amorphous silicon layer, the top of these a little second projections and the ultimate range of substrate surface are X
1, with the minimum range of substrate surface be Y
1Next carry out laser annealing technique, gross thickness is lower than Z
1First amorphous silicon layer and the partial melting of first polysilicon layer (Y wherein
1＜Z
1＜X
1).At this moment, the distance of top and substrate surface is greater than Z
1The fully fusion of a part second projection, keep solid-stately, and become a plurality of silicon particles, the number of these silicon particles can be less than the number of first projection.Next carry out crystallization step, this moment, the silicon atom of molten state can be a crystal seed with these silicon particles, and the crystallization post crystallization is grown into second polysilicon layer.
The present invention proposes the manufacture method of another kind of polysilicon membrane, the method is for providing a substrate, then in substrate, form first polysilicon layer, wherein have a plurality of first projections on first polysilicon layer, and these a little first projections have differing heights, and the ultimate range of the top of first projection and substrate surface is X
2, with the minimum range of substrate surface be Y
2Then, first polysilicon layer is carried out etch process, thickness is lower than Z
2First polysilicon layer partly remove (Y wherein
2＜Z
2＜X
2).At this moment, the distance of top and substrate surface is greater than Z
2First polysilicon layer part not by complete etching, thereby on substrate surface, form a plurality of silicon particles, the number of these silicon particles can be less than the number of first projection.Then, on substrate and silicon particle, form first amorphous silicon layer, carry out laser annealing technique again.By suitable laser energy is provided, it is solid-state making the complete fusion of first amorphous silicon layer and keeping silicon particle.Next carry out crystallization step, this moment, the silicon atom of molten state can be a crystal seed with these silicon particles, and the crystallization post crystallization is grown into second polysilicon layer.
As mentioned above, the present invention is that protrusion of surface has the phenomenon of differing heights when utilizing general polysilicon layer to form, use the highly higher projection of part to produce crystal seed, be used in the ensuing curing schedule, therefore can make the polysilicon membrane of new formation have the even and bigger crystal grain of particle of size, and have quantity and the less projection of density, and then has preferable surface flatness.
And, by the formed polysilicon membrane of said method, can be applied to polycrystalline SiTFT and/or other electron component, and possess good element characteristic is arranged.
Description of drawings
Figure 1A to Figure 1B is depicted as the manufacturing flow chart of known polysilicon membrane.
Fig. 2 A to Fig. 2 F is depicted as the process section according to the manufacture method of the polysilicon membrane of first embodiment of the invention.
Fig. 3 A to Fig. 3 G is depicted as the process section according to the manufacture method of the polysilicon membrane of second embodiment of the invention.
Figure 4 shows that formed polysilicon layer among Fig. 2 C and Fig. 3 C is tested the rising height of gained to projection quantity distribution map.
100,200,300: substrate
102,202,302: insulating barrier
104,204,214,304,316: amorphous silicon layer
106: excimer laser
108,208,224,308,326: polysilicon layer
206,306: the first laser annealing techniques
207,307: the amorphous silicon particle
210,310: the grain boundary
212,215,312,317: projection
218,318: the second laser annealing techniques
220,320: liquid silicon layer
222,315: silicon particle
314: etch process
D1, D2, D3, D4, D5, D6: thickness
S1: tangent line
Embodiment
First embodiment
Please refer to Fig. 2 A to Fig. 2 F, it is the manufacturing process profile according to the polysilicon membrane of first embodiment of the invention.
At first, please earlier with reference to Fig. 2 A, one substrate 200 is provided, this substrate 200 for example is a Silicon Wafer, glass substrate or plastic base, on substrate 200, form an insulating barrier 202, the material of this insulating barrier 202 for example is a silicon dioxide, the mode that forms for example is with low-pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition, LPCVD), plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) or the mode of sputter (Sputter), in substrate 200, form the layer of silicon dioxide layer.Then on insulating barrier 202, form one deck amorphous silicon layer 204 again, this amorphous silicon layer 204 for example forms with Low Pressure Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method or in the mode of sputter, wherein formed amorphous silicon layer 204 has thickness D1, and thickness D1 for example is about 1nm to 1000nm.
Then, please refer to Fig. 2 B, carry out one first laser annealing technique 206, wherein this first laser annealing technique 206 for example is with excimer laser amorphous silicon layer 204 to be shone.So that amorphous silicon layer 204 is close to complete fusion, and the amorphous silicon particle 207 of more remaining not fusion on the surface of insulating barrier 202, crystallization position (Nucleation the Site)/crystal seed with as crystallization the time.
Then, please refer to Fig. 2 C, the amorphous silicon layer 204 of fusion is crystallization position (crystal seed) with the amorphous silicon particle 207 of not fusion, and the crystallization post crystallization is grown into polysilicon layer 208, and polysilicon layer 208 has thickness D2, and this thickness D2 for example is about 1nm to 1000nm.Shown in Fig. 2 C, in the process of crystallization, crystal grain can laterally be grown up (lateralgrowth) by crystallization position till touch adjacent crystal grain, and in the grain boundary 210 of adjacent crystal grain, the result that can push mutually owing to two crystal grain forms projection 212.Generally speaking, these a little projections 212 are subjected to factor affecting such as the growth rate, the postradiation Temperature Distribution of amorphous silicon layer 204 Stimulated Light of distance, crystal grain between the crystallization position, make projection 212 present different height and distribute.
Then, please refer to Fig. 2 D, on the polysilicon layer 208 of crystallization, form one deck amorphous silicon layer 214, this amorphous silicon layer 214 for example forms with Low Pressure Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method or in the mode of sputter, wherein formed amorphous silicon layer 214 has thickness D3, and thickness D3 for example is about 1nm to 1000nm.And, as shown in Figure 6, projection 212 that also can corresponding polysilicon layer 208 on amorphous silicon layer 214, and on the amorphous silicon layer 214 of projection 212 tops, form corresponding projection 215.Even in these a little projections 215, the ultimate range on its top and insulating barrier 202 surfaces is X
1(not icon), and with the minimum range on insulating barrier 202 surfaces be Y
1(not icon).
Then, please refer to Fig. 2 E, carry out one second laser annealing technique 218, wherein this second laser annealing technique 218 for example is to use excimer laser that amorphous silicon layer 214 is shone, so that amorphous silicon layer 214 changes liquid silicon layer 220 into polysilicon layer 208, and on the surface of insulating barrier 202, form the residual silicon particulate 222 of not fusion.Wherein the energy density of this excimer laser is to be decided with the height of projection 215 by amorphous silicon layer 214, polysilicon layer 208.Energy density by the control excimer laser is lower than Z with gross thickness
1First amorphous silicon layer and the partial melting of first polysilicon layer (Y wherein
1＜Z
1＜X
1).At this moment, the distance of top and substrate surface is greater than Z
1The fully fusion of a part second projection, keep solid-stately, and become a plurality of silicon particles, the number of these silicon particles can be less than the number of first projection.Next carry out crystallization step, this moment, the silicon atom of molten state can be a crystal seed with these silicon particles, and the crystallization post crystallization is grown into second polysilicon layer.
That is be represented as shown in the formula (1):
Y
1＜Z
1＜X
1 (1)
By above-mentioned formula (1) as can be known, the distance of top and insulating barrier 202 is less than Z
1Projection 216 will be by the complete fusion of excimer laser, as for the distance of projection 216 tops and insulating barrier 202 greater than Z
1The zone because this excimer laser technology is by projection 215 surperficial basad 200 fusions with amorphous silicon layer 214, so at fusion Z
1The degree of depth after, (X is still arranged
1-Z
1) the polysilicon material of thickness can't fusion, the part that this a bit can't fusion is the above-mentioned silicon particle that is arranged at insulating barrier 202 222.
At last, please refer to Fig. 2 F, next carry out crystallization step, the liquid silicon layer 220 of fusion this moment can be crystallization position (crystal seed) with silicon particle 222, and the crystallization post crystallization is grown into polysilicon layer 224.
Second embodiment
Please refer to Fig. 3 A to Fig. 3 G, it is the manufacturing process profile according to the polysilicon membrane of second embodiment of the invention.
At first, please earlier with reference to Fig. 3 A, one substrate 300 is provided, this substrate 300 for example is Silicon Wafer, glass substrate or plastic base, on substrate 300, form an insulating barrier 302, wherein the material of this insulating barrier 302 for example is a silicon dioxide, and the method for formation for example is with Low Pressure Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method or in the mode of sputter, forms the layer of silicon dioxide layer in substrate 300.Then on insulating barrier 302, form one deck amorphous silicon layer 304 again, this amorphous silicon layer 304 for example forms with Low Pressure Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method or in the mode of sputter, wherein formed amorphous silicon layer 304 has thickness D4, and thickness D4 for example is about 1nm to 1000nm.
Then, please refer to Fig. 3 B, carry out one first laser annealing technique 306, wherein this first laser annealing technique 306 for example is with excimer laser amorphous silicon layer 304 to be shone, so that amorphous silicon layer 304 is close to complete fusion, and go up the amorphous silicon particles 307 of more remaining not fusions in insulating barrier 302 surface, the crystallization position/crystal seed with as crystallization the time.
Then, please refer to Fig. 3 C, is crystallization position (crystal seed) with the amorphous silicon layer 304 of fusion with the amorphous silicon particle 307 of not fusion, and the crystallization post crystallization is grown into polysilicon layer 308, wherein the thickness of this polysilicon layer 308 for example is D5, and thickness D5 for example is about 1nm to 1000nm.And, shown in Fig. 3 C, in the process of crystallization, crystal grain can by crystallization position laterally grow to touch adjacent crystal grain till, and in the grain boundary 310 of adjacent crystal grain, the result that can push mutually owing to two crystal grain forms projection 312.Generally speaking, these a little projections 312 can be subjected to the influence of all factors such as the growth rate, the postradiation Temperature Distribution of amorphous silicon layer 304 Stimulated Light of distance, crystal grain between the crystallization position, make projection 312 present different height and distribute.Even, in these a little projections 312, with the ultimate range on insulating barrier 302 surfaces be X
2(not icon), and with the minimum range on insulating barrier 302 surfaces be Y
2(not icon).
Then, please refer to Fig. 3 D, polysilicon layer 308 is carried out an etch process 314, thickness is lower than Z
2Polysilicon layer 308 parts remove (Y wherein
2＜Z
2＜X
2).At this moment, wherein etch process 314 for example is to use the anisotropic etching method, and etching gross thickness Z
2Be ultimate range X between projection 312 and insulating barrier 202
2With minimum range Y
2Between, that is be represented as shown in the formula (2):
Y
2＜Z
2＜X
2 (2)
In above-mentioned technology and since control etch process 314 with the top height at Z
2Following projection 312 is removed with polysilicon layer 308 etchings, and the distance of projection 312 tops and substrate surface is greater than Z
2First polysilicon layer part not by complete etching, thereby on substrate surface, form a plurality of silicon particles 315, and the number of these silicon particles 315 can be less than the number of projection 312.
Then, please refer to Fig. 3 E, form one deck amorphous silicon layer 316, this amorphous silicon layer 316 for example is to form with Low Pressure Chemical Vapor Deposition, plasma enhanced chemical vapor deposition method or in the mode of sputter, wherein formed amorphous silicon layer 316 has thickness D6, and thickness D6 for example is about 1nm to 1000nm.And, shown in Fig. 3 D, the silicon particle 315 on also can corresponding insulating barrier 302 on the amorphous silicon layer 316, and on the amorphous silicon layer 316 of silicon particle 315 tops, form corresponding projection 317.
Then, please refer to Fig. 3 F, carry out one second laser annealing technique 318, wherein this second thermal anneal process 318 for example is to use excimer laser that amorphous silicon layer 316 is shone, so that amorphous silicon layer 316 changes liquid silicon layer 320 into, and go up the polycrysalline silcons (that is be in Fig. 3 D residual silicon particle 315) of residual not fusions in insulating barrier 302 surface.Wherein the energy density of this excimer laser is adjusted to silicon particle 315 is melted fully.Because the energy density of excimer laser is controlled in the above-mentioned scope, so silicon particle 315 can't be by fusion completely, and can be in order to as crystallization position (crystal seed).
At last, please refer to Fig. 3 G, next carry out crystallization step, the liquid silicon layer 320 of fusion this moment can be new crystallization position (crystal seed) with silicon particle 315, and the crystallization post crystallization is grown into polysilicon layer 324.
In above-mentioned first embodiment and second embodiment, between substrate 200,300 and amorphous silicon layer 204,304, be formed with insulating barrier 202,302, so X
1, X
2, Y
1, Y
2, Z
1, Z
2Represented be and insulating barrier 202 between distance, under the situation that does not form insulating barrier 202, X then
1, X
2, Y
1, Y
2, Z
1, Z
2Represented then become and substrate 200 between distance.
Even in above-mentioned first embodiment, both can be considered a solid-state silicon layer polysilicon layer of Fig. 2 D 208 and amorphous silicon layer 214, and amorphous silicon layer 214 is carried out laser annealing technique 218 can be considered fluidisation step to solid-state silicon layer of Fig. 2 E.
In addition, in above-mentioned second embodiment, by Fig. 3 D polysilicon 308 is carried out etch process 314, and even amorphous silicon layer 316 carried out laser annealing technique 318 can be considered a fluidisation step of Fig. 3 F.
Please refer to Fig. 4, Figure 4 shows that the rising height distribution map of formed polysilicon layer among Fig. 2 C and Fig. 3 C being tested gained, and the transverse axis in Fig. 4 is the height of projection that the longitudinal axis is the quantity of projection.By the curve among Fig. 4 as can be known, the height of projection is Gaussian Profile to the curve of quantity, that is be more near the projection quantity of mean value height the more, and move then then gradually minimizing of the quantity of projection by the direction of average height to both sides (that is being) to maximum height and minimum altitude.As shown in Figure 4, the present invention utilizes above-mentioned first embodiment and the described method of second embodiment, projection below the certain altitude is removed (as the projection of tangent line S1 left side to fall among Fig. 4), therefore the quantity and the density of projection are able to a large amount of minimizings, and utilize remaining projection as new crystallization position, and can grow the crystal grain of larger particles and polysilicon membrane with less projection.So that polysilicon membrane has preferable flatness, and possess element characteristics such as good electron mobility and close current when being applied to thin-film transistor.
In sum, polysilicon membrane of the present invention has following advantage:
1. the present invention is by deposition one deck amorphous silicon layer on the polysilicon layer of crystallization, carry out the mode of excimer laser technology again, be minimized the quantity and the density of projection in the polysilicon layer, and with remaining projection (polycrysalline silcon) as new crystallization position, therefore can make the polysilicon membrane of new formation have the even and bigger crystal grain of particle of size, and then have preferable surface flatness.
2. the present invention carries out etching by the polysilicon layer to crystallization, deposit one deck amorphous silicon layer more thereon, carry out the mode of excimer laser technology thereafter, and can reduce the quantity and the density of projection in the polysilicon layer, and with remaining projection as new crystallization position, therefore can make the polysilicon membrane of new formation have the even and bigger crystal grain of particle of size, and have quantity and the less projection of density, and then have preferable surface flatness.
3. by the formed polysilicon membrane of above-mentioned two methods, can be applied to the passage polysilicon membrane of thin-film transistor, and possess element characteristics such as good electron mobility and close current are arranged.In addition, the formed polysilicon membrane of the present invention is also applicable on the other electron component, for example the drive circuit of COG technology.
Claims (22)
1. the manufacture method of a polysilicon membrane is characterized in that, this method comprises the following step:
In a substrate, form one first solid-state silicon layer, wherein have a plurality of first projections of differing heights on this first solid-state silicon layer, and the ultimate range of the top of those first projections and this substrate surface is X
1, the top of those first projections and the minimum range of this substrate surface are Y
1
This first solid-state silicon layer is carried out a fluidisation step, and making thickness is Z
1This first solid state si layer segment become fluid, and Y
1＜Z
1＜X
1, wherein the distance of top and this substrate surface is greater than Z
1Those first raised areas of part perfect fluidization not, and form a plurality of silicon particles; And
As crystal seed, carry out a crystallization processes with those silicon particles.
2. the manufacture method of polysilicon membrane as claimed in claim 1 is characterized in that, this first solid-state silicon layer comprises one first polysilicon layer and one first amorphous silicon layer, and the formation method of this first solid-state silicon layer comprises the following step:
In this substrate, form one first polysilicon layer, wherein have a plurality of polysilicon projections of differing heights on this first polysilicon layer; And
On this first polysilicon layer, form one first amorphous silicon layer.
3. the manufacture method of polysilicon membrane as claimed in claim 2 is characterized in that, the formation method of this first polysilicon layer comprises the following step:
In this substrate, form one second amorphous silicon layer;
Apply energy in this second amorphous silicon layer, make the part of this second amorphous silicon layer become the second liquid silicon layer of fusion, wherein this second amorphous silicon layer not the part of fusion form a plurality of amorphous silicon particles; And
Carry out crystallization step, this second liquid silicon layer can be a crystal seed with those amorphous silicon particles, and crystalline growth forms this first polysilicon layer.
4. the manufacture method of polysilicon membrane as claimed in claim 2 is characterized in that, this fluidisation step is to apply a laser energy in this first solid-state silicon layer, and making thickness is Z
1This first solid state si layer segment become one first liquid silicon layer of molten condition.
5. the manufacture method of polysilicon membrane as claimed in claim 4 is characterized in that, this crystallization processes comprises the following step:
Reduce temperature, this first liquid silicon layer can be with those silicon particles as crystal seed, and crystalline growth forms this polysilicon membrane.
6. the manufacture method of polysilicon membrane as claimed in claim 5 is characterized in that, the thickness of this first polysilicon layer is 1nm to 1000nm.
7. the manufacture method of polysilicon membrane as claimed in claim 5 is characterized in that, this laser energy is produced by an excimer laser.
8. the manufacture method of polysilicon membrane as claimed in claim 5 is characterized in that, more is included in the step that forms an insulating barrier between this substrate and this first polysilicon layer.
9. the manufacture method of polysilicon membrane as claimed in claim 1 is characterized in that, this first solid-state silicon layer is one first polysilicon layer, and the formation method of this first polysilicon layer comprises the following step:
In this substrate, form one second amorphous silicon layer;
Apply energy in this second amorphous silicon layer, make the part of this second amorphous silicon layer become the second liquid silicon layer of fusion, wherein this second amorphous silicon layer not the part of fusion form a plurality of amorphous silicon particles; And
Carry out crystallization step, this second liquid silicon layer can be a crystal seed with those amorphous silicon particles, and crystalline growth forms this first polysilicon layer, wherein has a plurality of first projections of differing heights on this first polysilicon layer.
10. the manufacture method of polysilicon membrane as claimed in claim 1 is characterized in that, the formation method of this first solid-state silicon layer comprises the following step:
In this substrate, form one second amorphous silicon layer;
Apply energy in this second amorphous silicon layer, make the part of this second amorphous silicon layer become the second liquid silicon layer of fusion, wherein this second amorphous silicon layer not the part of fusion form a plurality of amorphous silicon particles;
Carry out crystallization step, this second liquid silicon layer can be a crystal seed with those amorphous silicon particles, and crystalline growth forms one first polysilicon layer, wherein has a plurality of first projections of differing heights on this first polysilicon layer;
This first polysilicon layer is carried out an etch process; And
Form one the 3rd amorphous silicon layer on this substrate and those silicon particles.
11. the manufacture method of polysilicon membrane as claimed in claim 10, it is characterized in that, this fluidisation step comprises: apply a laser energy in the 3rd amorphous silicon layer and those silicon particles, make the 3rd amorphous silicon layer become the 3rd liquid silicon layer of fusion, wherein fusion fully of those silicon particles.
12. the manufacture method of polysilicon membrane as claimed in claim 10 is characterized in that, this etch process is that non-grade is to etching.
13. the manufacture method of polysilicon membrane as claimed in claim 11 is characterized in that, this crystallization processes comprises the following step:
Carry out crystallization step, the 3rd liquid silicon layer can be a crystal seed with those silicon particles, and crystalline growth forms this polysilicon membrane.
14. the manufacture method of polysilicon membrane as claimed in claim 13 is characterized in that, the thickness of this first polysilicon layer is 1nm to 1000nm.
15. the manufacture method of polysilicon membrane as claimed in claim 13 is characterized in that, this laser energy is produced by an excimer laser.
16. the manufacture method of polysilicon membrane as claimed in claim 13 is characterized in that, more is included in the step that forms an insulating barrier between this substrate and this first polysilicon layer.
17. the manufacture method of a polysilicon membrane is characterized in that, this method comprises the following steps: at least
One substrate is provided;
In this substrate, form one first polysilicon layer, wherein have a plurality of first projections of differing heights on this first polysilicon layer, and the ultimate range of those first projections and this substrate surface is X
1, the minimum range of those first projections and this substrate surface is Y
1
On this first polysilicon layer, form one first amorphous silicon layer; And
Carry out one first annealing process, being Z with gross thickness
1Those first projections, this first amorphous silicon layer and this fusion of first polysilicon layer, wherein Y
1＜Z
1＜X
1, so that form a plurality of second projections on this substrate surface, and the number of those second projections is less than the number of those first projections, and is crystal seed with those second projections, carries out crystallization step to form one second polysilicon layer.
18. the manufacture method of polysilicon membrane as claimed in claim 17 is characterized in that, the method that forms this first polysilicon layer comprises the following steps:
In this substrate, form one second amorphous silicon layer; And
Carry out one second annealing process, and incomplete this second amorphous silicon layer of fusion, wherein this second amorphous silicon layer not fully the part of fusion be the amorphous silicon particle that is positioned on this substrate surface, and be crystal seed with those amorphous silicon particles, the step of carrying out crystallization again is to form this first polysilicon layer.
19. the manufacture method of polysilicon membrane as claimed in claim 17 is characterized in that, more is included in and forms an insulating barrier between this substrate and this first polysilicon layer.
20. the manufacture method of a polysilicon membrane is characterized in that, this method comprises the following steps: at least
One substrate is provided;
In this substrate, form one first polysilicon layer, wherein have a plurality of first projections on this first polysilicon layer, and those first projections have differing heights, and the ultimate range of those first projections and this substrate surface is X
2, the minimum range of those first projections and this substrate surface is Y
2
This first polysilicon layer is carried out an etch process, is those first projections and this first polysilicon layer, the wherein Y of Z2 to remove gross thickness
2＜Z
2＜X
2, with a plurality of second projections of formation in this substrate, and the number of those second projections is less than the number of those first projections;
On this substrate and those second projections, form one first amorphous silicon layer; And
Carrying out one first annealing process, is that crystal seed carries out crystallization step to form one second polysilicon layer with those second projections.
21. the manufacture method of polysilicon membrane as claimed in claim 20 is characterized in that, the method that forms this first polysilicon layer comprises the following steps:
On this insulating barrier, form one second amorphous silicon layer; And
Carry out one second annealing process, and incomplete this second amorphous silicon layer of fusion, wherein the not part of complete fusion of this second amorphous silicon layer is a plurality of amorphous silicon particles that are positioned on this substrate surface, and be crystal seed with those amorphous silicon particles, carry out crystallization step to form this first polysilicon layer.
22. the manufacture method of polysilicon membrane as claimed in claim 20 is characterized in that, this etch process comprises the anisotropic etching method.
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| CN104681407A (en) * | 2013-12-02 | 2015-06-03 | 北京有色金属研究总院 | Method for preparing polycrystalline silicon thin film and controlling grain size thereof |
| CN104362084B (en) * | 2014-10-08 | 2018-04-13 | 昆山工研院新型平板显示技术中心有限公司 | Low-temperature polysilicon film and preparation method thereof, low-temperature polysilicon film transistor |
| CN104485276B (en) * | 2014-12-31 | 2017-04-19 | 深圳市华星光电技术有限公司 | Method for manufacturing smooth polycrystalline silicon film and array substrate |
| CN106744659B (en) * | 2016-12-13 | 2018-09-07 | 杭州电子科技大学 | Research method based on laser controlling nanostructure silicon substrate surface form |
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|---|---|---|---|---|
| JPH06310745A (en) * | 1993-04-23 | 1994-11-04 | Canon Inc | Fabrication of thin film polysilicon solar cell |
| JPH09115833A (en) * | 1995-10-07 | 1997-05-02 | Hyundai Electron Ind Co Ltd | Manufacture of polysilicon film in semiconductor device |
| US5683935A (en) * | 1995-02-28 | 1997-11-04 | Fuji Xerox Co., Ltd. | Method of growing semiconductor crystal |
| US6432758B1 (en) * | 2000-08-09 | 2002-08-13 | Huang-Chung Cheng | Recrystallization method of polysilicon film in thin film transistor |
| CN1396629A (en) * | 2001-07-11 | 2003-02-12 | Lg.飞利浦Lcd有限公司 | Polysilicon crystallization method, thin film transistor and manufacture method of liquid crystal display thereof |
| US6545294B1 (en) * | 1999-05-18 | 2003-04-08 | Hitachi, Ltd. | Electronic apparatus having semiconductor device including plurality of transistors formed on a polycrystalline layered structure in which the number of crystal grains in each polycrystalline layer is gradually reduced from lower to upper layer |
-
2003
- 2003-06-16 CN CNB031428827A patent/CN1295751C/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06310745A (en) * | 1993-04-23 | 1994-11-04 | Canon Inc | Fabrication of thin film polysilicon solar cell |
| US5683935A (en) * | 1995-02-28 | 1997-11-04 | Fuji Xerox Co., Ltd. | Method of growing semiconductor crystal |
| JPH09115833A (en) * | 1995-10-07 | 1997-05-02 | Hyundai Electron Ind Co Ltd | Manufacture of polysilicon film in semiconductor device |
| US6545294B1 (en) * | 1999-05-18 | 2003-04-08 | Hitachi, Ltd. | Electronic apparatus having semiconductor device including plurality of transistors formed on a polycrystalline layered structure in which the number of crystal grains in each polycrystalline layer is gradually reduced from lower to upper layer |
| US6432758B1 (en) * | 2000-08-09 | 2002-08-13 | Huang-Chung Cheng | Recrystallization method of polysilicon film in thin film transistor |
| CN1396629A (en) * | 2001-07-11 | 2003-02-12 | Lg.飞利浦Lcd有限公司 | Polysilicon crystallization method, thin film transistor and manufacture method of liquid crystal display thereof |
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| CN1567534A (en) | 2005-01-19 |
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