CN1326432C - High-density circuit board without weld pad design and manufacturing method thereof - Google Patents

High-density circuit board without weld pad design and manufacturing method thereof Download PDF

Info

Publication number
CN1326432C
CN1326432C CNB021573921A CN02157392A CN1326432C CN 1326432 C CN1326432 C CN 1326432C CN B021573921 A CNB021573921 A CN B021573921A CN 02157392 A CN02157392 A CN 02157392A CN 1326432 C CN1326432 C CN 1326432C
Authority
CN
China
Prior art keywords
circuit board
welding resisting
external connector
resisting layer
weld pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB021573921A
Other languages
Chinese (zh)
Other versions
CN1510979A (en
Inventor
谢翰坤
林蔚峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Silicon Integrated Systems Corp
Original Assignee
Silicon Integrated Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Silicon Integrated Systems Corp filed Critical Silicon Integrated Systems Corp
Priority to CNB021573921A priority Critical patent/CN1326432C/en
Publication of CN1510979A publication Critical patent/CN1510979A/en
Application granted granted Critical
Publication of CN1326432C publication Critical patent/CN1326432C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Abstract

The present invention discloses a high density circuit board without weld pad design and a manufacturing method of the high density circuit board without weld pad design. The method comprises the following steps: base material of a circuit board is provided; an external line which comprises a plurality of external contact points is formed; an anti-weld layer is formed for covering the base material of the circuit board and the external line and is provided with a plurality of anti-weld layer openings; the external contact points are exposed, a plurality of conduction convex blocks are respectively formed on the external contact points within the range of the anti-weld layer openings, the conduction convex blocks are used for being connected with an external component, and the high density circuit board without weld pad design is formed. A limited factor for the dimension of the weld pad is relieved by the present invention. The number of circuit layers or the surface area of the circuit board is not increased, more lines can be held in the same layer of circuit, and therefore, the thickness, the surface area and the manufacturing cost of the high density circuit board are reduced, which helps the dimension of an end product to be reduced.

Description

The high density circuit board and the manufacture method thereof of no weld pad design
Technical field
The present invention relates to a kind of circuit board, particularly relevant for a kind of high density circuit board and manufacture method thereof.
Technical background
With on the work market electronic product being wanted light, book, weak point, little demand,,, put into outside the more electronic component at the semiconductor substrate of limited area except must in the design of IC wafer, working hard; In the design of circuit board, particularly be used for encapsulating crystal-coated packing substrate plate, the general bga substrate that above-mentioned IC wafer connects, or be used for connecting the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, also must in limited area, put into more highdensity circuit trace.Yet in the circuit design of foregoing circuit plate, its external connector be designed to the key factor that the restriction foregoing circuit is walked line density.
Please refer to Fig. 1, is to be example with a traditional crystal-coated packing substrate plate, illustrates that how the design of its external connector causes restriction to the density of its circuit trace.In Fig. 1, weld pad 112 is the external connector of outside line 110, the diameter R of weld pad 112 12~10 times of being generally outside line 110 live width W are big, therefore line-spacing in the outside line 110 between each lead 114 is subjected to the restriction of weld pad 112, for adjacent circuit is short-circuited, the line-spacing in the outside line 110 between each lead 114 must be greater than lead 114 live width W and weld pad 112 diameter R 1Sum (W+R 1) half.During greater than the circuit board of 180 μ m, do not cause very big influence in the designed lines spacing as yet; But when circuit boards such as design example such as crystal-coated packing substrate plate, the contact spacing of the IC wafer that it connected is usually less than 180 μ m, usually have because of being subject to weld pad 112 diameters, and can't the line-spacing between each lead 114 be that means increase under the situation of the line density in the unit are in the outside line 110 to dwindle, can only hold needed number of, lines with the circuit number of plies that increases crystal-coated packing substrate plate 100 or the area that increases crystal-coated packing substrate plate 100, but therefore increased the thickness of crystal-coated packing substrate plate 100, area and manufacturing cost also are unfavorable for the reduction of end product size.And in other the design of circuit board line, for example general bga substrate, or be used for connecting the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, also run into identical problem.
Summary of the invention
In view of this, main purpose of the present invention provides a kind of high density circuit board that does not have the weld pad design, when the circuit cabling designs, exempt the restraining factors of above-mentioned weld pad size, and can under the situation of the circuit number of plies that does not increase circuit board or surface area, in circuit, hold more number of, lines with one deck, reducing thickness, surface area and the manufacturing cost of above-specified high density circuit board, and can help the reduction of end product size.
Another object of the present invention provides a kind of manufacture method of not having the high density circuit board of weld pad design, under the situation of the circuit number of plies that does not increase circuit board or surface area, in circuit with one deck, hold more number of, lines, reducing thickness, surface area and the manufacturing cost of above-specified high density circuit board, and can help the reduction of end product size.
For reaching above-mentioned purpose, the technical solution adopted in the present invention is:
A kind of high density circuit board that does not have the weld pad design is provided, comprises:
One board substrate, a surface of foregoing circuit plate substrate is a dielectric substance layer;
One outside line is formed on the above-mentioned dielectric substance layer, and the said external circuit comprises a plurality of external connector, and the width of those external connector is not more than the live width of this outside line;
One welding resisting layer covers above-mentioned dielectric substance layer and said external circuit, and this welding resisting layer has a plurality of welding resisting layer openings, exposes the said external contact, and the diameter of above-mentioned welding resisting layer opening is not less than the width of above-mentioned each external connector that is exposed respectively; And
The plural conductive projection is formed at respectively on the said external contact in the above-mentioned welding resisting layer opening scope, in order to form electrically connect with an outer member.And
This outer member comprises at least: semiconductor wafer, semiconductor chip package, light-emitting component, connector, passive device or another circuit board.
The present invention also provides a kind of manufacture method of not having the high density circuit board of weld pad design, comprises:
One board substrate is provided, and a surface of foregoing circuit plate substrate is a dielectric substance layer;
Form an outside line on above-mentioned dielectric substance layer, the said external circuit comprises a plurality of external connector, and the width of said external contact is not more than the live width of this outside line;
Form a welding resisting layer, cover above-mentioned dielectric substance layer and said external circuit, above-mentioned welding resisting layer has a plurality of welding resisting layer openings, exposes the said external contact, and the diameter of above-mentioned welding resisting layer opening is not less than the width of above-mentioned each external connector that is exposed respectively; And
On the said external contact in the above-mentioned welding resisting layer opening scope, form the plural conductive projection.
By said method, the generation type of those conductive projections is an electroless plating.
By said method, the generation type of those conductive projections also can be plating.
Generation type by above-mentioned conductive projection is the method for electroless plating, should/height of those conductive projections is not higher than the thickness of this welding resisting layer.
Generation type by above-mentioned conductive projection is an electric plating method, and the generation type of those conductive projections more comprises:
Form the metal level of a conduction, cover on this welding resisting layer, those welding resisting layer openings and those external connector;
Form a blocking layer, cover on the metal level of this conduction;
Graphical this blocking layer exposes the metal level that covers this conduction on those welding resisting layer openings and those external connector;
This board substrate is placed an electroplate liquid, and make the metal level energising of this conduction, those conductive projections are plated on those external connector; And
Removal covers this blocking layer on this welding resisting layer and the metal level of this conduction.
Generation type by above-mentioned conductive projection is an electric plating method, and the height of those conductive projections is higher than the thickness 20 μ m~60 μ m of this welding resisting layer.
A kind of high density circuit board that does not have the weld pad design is applicable to an outer member that has formed pin or projection to form electrically connect, it is characterized in that, comprises at least:
One board substrate, a surface of this board substrate is a dielectric substance layer;
One outside line is formed on this dielectric substance layer, and this outside line comprises a plurality of external connector, and the width of those external connector is not more than the live width of this outside line;
One welding resisting layer covers this dielectric substance layer and this outside line, and this welding resisting layer has a plurality of welding resisting layer openings, exposes those external connector to the open air, and the diameter of those welding resisting layer openings is not less than the width of respectively this external connector that is exposed respectively; And
A plurality of metal couplings be formed at respectively on those external connector in those welding resisting layer opening scopes with electroless plating, and the height of those metal couplings are not higher than the thickness of this welding resisting layer.
A kind of high density circuit board that does not have the weld pad design is applicable to and the outer member formation electrically connect of a no pin or projection, it is characterized in that, comprises at least:
One board substrate, a surface of this board substrate is a dielectric substance layer;
One outside line is formed on this dielectric substance layer, and this outside line comprises a plurality of external connector, and the width of those external connector is not more than the live width of this outside line;
One welding resisting layer covers this dielectric substance layer and this outside line, and this welding resisting layer has a plurality of welding resisting layer openings, exposes those external connector to the open air, and the diameter of those welding resisting layer openings is not less than the width of respectively this external connector that is exposed respectively; And
A plurality of metal couplings, electroplating on those external connector be formed at respectively in those welding resisting layer opening scopes, and the height of those metal couplings is higher than the thickness 20 μ m~60 μ m of this welding resisting layer.
Advantage of the present invention and good effect are:
One, a kind of high density circuit board that does not have the weld pad design provided by the invention, when the circuit cabling designs, exempt the restraining factors of weld pad size, and can be under the situation of the circuit number of plies that does not increase circuit board or surface area, in circuit with one deck, hold more number of, lines, reducing thickness, surface area and the manufacturing cost of above-specified high density circuit board, and can help the reduction of end product size.
Two, the high density circuit board of the no weld pad design of its substrate is because of external connector with no weld pad design and the projection that replaces the weld pad function, with after the IC wafer combines, the height and the width of chip-covered boss can be affected hardly, have reduced contiguous chip-covered boss because of the bridge joint short risk; And not only in the application of crystal-coated packing substrate plate, in other neck city, also lowered as the chip-covered boss bridge joint of above-mentioned vicinity and the problem of the risk that is short-circuited.
Three, its outer member can be skipped the processing procedure of for example planting formation pins such as ball, direct and high density circuit board forms and electrically connects, so can reduce the fabrication steps of semiconductor packages or electronic product assembling, not only can shorten the processing procedure time and increase output, and reducing under the situation that a fabrication steps just reduces the risk that yield reduces, more can promote process rate, reduce production costs.
Four, there being enough spaces when filling primer, to flow between crystal-coated packing substrate plate and the IC wafer, not only can reduce the processing procedure time of wafer be adhered on substrate, can also reduce the risk that the primer cavity takes place for primer.
Description of drawings
Fig. 1 is a top view, is to be example with a traditional crystal-coated packing substrate plate, illustrates that how the design of its external connector causes restriction to the density of its circuit trace;
Fig. 2~4 are a series of profiles, in order to the high density circuit board and the manufacture method thereof as the no weld pad design of crystal-coated packing substrate plate of explanation first embodiment of the invention;
Fig. 5~6 are a series of profiles, in order to the high density circuit board and a traditional crystal-coated packing substrate plate as the no weld pad design of crystal-coated packing substrate plate of first embodiment of the invention relatively;
Fig. 7~10 are a series of profiles, in order to the high density circuit board and the manufacture method thereof as the first weld pad design of crystal-coated packing substrate plate of explanation second embodiment of the invention;
Figure 11~13 are a series of profiles, in order to second embodiment of the invention relatively as one of the high density circuit board of the no weld pad design of crystal-coated packing substrate plate and Fig. 5 traditional crystal-coated packing substrate plate.
Embodiment
For make above-mentioned and other purposes of the present invention, feature and advantage can be clearer, express accurately, especially exemplified by preferred embodiment, and cooperate appended graphicly, be described in detail below:
Below be to be example with the crystal-coated packing substrate plate, two embodiment and two application comparative examples are proposed, feature of the present invention and the advantage that is used on the industry are described, do not represent application of the present invention just to be confined to crystal-coated packing substrate plate, for example general bga substrate, or be used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, can use the circuit board that intention of the present invention designed and produced small size, low thickness, elevated track density.
First implements side
Please refer to Fig. 2~4, is a series of profile, in order to the high density circuit board and the manufacture method thereof as the no weld pad design of crystal-coated packing substrate plate of explanation first embodiment of the invention.The present invention can be by the design of no weld pad, increases the line density of high density circuit board, and externally forms the function that conductive projection replaces weld pad in the known techniques on the contact, in order to connect an outer member that is formed with pin or projection, comprises the following steps:
Step 1:
Please refer to Fig. 2, on board substrate 250, form an outside line 210.Outside line 210 has plural wires (trace line) 214, external connector 212 is usually located at an end of lead 214, in order to form electrically connect with an outer member, and be applicable to the outer member of the crystal-coated packing substrate plate 200 of first embodiment of the invention, can be an IC wafer, a circuit board or passive device etc., and in first embodiment of the invention, external connector 212 is to use in the comparative example described later first, forms electrically connect (please refer to Fig. 6) with an IC wafer 10; And external connector 212 of the present invention is characterised in that its width is not more than the live width of lead 214, and therefore, the spacing minimum between each lead 214 in the outside line 210 can be contracted to about 60 μ m.
The material of outside line 210 is generally copper, and its generation type can be: fitted with a Copper Foil (not being illustrated in drawing) in a surface of board substrate 250, the above-mentioned Copper Foil of etching is to form desired outside line 210 again; Or impose a suitable cover curtain layer (not being illustrated in drawing) on a surface of board substrate 250, and with sputter physical vaporous depositions such as (sputtering) copper atom is formed at board substrate 250 again, form outside line 210; Remove above-mentioned cover curtain layer again.
Step 2:
Please refer to Fig. 3, with welding resisting layer 220 with complete covering board base material 250 of screen painting method or method of spin coating and outside line 210; Impose one roasting in advance (pre-cure) again and arrange and drag, make welding resisting layer 220 differential hardenings; In the mode of exposure, development, after welding resisting layer 220 forms welding resisting layer openings 222, exposes external connector 212, impose a baking procedure more again, welding resisting layer 220 is hardened fully.
The effect of welding resisting layer 220 be guardwire 214 not polluted by scolder and with other contiguous lead 214 bridge joints the phenomenon that is short-circuited, also guardwire 214 in the storage of crystal-coated packing substrate plate 200 or use, be not subjected to the aqueous vapor invasion and ELECTROMIGRATION PHENOMENON takes place and with other contiguous lead 214 bridge joints the phenomenon that is short-circuited.
The diameter of welding resisting layer opening 222 is not less than the width of external connector 212 usually, and is 1.2 times~2 times of width big of external connector 212, is preferably external connector 212 is exposed fully.
Step 3:
Please refer to Fig. 4, external connector 212 in response to above-mentioned no weld pad design, with non-electrolytic plating method crystal-coated packing substrate plate 200 is immersed one and contain in the electroless plating solution (not being illustrated in drawing) of composition of the conductive projection 230 that will plate, externally formation conductive projection 230 replaces the function of weld pad in the known techniques on the contact 212.
The height of conductive projection 230 is not higher than welding resisting layer 220, combines with the IC wafer that is formed with chip-covered boss in follow-up encapsulation procedure with convenient.And the material of conductive projection 230 can be: the nickel of copper, plated with gold, leypewter or lead-free kamash alloy.
In addition, if crystal-coated packing substrate plate 200 is the lamination circuit boards with circuit more than two layers, board substrate 250 is that a surface is the lamination circuit substrate of a dielectric substance layer, before step 1 forms outside line 210, must on above-mentioned dielectric substance layer, form a plurality of vias (via hole) (not being illustrated in drawing), and form the metal level that a material is preferably copper at above-mentioned via with physical vaporous depositions such as sputters, after forming outside line 210, the other end of lead 214 can form circuit and link with the lamination circuit in the board substrate 250.Aforementioned content is a known technology, and irrelevant feature of the present invention, so only sketch after the step of first embodiment of the invention.
If crystal-coated packing substrate plate 200 is the circuit boards with one deck circuit, board substrate 250 is to be a dielectric substance layer, the other end of lead 214 becomes the external connector (not being illustrated in drawing) of another kind of form usually, usually connect different outer members with external connector 212, and after finishing above-mentioned steps three, another surface that still is included in board substrate 250 forms the external connector of plurality of openings with the another kind of form that exposes the above-mentioned outer member different with external connector 212 connections.Aforementioned content is a known technology, and irrelevant feature of the present invention, so only sketch after the step of first embodiment of the invention.
First uses comparative example:
Please refer to Fig. 5~6, the crystal-coated packing substrate plate 300 of Fig. 5 is to be all to be designed the next crystal-coated packing substrate plate that combines with the IC wafer 10 with chip-covered boss 12 with the crystal-coated packing substrate plate 200 of Fig. 6, and only crystal-coated packing substrate plate 300 is to have the circuit board that has the weld pad design as shown in Figure 1; And crystal-coated packing substrate plate 200 is high density circuit boards as the no weld pad design of crystal-coated packing substrate plate of first embodiment of the invention described above.
Compare crystal-coated packing substrate plate 300 and crystal-coated packing substrate plate 200: crystal-coated packing substrate plate 200 has the external connector 212 of no weld pad design, and two leads 214 of tolerable pass through between the external connector 212 in Fig. 6; And crystal-coated packing substrate plate 300 has the weld pad 312 of diameter greater than affiliated lead 314 live widths, and in Fig. 5, weld pad 312 has and the identical spacing of external connector 212 among Fig. 6, passes through and can only hold a lead 314; Therefore crystal-coated packing substrate plate 200 can have less the circuit number of plies or surface area because of having bigger line density, help the reduction of the end product volume of back system, it is the purpose of reaching " under the situation of the circuit number of plies that does not increase circuit board or surface area; in circuit; hold more number of, lines; reducing thickness, surface area and the manufacturing cost of above-specified high density circuit board, and can help the reduction of end product size " of the present invention with one deck.
Crystal-coated packing substrate plate among Fig. 5 300 is with after IC wafer 10 combines in addition, and because of having the design of bigger weld pad 312, chip-covered boss 12 is after combination, and its height can reduce and width increases, and increased contiguous chip-covered boss 12 bridge joints and the risk that is short-circuited.Not only in the application of crystal-coated packing substrate plate, in other field, for example be used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, after connecting its above-mentioned outer member that will connect, chip-covered boss 12 bridge joints that are close to as above-mentioned increase also take place and the same problem of the risk that is short-circuited.And special in the application of crystal-coated packing substrate plate, in follow-up encapsulation procedure, must between crystal-coated packing substrate plate 300 and IC wafer 10, carry out the processing procedure of wafer be adhered on substrate (under fill); And the minimizing of above-mentioned chip-covered boss 12 height and the increase of width, the minimizing of meaning work primer flowing space in the processing procedure of irritating primer is to cause the prolongation of wafer be adhered on substrate processing procedure time and increase the risk that primer cavity (void) takes place.
Yet, the high density circuit board that the no weld pad as crystal-coated packing substrate plate 200 of first embodiment of the invention designs among Fig. 6 is because of external connector 212 with no weld pad design and the projection 230 that replaces the weld pad function, with after IC wafer 10 combines, the height and the width of chip-covered boss 12 can be affected hardly, have reduced contiguous chip-covered boss 12 because of the bridge joint short risk.Not only in the application of crystal-coated packing substrate plate, in other field, for example be used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, after connecting its above-mentioned outer member that will connect, also lowered the same problem of the risk that is short-circuited as chip-covered boss 12 bridge joints of above-mentioned vicinity.And it is special in the application of crystal-coated packing substrate plate, because of the height and the width of above-mentioned chip-covered boss 12 can be affected hardly, can there be enough spaces mobile for primer when filling primer between crystal-coated packing substrate plate 200 and the IC wafer 10, not only can reduce the processing procedure time of wafer be adhered on substrate, can also reduce the risk that the primer cavity takes place.Above-mentioned be no weld pad design of the present invention high density circuit board " do not increasing under the situation of the circuit number of plies of circuit board or surface area; in circuit; hold more number of, lines; to reduce thickness, surface area and the manufacturing cost of above-specified high density circuit board with one deck; and can help the reduction of end product size " outside, be attendant advantages that industrial circle provided again.
Second embodiment
Please refer to Fig. 7~10, is a series of profile, in order to the high density circuit board and the manufacture method thereof as the no weld pad design of crystal-coated packing substrate plate of explanation second embodiment of the invention.The present invention can increase the line density of high density circuit board by the design of no weld pad, and externally forms the function that conductive projection replaces weld pad in the known techniques on the contact, in order to connect the outer member of a no pin or projection.
Aspect the manufacture method of the crystal-coated packing substrate plate 400 of second embodiment of the invention, its step 1 is identical with above-mentioned first embodiment with step 2, so no longer narrate at this, please refer to the step 1 of first embodiment of the invention described above and the explanation of step 2 and Fig. 2~3.
Step 3:
Please refer to Fig. 7~9,, externally form the function that conductive projection 430 replaces weld pad in the known techniques on the contact 412 with galvanoplastic in response to the external connector 412 of above-mentioned no weld pad design.Above-mentioned galvanoplastic still comprise following substep:
1. with reference to figure 7, form the metal level 440 of a conduction, cover on welding resisting layer 420, welding resisting layer opening 422 and the external connector 412; The generation type of metal level 440 can be for example to be the physical vaporous deposition of sputtering method.
2. please refer to Fig. 8, form blocking layer 460, cover on the metal level 440 after; Blocking layer 460 is graphical, form blocking layer opening 462 to expose the metal level 440 that covers on welding resisting layer opening 422 and the external connector 412; Again crystal-coated packing substrate plate 400 is placed an electroplate liquid (not being illustrated in drawing), and make metal level 440 energisings, conductive projection 430 is plated on the external connector 412.And
3. please refer to Fig. 9, the blocking layer 460 and the metal level 440 that cover on the welding resisting layer 420 are removed.
The height of conductive projection 430 is higher than welding resisting layer 420, and the height of conductive projection 430 is preferably the thickness 20 μ m~60 μ m that are higher than welding resisting layer 420, combines with the IC wafer of no chip-covered boss in follow-up encapsulation procedure with convenient.And the material of conductive projection 430 can be: copper, gold, leypewter or lead-free kamash alloy.
Please refer to Figure 10, if the material of conductive projection 430 is copper or gold, for reflow (reflow) processing procedure after helping to link with the IC wafer that does not have chip-covered boss, can hot-dip, mode such as attached, the plating of spray, metal level 432 is formed on the surface of conductive projection 430.And the material of metal level 432 can be leypewter or lead-free kamash alloy.The mode of above-mentioned in addition hot-dip is that conductive projection 430 is immersed in the molten soup of leypewter or lead-free kamash alloy, to form metal level 432 on the surface of conductive projection 430; And spray attached mode is that molten soup with leypewter or lead-free kamash alloy is sprayed on the surface of conductive projection 430 to form metal level 432; And the mode of electroplating can be incorporated in the above-mentioned substep 2. and implement in the lump.
Yet,, can just can make crystal-coated packing substrate plate 400 connect the IC wafer of above-mentioned no chip-covered boss without reflow by the processing procedure of a conducting resinl if the material of conductive projection 430 only is copper or gold.This partly will be described in described later second and use in the comparative example.
In addition, crystal-coated packing substrate plate 400 can also be to have the lamination circuit board of circuit more than two layers or have the situation of the circuit board of one deck circuit, also as the description after the step 3 of above-mentioned first embodiment, also omits at this.
Second uses comparative example:
Please refer to Fig. 5 and Figure 11~13, the crystal-coated packing substrate plate 300 of Fig. 5 is to be all to be designed the next crystal-coated packing substrate plate that combines with the IC wafer 10 with chip-covered boss 12; And the crystal-coated packing substrate plate 400 of Figure 11~13 is to be all to be designed the next crystal-coated packing substrate plate that combines with the IC wafer 20 of no chip-covered boss; Wherein IC wafer 10 and IC wafer 20 are only in the difference that has or not chip-covered boss 12, and both are the IC wafers with identical design and function.Crystal-coated packing substrate plate 300 is to have the circuit board that has the weld pad design as shown in Figure 1; And crystal-coated packing substrate plate 400 is high density circuit boards as the no weld pad design of crystal-coated packing substrate plate of second embodiment of the invention described above.
Compare crystal-coated packing substrate plate 300 and crystal-coated packing substrate plate 400: crystal-coated packing substrate plate 400 has the external connector 412 of no weld pad design, and two leads 414 of tolerable pass through between the external connector 412 in Figure 11~13; And crystal-coated packing substrate plate 300 has the weld pad 312 of diameter greater than affiliated lead 314 live widths, and in Fig. 5, weld pad 312 has and the identical spacing of external connector 412 in Figure 11~13, passes through and can only hold a lead 314; Therefore crystal-coated packing substrate plate 400 can have less the circuit number of plies or surface area because of having bigger line density, help the reduction of the end product volume of back system, it is the purpose of reaching " under the situation of the circuit number of plies that does not increase circuit board or surface area; in circuit; hold more number of, lines; reducing thickness, surface area and the manufacturing cost of above-specified high density circuit board, and can help the reduction of end product size " of the present invention with one deck.
Please refer to Figure 11~13, second embodiment of the invention as the high density circuit board of the no weld pad design of crystal-coated packing substrate plate because of having the conductive projection 430 that highly is higher than welding resisting layer 420, connected outer member IC wafer 20 can not form projection processing procedure and directly with crystal-coated packing substrate plate 400 formation electric connections.Yet, not only in the application of crystal-coated packing substrate plate, in other field, for example be used for connecting semiconductor chip package, light-emitting component, connector, passive device, another circuit board, or in the application of the circuit board of other outer members, above-mentioned outer member can be skipped the processing procedure of for example planting formation pins such as ball, direct and high density circuit board forms and electrically connects, so can reduce the fabrication steps of semiconductor packages or electronic product assembling, not only can shorten the processing procedure time and increase output, and reducing under the situation that a fabrication steps just reduces the risk that yield reduces, more can promote process rate, reduce production costs; Provide above-mentioned attendant advantages for industrial circle again.
Crystal-coated packing substrate plate among Fig. 5 300 is with after IC wafer 10 combines in addition, and because of having the design of bigger weld pad 312, chip-covered boss 12 is after combination, and its height can reduce and width increases, and increased contiguous chip-covered boss 12 bridge joints and the risk that is short-circuited.Not only in the application of crystal-coated packing substrate plate, in other field, for example be used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, after connecting its above-mentioned outer member that will connect, chip-covered boss 12 bridge joints that are close to as above-mentioned increase also take place and the same problem of the risk that is short-circuited.And special in the application of crystal-coated packing substrate plate, in follow-up encapsulation procedure, must between crystal-coated packing substrate plate 300 and IC wafer 10, carry out the processing procedure of wafer be adhered on substrate (underfill); And the minimizing of above-mentioned chip-covered boss 12 height and the increase of width, the minimizing of meaning work primer flowing space in the processing procedure of irritating primer is to cause the prolongation of wafer be adhered on substrate processing procedure time and increase the risk that primer cavity (void) takes place.
Yet, the high density circuit board that the no weld pad as crystal-coated packing substrate plate 400 of second embodiment of the invention designs in Figure 11~13 is because of external connector 412 with no weld pad design and the projection 430 that replaces the weld pad function, with after IC wafer 20 combines, the height and the width of conductive projection 430 can be affected hardly, have reduced contiguous conductive projection 430 because of the bridge joint short risk.Not only in the application of crystal-coated packing substrate plate, in other field, for example be used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements, after connecting its above-mentioned outer member that will connect, also lowered the same problem of the risk that is short-circuited as conductive projection 430 bridge joints of above-mentioned vicinity.And it is special in the application of crystal-coated packing substrate plate, can be by the height and the width of in the processing procedure of crystal-coated packing substrate plate 400, adjusting conductive projection 430, make when filling the primer processing procedure, can there be enough spaces mobile for primer when filling primer between crystal-coated packing substrate plate 400 and the IC wafer 20, not only can reduce the processing procedure time of wafer be adhered on substrate, can also reduce the risk that the primer cavity takes place.Above-mentioned be no weld pad design of the present invention high density circuit board " under the situation of the circuit number of plies that does not increase circuit board or surface area; in circuit; hold more number of, lines; to reduce the thickness of above-specified high density circuit board; surface area and manufacturing cost with one deck; and can help the reduction of end product size " outside, be attendant advantages that industrial circle provided again.
Additional disclosure, in Figure 11, material at conductive projection 430 is under the situation of copper or gold, when crystal-coated packing substrate plate 400 engages with IC wafer 20, the mode of can screen painting (screen print) or attaching (dipping) is after forming a conducting resinl 30 on the conductive projection 430, crystal-coated packing substrate plate 400 can be without traditional back welding process, and direct and IC wafer 20 forms electrically connects; In addition, in Figure 12, material at conductive projection 430 is under the situation of copper or gold, if when crystal-coated packing substrate plate 400 being engaged with IC wafer 20 with traditional back welding process, can form a material earlier on conductive projection 430 is the metal level 432 of leypewter or lead-free kamash alloy, via back welding process crystal-coated packing substrate plate 400 is formed with IC wafer 20 again and electrically connects; And in Figure 13, be under the situation of leypewter or lead-free kamash alloy in the material of conductive projection 430, can directly crystal-coated packing substrate plate 400 be formed with IC wafer 20 and electrically connect via back welding process.Though above-mentioned only reaching in the high density circuit board of no weld pad design of the present invention used at crystal-coated packing substrate plate, same idea can also be applied in other the field, for example is used for connecting on the circuit board of semiconductor chip package, light-emitting component, connector, passive device, another circuit board or other elements.
Though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; anyly have the knack of this skill person; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining of the present invention.

Claims (2)

1, a kind of manufacture method of not having the high density circuit board of weld pad design comprises following steps at least:
A., one board substrate is provided, and a surface of this board substrate is a dielectric substance layer;
B. form an outside line on this dielectric substance layer, this outside line comprises a plurality of external connector, and the width of those external connector is not more than the live width of this outside line;
C. form a welding resisting layer, cover this dielectric substance layer and this outside line, this welding resisting layer has a plurality of welding resisting layer openings, exposes those external connector to the open air, and the diameter of those welding resisting layer openings is not less than the width of respectively this external connector that is exposed respectively; And
D. respectively on those external connector in those welding resisting layer opening scopes, form the plural conductive projection, the generation type of those conductive projections is an electroless plating, and the height of those conductive projections is not higher than the thickness of this welding resisting layer.
2, a kind of high density circuit board that does not have the weld pad design is applicable to an outer member that has formed pin or projection to form electrically connect, it is characterized in that, comprises at least:
One board substrate, the surface of this circuit board Ji Cun is a dielectric substance layer;
One outside line is formed on this dielectric substance layer, and this outside line comprises a plurality of external connector, and the width of those external connector is not more than the live width of this outside line;
One welding resisting layer covers this dielectric substance layer and this outside line, and this welding resisting layer has a plurality of welding resisting layer openings, exposes those external connector to the open air, and the diameter of those welding resisting layer openings is not less than the width of respectively this external connector that is exposed respectively; And
A plurality of metal couplings be formed at respectively on those external connector in those welding resisting layer opening scopes with electroless plating, and the height of those metal couplings are not higher than the thickness of this welding resisting layer.
CNB021573921A 2002-12-23 2002-12-23 High-density circuit board without weld pad design and manufacturing method thereof Expired - Fee Related CN1326432C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB021573921A CN1326432C (en) 2002-12-23 2002-12-23 High-density circuit board without weld pad design and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB021573921A CN1326432C (en) 2002-12-23 2002-12-23 High-density circuit board without weld pad design and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN1510979A CN1510979A (en) 2004-07-07
CN1326432C true CN1326432C (en) 2007-07-11

Family

ID=34236572

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021573921A Expired - Fee Related CN1326432C (en) 2002-12-23 2002-12-23 High-density circuit board without weld pad design and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN1326432C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111970849A (en) * 2019-05-20 2020-11-20 鹏鼎控股(深圳)股份有限公司 Circuit board and manufacturing method thereof

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102083269A (en) * 2011-01-22 2011-06-01 苏州达方电子有限公司 Ceramic circuit substrate and manufacturing method thereof
CN102325431B (en) * 2011-09-09 2015-06-17 深南电路有限公司 Method for making copper cylinder on circuit board and circuit board with surface copper cylinders
TWI645760B (en) * 2017-10-27 2018-12-21 南亞電路板股份有限公司 Circuit board and method for fabricating the same
CN108289388A (en) * 2017-12-07 2018-07-17 江门崇达电路技术有限公司 The undesirable PCB production methods of tin in a kind of prevention
WO2020113385A1 (en) * 2018-12-03 2020-06-11 深圳市柔宇科技有限公司 Display panel and display module
CN110418510A (en) * 2019-07-15 2019-11-05 宁波华远电子科技有限公司 A kind of production method of open plating boss

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166866A (en) * 1991-04-03 1992-11-24 Samsung Electronics Co., Ltd. Semiconductor package
US5316788A (en) * 1991-07-26 1994-05-31 International Business Machines Corporation Applying solder to high density substrates
US5397864A (en) * 1991-11-20 1995-03-14 Sharp Kabushiki Kaisha Wiring board and a method for producing the same
US20010002728A1 (en) * 1998-07-22 2001-06-07 Ibiden Co., Ltd. Printed-circuit board and method of manufacture thereof
CN1335740A (en) * 2000-07-11 2002-02-13 索尼化学株式会社 Wiring circuit board with projecture and its producing method
CN2508397Y (en) * 2001-12-13 2002-08-28 胜华科技股份有限公司 Multiple group lug-to-lug packing structure

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5166866A (en) * 1991-04-03 1992-11-24 Samsung Electronics Co., Ltd. Semiconductor package
US5316788A (en) * 1991-07-26 1994-05-31 International Business Machines Corporation Applying solder to high density substrates
US5397864A (en) * 1991-11-20 1995-03-14 Sharp Kabushiki Kaisha Wiring board and a method for producing the same
US20010002728A1 (en) * 1998-07-22 2001-06-07 Ibiden Co., Ltd. Printed-circuit board and method of manufacture thereof
CN1335740A (en) * 2000-07-11 2002-02-13 索尼化学株式会社 Wiring circuit board with projecture and its producing method
CN2508397Y (en) * 2001-12-13 2002-08-28 胜华科技股份有限公司 Multiple group lug-to-lug packing structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111970849A (en) * 2019-05-20 2020-11-20 鹏鼎控股(深圳)股份有限公司 Circuit board and manufacturing method thereof

Also Published As

Publication number Publication date
CN1510979A (en) 2004-07-07

Similar Documents

Publication Publication Date Title
TWI571191B (en) Electrolytic deposition and via filling in coreless substrate processing
CN101826496B (en) Printed wiring board and manufacturing method thereof
CN102084731B (en) Printed wiring board and method for manufacturing same
US7350298B2 (en) Method for fabricating circuit board with conductive structure
US20060157852A1 (en) Circuit barrier structure of semiconductor packaging substrate and method for fabricating the same
JP5808403B2 (en) Method for forming a solder deposit on a substrate
US20060252248A1 (en) Method for fabricating electrically connecting structure of circuit board
JP2008004924A (en) Manufacturing method of package substrate
CN101388376B (en) Semi-conductor package substrate construction
US20090169837A1 (en) Package substrate and manufacturing method thereof
US20060000877A1 (en) Method for fabricating electrical connection structure of circuit board
CN1326432C (en) High-density circuit board without weld pad design and manufacturing method thereof
CN101364586A (en) Construction for packaging substrate and preparation thereof
US20080241359A1 (en) Method of making circuitized substrate with selected conductors having solder thereon
CN1980538A (en) Method for forming circuit-board electric connection end
CN101360388B (en) Electricity connection terminal construction of circuit board and preparation thereof
US20140183726A1 (en) Package substrate, method for manufacturing the same, and package on package substrate
US7033917B2 (en) Packaging substrate without plating bar and a method of forming the same
CN109661124A (en) A kind of IC support plate novel surface processing method
JP2005150417A (en) Substrate for semiconductor device, its manufacturing method, and semiconductor device
KR102346987B1 (en) Method of Forming Solderable Solder Deposition on Contact Pads
US6420207B1 (en) Semiconductor package and enhanced FBG manufacturing
US20090294971A1 (en) Electroless nickel leveling of lga pad sites for high performance organic lga
TW551011B (en) High-density circuit board without bonding pad design and the manufacturing method thereof
KR100567103B1 (en) Method which the flip-chip bump forms

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee