CN1330412A - 使用碳纳米管的竖直纳米尺寸晶体管及其制造方法 - Google Patents

使用碳纳米管的竖直纳米尺寸晶体管及其制造方法 Download PDF

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CN1330412A
CN1330412A CN01122021A CN01122021A CN1330412A CN 1330412 A CN1330412 A CN 1330412A CN 01122021 A CN01122021 A CN 01122021A CN 01122021 A CN01122021 A CN 01122021A CN 1330412 A CN1330412 A CN 1330412A
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崔原凤
李兆远
李永熙
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Samsung Electronics Co Ltd
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Abstract

提供使用碳纳米管能够实现高密度集成,即万亿比特规模集成的竖直纳米尺寸晶体管,及其制造方法。在使用碳纳米管的竖直纳米尺寸晶体管中,具有几个纳米直径的孔形成在诸如间隔几个纳米的矾土的绝缘层中,以通过CVD,电泳或机械压缩,在纳米尺寸的孔中竖直排列碳纳米管,以用作沟道。而且,使用普通半导体制造方法,在碳纳米管附近形成栅,然后源和漏形成在每个碳纳米管的上下部分,从而制做出具有电子开关特征的竖直纳米尺寸晶体管。

Description

使用碳纳米管的竖直纳米尺寸晶体管及其制造方法
本发明涉及一种使用碳纳米管能够实现高密度集成,即万亿比特规模集成的竖直纳米尺寸晶体管及其制造方法。
使用常规硅衬底生产的开关器件基本上被构造成使得杂质扩散区,隔离区和沟道区水平连接。由多个开关器件组成的集成电路也被构造成使得水平排列每一个开关器件,以高密度集成。在杂质扩散区和隔离区形成在硅衬底上的情况中,在加工精度和集成中存在着限制。
金属氧化物半导体场效应晶体管(MOSFET)是一种最典型使用的精细开关器件。实际上,最小图形尺寸为0.25μm的256兆DRAM的面积大约为0.72μm2,最小图形尺寸为0.18μm的1千兆DRAM的面积大约为0.32μm2,最小图形尺寸为0.13μm的4千兆DRAM的面积大约为0.18μm2,并且最小图形尺寸为0.1μm的16千兆DRAM的面积大约为0.1μm2
为克服小型化常规开关器件中存在的问题,已提议使用碳纳米管的开关器件。然而,提议的器件仍具有与其它常规开关器件相似的水平结构,并且难以控制各个碳纳米管。
因此,难以实现使用碳纳米管的器件的高密度集成。
为解决上述问题,本发明提供一种尺寸范围为几十纳米到一个微米的竖直晶体管,其使用万亿比特(tera-bit)规模的碳纳米管作为沟道,每一个碳纳米管具有几纳米的直径,并通过竖直生长和选择沉积生长在具有纳米尺寸孔的非传导衬底上。每一个碳纳米管的下上部分分别连接到源和漏上,栅插入到它们之间,用于执行开关转换。而且,本发明提供一种竖直纳米尺寸晶体管的制造方法。
具体地,提供一种使用碳纳米管的竖直纳米尺寸晶体管,纳米管包括具有纳米尺寸直径孔的绝缘层,提供在孔中竖直排列的碳纳米管,在碳纳米管附近的绝缘层上形成的栅,沉积在栅上以填充孔的非传导薄膜,在非传导薄膜和碳纳米管上形成的漏,在绝缘层和碳纳米管下形成的源。
在本发明中,绝缘层优选由Al2O3和Si中选出的一种材料形成,并且源和沟道优选由金属薄膜形成。
根据本发明的另一方面,提供使用碳纳米管的竖直纳米尺寸晶体管的制造方法,包括(a)在半导体衬底上形成源的步骤,(b)使用非传导材料形成绝缘层和在与间隔几个纳米的源对应的部分上形成具有纳米尺寸直径孔的步骤,(c)在孔中的源上竖直生长碳纳米管的步骤,(d)在碳纳米管附近形成栅的步骤,(e)在栅上沉积非传导薄膜以填充孔的步骤,以及(f)在非传导薄膜和碳纳米管上形成漏的步骤。
在步骤(b),绝缘材料是从Al2O3和Si中优选出的一种材料,并且通过从化学气相沉积,电泳和机械压缩方法中选出的一种方法,优选执行步骤(c)。
而且,本发明提供一种使用碳纳米管的竖直纳米尺寸晶体管,纳米管包括具有纳米尺寸直径孔的绝缘层,提供在孔中竖直排列的碳纳米管,在绝缘层和碳纳米管上形成的漏,沉积在漏上的非传导薄膜,在非传导薄膜上形成的栅,在绝缘层和碳纳米管下形成的源。
在本发明的实施方案中,绝缘层优选由Al2O3和Si中选出的一种材料形成,并且源和沟道优选由金属薄膜形成。
或者,本发明提供一种使用碳纳米管的竖直纳米尺寸晶体管的制造方法,包括(a)在半导体衬底上形成源的步骤,(b)使用非传导材料形成绝缘层和在与间隔几个纳米的源对应的部分上形成具有纳米尺寸直径孔的步骤,(c)在孔中的源上竖直生长碳纳米管的步骤,(d)在非传导薄膜和碳纳米管上形成漏的步骤,(e)在漏上沉积非传导薄膜的步骤,以及(f)在非传导薄膜上形成栅的步骤。
根据本发明的该实施方案,在步骤(b)中非传导材料是从Al2O3和Si中优选出的一种材料,并且通过从化学气相沉积,电泳和机械压缩方法中选出的一种方法,优选执行步骤(c)。
参考附图,通过详细描述本发明优选实施方案,本发明上述目标和优点将变得更加明白,其中:
图1是根据本发明第一实施方案,使用碳纳米管的竖直纳米尺寸晶体管的竖直横截面视图;
图2是图1示出的竖直纳米尺寸晶体管的平面图;
图3A至3F是竖直横截面视图,示出了根据本发明使用碳纳米管的竖直纳米尺寸晶体管的制造方法中的加工步骤;
图4A和4B是根据本发明第二实施方案,使用碳纳米管的竖直纳米尺寸晶体管的竖直横截面视图和透视图;
图5A和5B是根据本发明,在竖直的纳米尺寸晶体管生产过程中,竖直生长的碳纳米管的透射电子显微镜(TEM)照片,其中图5A示出了直径大约为50nm的碳纳米管,并且图5B示出了直径大约为20nm的碳纳米管;
图6A是使用竖直生长的碳纳米管,利用电子束光刻法形成的电极图形的TEM照片,并且图6B是图6A的放大图;
图7是根据本发明,使用碳纳米管的竖直纳米尺寸晶体管的I-V特征曲线;
图8A和8B是根据本发明第二实施方案,在竖直的纳米尺寸晶体管的栅上施加偏压时的I-V特征曲线;以及
图9A和9B是直径大约为20nm的碳纳米管样品的I-V特征曲线,该碳纳米管在大约400℃至大约800℃退火。
根据附图,将详细描述根据本发明使用碳纳米管的竖直纳米尺寸晶体管及其制造方法。
首先解释根据本发明第一实施方案使用碳纳米管的竖直纳米尺寸晶体管。如图1所示,竖直排列的碳纳米管的单元构造如下。
首先,通过竖直生长和选择沉积,碳纳米管100布置在具有纳米尺寸孔10′的非传导衬底10上。栅20形成在碳纳米管100附近的非传导10上,绝缘薄膜30沉积在其上以填充孔10′。这里,诸如矾土的绝缘薄膜被用作非传导衬底10,并且孔的尺寸和相邻孔的距离可被调节到几个纳米的尺寸。以如此方式,可以得到高密度集成,即万亿比特规模集成。
换句话说,具有纳米尺寸直径的竖直生长的碳纳米管100被用作沟道,并且被构造得其下上部分分别连接到源40和漏50上,栅20插入到其间,使得可以执行开关。由于晶体管的尺寸可以做到几十纳米到大约一微米或更小的范围,因此可以得到高密度集成。参考图2,该图是图1示出的竖直的纳米尺寸晶体管的平面图,碳纳米管的直径范围为1至200nm,优选1-50nm,并且非传导薄膜30的宽度范围为50至500nm,优选50-100nm。
使用如此构造碳纳米管的竖直纳米尺寸晶体管,其特征在于电子由源40提供,以根据施加到栅20的电压精密地控制电流,然后电子被发射到漏50。由于单元是纳米尺寸的,可以控制电流具有小的负荷,即,纳米尺寸的晶体管具有低功率特征的优点。
图3A至3F是竖直横截面视图,示出了根据本发明使用碳纳米管的竖直纳米尺寸晶体管的制造方法中的加工步骤。参考该图,现在讨论使用碳纳米管的竖直纳米尺寸晶体管的制造方法的加工步骤。
如图3A所示,源40形成在半导体衬底200上。
然后,如图3B所示,使用诸如Al2O3或Si的非传导体形成绝缘层10,并且孔10′形成在源40上的绝缘层10的一部分中。
如图3C所示,通过CVD,电泳或机械压缩碳纳米管100被竖直生长在孔10′中的源40上。换句话说,形成孔10′,然后碳纳米管100只选择生长在孔10′中。
接下来,如图3D所示,栅20形成在碳纳米管100附近。
如图3E所示,非传导薄膜30沉积在栅20上以填充孔10′。
最后,如图3F所示,漏50形成在非传导薄膜30和碳纳米管100上,从而完成竖直的纳米尺寸晶体管。
根据图4A和4B,现在讨论根据本发明第二实施方案使用碳纳米管的竖直纳米尺寸的晶体管,除了栅20形成在漏50上之外,该晶体管与根据第一实施方案的竖直纳米尺寸的晶体管相同。
首先,通过竖直生长和选择沉积,碳纳米管100生长在具有纳米尺寸孔(未示出)的非传导衬底10上并被排列。源40和漏50连接到碳纳米管100的下上部分。非传导薄膜30形成在漏50上,栅20形成在非传导薄膜30上。这里,非传导薄膜30优选由SiO2形成。
使用具有纳米尺寸直径的如此竖直生长的碳纳米管100作为沟道,其下上部分分别连接到源40和漏50上,栅20设置在漏50上,于是可以执行开关。
图4B是图4A示出的使用碳纳米管的竖直纳米尺寸晶体管的透视图,其中源线和漏线在碳纳米管生长的位置交叉,以形成单元。而且,栅线在其不接触漏线的状态中打开或关闭电流。
根据本发明第一和第二实施方案使用碳纳米管竖直纳米尺寸晶体管的制造方法与碳纳米管100的生长步骤相似,但在栅20和漏50之间的位置关系上不同。也就是说,根据第二实施方案,在绝缘层10中形成碳纳米管后,漏50形成在绝缘层10和碳纳米管100上,这是由于栅20形成在漏50上,与第一实施方案不同。
形成漏50后,非传导层30形成在其上面。最后,栅20形成在非传导层30上,从而完成竖直的纳米尺寸晶体管。
图5A和5B是根据本发明,在竖直的纳米尺寸晶体管生产过程中,竖直生长的碳纳米管的TEM照片,其中图5A示出了直径大约为50nm的碳纳米管,并且图5B示出了直径大约为20nm的碳纳米管。
图6A是使用竖直生长的碳纳米管,利用电子束光刻法形成的电极图案的TEM照片,并且图6B是图6A的放大图。参考这些图,应当理解在电极图案中竖直生长的碳纳米管和金属电极连接。
图7是根据本发明,使用碳纳米管的竖直纳米尺寸晶体管的I-V特征曲线,从其中应当理解在低温电导测量中存在能量带隙,并且碳纳米管显示为晶体管的特征。
图8A和8B是根据本发明第二实施方案,在竖直纳米尺寸晶体管的栅上施加偏压时的I-V特征曲线,其中图8A示出了施加正偏压的情况,图8B示出了施加负偏压的情况。参考图8A和8B,应当理解电流只在一个方向流动。
图9A和9B是直径大约为20nm的碳纳米管样品的I-V特征曲线,该碳纳米管在大约400℃至大约800℃退火。具体地,图9A示出了在碳纳米管下面存在氧化层的情况,图9B示出了碳纳米管下面不存在氧化层的情况。应当理解碳纳米管可充当晶体管。
如上所述,在根据本发明使用碳纳米管的竖直纳米尺寸晶体管中,具有几纳米直径的孔被形成在诸如间隔几个纳米的矾土的绝缘层中,以通过CVD,电泳和机械压缩在纳米尺寸的孔中竖直排列碳纳米管,以用作沟道。而且,使用普通半导体制造方法,栅形成在碳纳米管附近,然后源和漏被形成在每个碳纳米管的下上部分,从而制作出具有电子开关特征的竖直纳米尺寸晶体管。
因此,利用碳纳米管的本质特征形成万亿比特规模的竖直类型晶体管,以克服常规半导体技术的限制。而且,根据本发明使用碳纳米管的竖直纳米尺寸晶体管具有低功率消耗。

Claims (12)

1.一种使用碳纳米管的竖直纳米尺寸晶体管包含:
具有纳米尺寸直径孔的绝缘层;
竖直排列在孔中的碳纳米管;
在碳纳米管附近形成在绝缘层上的栅;
沉积在栅上以填充孔的非传导薄膜;
在非传导薄膜和碳纳米管上形成的漏;以及
在绝缘层和碳纳米管下形成的源。
2.如权利要求1使用碳纳米管的竖直纳米尺寸晶体管,其中绝缘层是由Al2O3和Si中选出的一种材料形成。
3.如权利要求1使用碳纳米管的竖直纳米尺寸晶体管,其中源和漏由金属薄膜形成。
4.一种使用碳纳米管的竖直纳米尺寸晶体管的制造方法,包含以下步骤:
(a)在半导体衬底上形成源;
(b)使用非传导材料形成绝缘层和在与间隔几纳米的源对应的部分上形成具有纳米尺寸直径的孔;
(c)在孔中的源上竖直生长碳纳米管;
(d)在碳纳米管附近形成栅;
(e)在栅上沉积非传导薄膜以填充孔;以及
(f)在非传导薄膜和碳纳米管上形成漏。
5.如权利要求4的方法,其中在步骤(b)中,非传导材料是选自Al2O3和Si的一种材料。
6.如权利要求4的方法,其中通过从化学汽相沉积,电泳和机械压缩方法中选出的一种方法,执行步骤(c)。
7.一种使用碳纳米管的竖直纳米尺寸晶体管包含:
具有纳米尺寸直径孔的绝缘层;
竖直排列在孔中的碳纳米管;
在绝缘层和碳纳米管上形成的漏;
沉积在漏上的非传导薄膜;
在非传导薄膜上形成的栅;以及
在绝缘层和碳纳米管下形成的源。
8.如权利要求7使用碳纳米管的竖直纳米尺寸晶体管,其中绝缘层是由Al2O3和Si中选出的一种材料形成。
9.如权利要求7使用碳纳米管的竖直纳米尺寸晶体管,其中源和漏由金属薄膜形成。
10.一种使用碳纳米管的竖直纳米尺寸晶体管的制造方法,包含以下步骤:
(a)在半导体衬底上形成源;
(b)使用非传导材料形成绝缘层和在与间隔几纳米的源对应的部分上形成具有纳米尺寸直径的孔;
(c)在孔中的源上竖直生长碳纳米管;
(d)在非传导薄膜和碳纳米管上形成漏;
(e)在漏上沉积非传导薄膜;以及
(f)在非传导薄膜上形成栅。
11.如权利要求10的方法,其中在步骤(b)中,非传导材料是选自Al2O3和Si的一种材料。
12.如权利要求10的方法,其中通过从化学汽相沉积,电泳和机械压缩方法中选出的一种方法,执行步骤(c)。
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