CN1360814A - 功率半导体器件的表面安装封装 - Google Patents
功率半导体器件的表面安装封装 Download PDFInfo
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- CN1360814A CN1360814A CN00810165A CN00810165A CN1360814A CN 1360814 A CN1360814 A CN 1360814A CN 00810165 A CN00810165 A CN 00810165A CN 00810165 A CN00810165 A CN 00810165A CN 1360814 A CN1360814 A CN 1360814A
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- lead
- lead frame
- tube core
- die
- bonding
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Abstract
本发明公开了一种用于和半导体管芯(306)形成电连接的引线框(302,304),它包括多个和管芯边缘对应的缺口。从而防止了引线框和管芯边缘附近的电元件之间的短路,即使在引线框在管芯方向上被弯向以形成表面安装封装(300)。可选地或额外地,引线框的导线可以包括沟槽(632),该沟槽防止了用来将引线框粘接到管芯上的环氧树脂或焊料向外铺展,而与其它导线形成电短路。
Description
背景技术
呈集成电路芯片(IC)形态的半导体器件在其被结合进诸如计算机或蜂窝电话的产品中时一般必需安装在诸如印刷电路板的平坦表面上。现在,没有一种表面安装半导体封装技术能满足下一代分立功率半导体器件和IC的需要。
这种表面安装功率封装应当包括至少以下特征:
1.低电阻;
2.分流并减小器件金属互连内横向电阻(lateral resistance)的能力;
3.低热阻;
4.垂直(通过背面)或横向(顶侧)地实现大电流的能力;
5.高的可制造性;
6.低的固有材料成本(intrinsic material cost);
7.低制造成本;
8.功率应用中的可靠运行;
9.便于半导体的至少三个(且优选地更多)隔离连接的能力;
10.低剖面(高度)和小覆盖面积。
功率半导体器件和IC有两种,一种因其具有低的导通态电压降(因此具有低功耗)而传导大电流,一种因其耗费大量功率而传导“大”电流。因为这些功率器件的用途、结构和运行不同,所以所列的开头两个特征(即低电阻)可以代替第三特征(低热阻)而实现,但理想地,一个封装应当既提供低电阻又提供低热阻。
第四个特征,即横向或垂直大电流流动,说明功率封装理想地应当是对横向或垂直功率器件两者均可应用,但是,两个方向中的至少一个应当能传导大电流。
当然,封装必须是高度可制造的,因为功率晶体管在世界范围内得以每年几十亿个地大量使用。对于这种器件的供给者和可能的用户,任何内在的制造可重复性或产率问题都将有可怕的后果。
另一个特征是低成本,包括封装材料成本及其制造成本。当然,材料成本是基本的,因为诸如金引线、塑料模塑、铜引线框等特定材料是基于世界原材料市场的,不能通过半导体产量的简单增加而大幅改变。使用更少量材料的封装设计生产起来本质上更便宜。
功率应用中封装的可靠性意味着,它必须经受得住功率器件中通常碰到的运行条件,诸如电流尖脉冲、比正常遇到的更高的环境温度、明显的自加热、重复热瞬变导致的热震等。电流或加热的重复脉冲可以引起与疲劳相关的损伤,尤其在金相接合和界面处。更少的界面是优选的。
二极管、瞬变抑制器和熔断器需要二引出端封装,而支持至少三个连接线的封装对分立晶体管是有用的。对于各种智能功率半导体元件,四个连接线直至八个连接线是极为有用的。在八个不同的连接线以上,这种功率封装技术的使用集中在功率集成电路上。
低剖面表面安装封装,虽然不是普遍要求,但却使之便于PC板的制造,因为封装在低剖面封装中的功率器件具有与同一板上的其它IC相同的特性,并且因而避免了对特殊处理的需要。在如电池组、PCMCIA卡和蜂窝电话的一些情形下,低剖面封装在满足最终产品的苛刻厚度方面可能是至关重要的。
小覆盖区域通常是整个产品尺寸的根源,尤其在便携式电子设备中,在该电子设备中,尺寸是重要的消费者购买标准-越小越好。
在相关考虑中,板上封装覆盖区越小,且它所包含的半导体管芯越大,则给定尺寸的性能越大。
虽然这些目的可能看起来明显,但事实是,现在的功率半导体封装技术未充分地、节约成本地满足这些需要,并且在一些情况下根本不满足该需要。
当前的表面安装封装方法
图1说明用于制造传统现有技术的表面安装封装的流程,例如最初为IC开发的8个引脚的小外形(SO-8)封装,或普遍存在的3引脚小外形晶体管(SOT23)封装。该流程以一个或多个半导体方片(dice)、金属引线框、以及将该方片粘结到引线框上被称为管芯焊垫的区域中的导电环氧树脂或焊料开始。然后引线键合该套封装,用金(有时为铝)引线将封装的金属“接线柱”连接到器件或IC上的铝键合焊点上。键合用热压或超声波技术来得到良好的电连接和足够的机械强度以承受后续的加工步骤和运行条件。引线键合以后,将仍由一系列金属跨接线或连接条保持在一起的引线框放到塑模中,接着灌注也被称作模塑化合物的热液态塑料。
塑料冷却后,它为键合引线、管芯焊垫和封装导线提供了机械刚度,因此外部导线可以从任何连接条上剪下,从而将该单元与可能已经制造在同样连接条上的任何其它单元分开。
最后将导线弯成其最终形状。该弯曲工艺需要“修剪”该导线,使得塑料封装上不存在可能导致塑料开裂的过度机械应力。
图2示出了现有技术的引线框10,它包括一重复单元11(具有管芯焊垫12以及导线总成13A和13B),该重复单元在一根条带中重复5至25次。该条带包括三根连接条,它们在该条带中将重复单元固定在一起,直到后来的塑料注入模塑发生后才被分离。该连接条包括两根将封装导线15A和15B固定在适当位置的外部连接条14A和14B,以及一根在装配过程中保持管芯焊垫12固定的内部连接条14C。引脚的实际数量可以根据封装变化,通常采用3、6、8、14和16个引脚的封装。一端部片(位于每一端)在制造过程中通过稳固连接条14A、14B和14C将整个条带固定在一起。
图3A至3G示出了图1所示的流程步骤的横截面图。
图3A所示的引线框10包括中心管芯焊垫和两根导线15A和15B。在图3B中,半导体管芯17粘接到管芯焊垫12上(用一薄层焊料或环氧树脂,未示出)。管芯粘接操作后进行图3C所示的引线键合。对于每根键合引线18,球形键合19(进行的第一道键合)出现在管芯上,楔形键合20(最后一道键合)出现在导线(也被称为接线柱)上。楔形键合出现在引线被切断的地方。球形键合和楔形键合形状之间的不同是引线键合机器操作的特征。楔形键合优选地位于引线框15A和15B上,以避免由于引线切割而引发的应力损害半导体的危险。
在图3D中,塑料21被注入(用虚线表示),以覆盖每个管芯17和与其相连的键合引线18和导线15A、15B,如图13E的俯视图所示。连接条14A和14B故意留着不被覆盖。连接条14C的一部分被塑料覆盖,而连接条14C的大部分保持未被覆盖。修剪后,单个封装的管芯及其分离的导线通过塑料固定在一起。连接条14A和14B以及导线15A和15B的一小部分通过机械切割机而切掉,从而将最终的封装产品11和同一条带上的其它产品分开。和管芯焊垫12连接的连接条14C被修剪得与塑料封装外形一样平。最终,导线15A和15B被弯曲,以用于图3G所示的表面安装。
图4A示出了安装到印刷电路板(PCB)22上的传统现有技术的SO-8封装中的尺寸限制。选择设计标准以获得高的可制造性和可靠性这两者。例如,设计标准X1,在键合引线顶上的所允许的最少量的塑料必须保证在制造过程中的任何情况下,不暴露任何键合引线18,即从塑料突出。在设定封装的最小的可能高度时,要特别限制引线键合高度X2,以防止从键合引线18到硅管芯17或管芯焊垫12的边缘的意外短路。以下的表1为每个尺寸确定了一些典型值。
表1
规则 | 设计标准说明 | 值(mm) | 失效模式 |
X1 | 引线顶部上的最少塑料 | 0.08 | 防止引线暴露(顶部上的) |
X2 | 引线环高度 | 0.13 | 避免引线和管芯边缘短路 |
X3 | 芯片厚度 | 0.28 | 薄但不会折断 |
X4 | 引线框厚度 | 0.2 | 使导线电阻最小 |
X5 | 引线框下的最少塑料 | 0.08 | 防止管芯焊垫暴露 |
X6 | 板上塑料的间隙(隔离) | 0.15 | 导线(非塑料)必须接触PCB |
XT | 总的封装高度(外形) | 1.7 | 使封装厚度最小 |
Y1 | 最小导线脚 | 导线必须落在PCB上 | |
Y2 | 超出塑料的最小引线延伸 | 需要导线夹持的空间 | |
Y3 | 引线的最小塑料包围 | 防止导线暴露(侧面上的) | |
Y4 | 键合用最小接线柱末尾宽度 | 需要引线楔形键合的空间 | |
Y5 | 最小管芯焊垫与导线间隔 | 0.25 | 避免导线和管芯焊垫短路 |
Y6 | 管芯焊垫内管芯的间隔 | 0.13 | 避免芯片凸出和折断 |
Y7 | 芯片边缘内侧的键合深度 | 0.10 | 避免管芯边缘开裂 |
YW | 引线长度的最大横向尺寸 | 1 | 避免大引线电阻和下垂 |
YC | 最大管芯尺寸(窄方向上) | 1.3 | 使管芯面积最大 |
YT | 总导线到导线板覆盖区 | 使封装的电路板面积最小 |
封装所需要的实际板尺寸由下式确定
YT=YC+2(Y6+Y5+Y4+Y3+Y2+Y1)
XT=X6+X5+X4+X3+X2+X1其中YT是封装的窄向。
设计标准Y7由管芯边缘结构确定,该管芯边缘结构用以避免由于弯曲而产生的管芯开裂,并允许管芯边缘封闭或合缝密封(防止离子污染进入管芯中),如图4B所示。在所示的例子中,具有P型衬底31的硅管芯被管芯粘接到封装管芯焊垫30上。管芯焊垫和引线框可以是铜制的,但一般是由低成本的合金-42制造,合金-42对封装工业来说是非常普通的一个专门用语。衬底包括一高P型浓度区32(称作P+)和另一高度搀杂的N型材料(N+)区33,此区33由与P衬底31和P+区32不同的电压偏置。需要一隔离N+区33和与衬底相连的P+区32的间隙,以支持这些区域间的电压差。N+区33与玻璃或氧化物层38中的一接触孔34接触,并被键合焊点区域的金属层35覆盖。P+区32也与延伸到芯片边缘41的孔36接触,P+区32的一部分与金属层37接触。除了需要暴露键合焊点区域,如暴露金属层35的区域以外,其表面都被玻璃或氮化硅钝化层39覆盖。键合焊点粘接到键合引线42上,该键合引线典型地由金或铝制成。球形键合43出现在引线键合点上。
需要设计标准Y7以防止由于N+区33和带有P衬底31的键合引线42之间的短路造成的电失效。例如,如果键合引线42和管芯边缘41或P+区32意外短路,将会导致电失效。同样,球形键合43不能使钝化层38或39开裂,并且不能使金属层37短路。不能允许被切断的硅边缘41使硅开裂或侵入区域40内,否则它将导致失效。虽然Y7标准随器件不同而不同,但是它减少了可以用于有源器件结构的可用硅量。于是,该区域可称为器件或集成电路的“边缘末端”。根据芯片的类型、其技术,以及组装的器件或IC的最大电压,其尺寸可以在0.025mm至0.250mm之间变化。
在图2至4所示的封装中,有源硅实际使用的PCB面积的百分数可以非常小,在小封装中低到25%。低面积利用率因机械设计标准,如Y5和Y6所导致的浪费空间而发生。而且,假设与硅管芯背侧和管芯焊垫的电接触通过硅中的顶侧接触而发生。虽然在小电流的IC中,这种方法可以令人满意,但是在垂直分离IC以及垂直功率MOSFET中,在管芯焊垫内可垂直发生大电流。与管芯焊垫的引线键合还减少了可用的管芯焊垫面积,因而减小了有源硅的面积。引线键合还向封装引入额外的串联电阻。
图5A至5G示出了比图3所示的封装更适合于垂直功率器件的现有技术的封装的一系列横截面和俯视图。图5A示出了一种变形的引线框50,它是对传统引线框的一种改进,它提高了其功率消耗,并且消除了对连接到硅管芯背侧的引线键合的需要。在此现有技术的设计中,多个导线59不需要键合引线,而直接从管芯焊垫52延伸到封装外侧。管芯焊垫52、引线框59以及连接条54和55的组合一起构成了总成56A。另一个总成56B由类似前述传统引线框10的导线58和连接条57构成。整个单元51以规则的间隔重复,并由一个如前述引线框例子中的端部片固定在一起。值得注意的是,虽然总成56A将导线59融合进了管芯焊垫52中,但该总成看起来好像整个管芯焊垫52更大了,并且“孔”53已经开在了管芯焊垫上。
此外,应当澄清的是,这种设计通常仅对垂直功率器件封装有用,因为可用引线的一半被用于(变短)了衬底连接。为确定用途的引脚数量的减少使得这种封装对可能需要大量电连接的集成电路用处较小。
在图5B中,一垂直功率器件60通过焊料或导电环氧树脂粘接到引线框总成56A上管芯焊垫区域52内,接着进行图5C中的引线键合。每个引线键合61包括一球形键合62和一楔形键合63,通常将楔形键合置于引线框上,而不是硅管芯60上。只有一套引线(未示出)可以被键合,因为封装反面的导线连接在管芯焊垫上。图5D中,注射模塑塑料64,如图5E的俯视图中进一步描述的那样。由于电流通路中消除了一套键合引线,所以在垂直电流器件中,封装的电阻减小了。图5F示出了管芯及其封装从引线框和连接条上剪下后的单个管芯和单元51。图5G示出导线弯曲后同一器件。
图6A至6C示出并定义了表面安装封装半导体元件的电热特性,即与功率半导体器件相比的重要特性的术语。在简图6A中,功率MOSFET 70与一阻值为RS的源极电阻71和一阻值为RD的漏极电阻72电串联。RS的阻值根据封装内的可用空间而主要随所用键合引线的数量而变化。当使用多达16个键合引线时,RS在50mΩ(使用一个最小尺寸的引线键合)到4mΩ的范围内变化。在图2所示的传统封装中,漏极电阻RD等于RS。在诸如图5所示的功率封装中,漏极电阻简单地是铜引线框的电阻,一般是一毫欧的几分之一。
图6A还简单地示出了半导体的热特性,其中,MOSFET 70是向周围环境和印刷电路板(PCB)73释放热量的热源。直接从塑料封装释放到周围环境中的热主要通过对流发生,并在约160℃/W或更高的范围内具有热阻Rθja。热从封装到电路板的稳态传导取决于封装的设计。在传统的封装中,只有通过键合引线才能实现由管芯到引线框的热传导。从“接合部”到电路板的热阻Rθjb约80℃/W。假设从PCB到周围环境的对流具有约30℃/W的热阻Rθba,则传统封装的总热阻约为115℃/W。使用图5所示的功率封装设计,对于55℃/W的总的接合部到周围环境的热阻,从“接合部”到电路板的热阻Rθjb被改善到约20℃/W。虽然这不如所需的低(理想地在1℃/W的范围),但是它远比传统的IC封装好。
图6B示出了用于单个和重复脉冲的热阻对功率脉冲宽度(秒)的商业数据图表曲线。热阻被归一化到稳态(连续功率耗散)热阻值。于是,单位与连续运行的一样。注意,在功率的短脉冲过程中,热阻比稳态值低,因为硅本身吸收一些热。大约2毫秒,曲线斜率的变化反应了管芯背侧和管芯粘接的影响,意味着热在到达引线框之前经过整个硅晶片而传播(扩散)。大约1秒钟时,印刷电路板、环境和热对流开始起作用。在高功率脉冲操作中,如果热能更快地传出,则管芯的性能将得到改善。需要低热阻封装以改善封装的连续功率耗散。
自加热使硅的温度升高一定量,该量由下式给出:
ΔT=P·Rθja其中,温度的提高进而增加MOSFET的电阻。根据电路的不同,电阻的增加能导致功率耗散的进一步增加和更多的自加热。
封装的电阻也限制了功率器件的最大可用管芯尺寸。图6C示出了四种不同功率MOSFET技术的导通电阻与管芯尺寸,分别用它们的单位导通电阻(即电阻面积之乘积)来标识,如3、1、0.3和0.1mΩcm2。从技术上来说,3.0mΩcm2代表若干年前(大约1992年)的器件和加工技术,而0.1mΩcm2比当今的现有技术更先进。
用标有B、D、G和H的细曲线表示的理想硅电阻符合以下关系给出的双曲线,即:
标记为Rpackage的封装电阻被显示为3.5mΩ的常量。乘积曲线A、C、E和F的总电阻显示出渐近线特性,该渐近线特性限于由封装电阻通过以下关系确定的最小值,即:
虽然封装电阻对几代以前的产品具有可忽略的影响,但是新的硅功率MOSFET技术现在由高封装电阻组成。超过1到1.5mm2的硅器件面积完全偏离了其理想性能值。例如,对于0.1mΩcm2的MOSFET技术和10mm2的管芯,硅电阻是1mΩ(曲线H),而封装的管芯为4.5mΩ(曲线F),超过硅值的四倍。在器件中,增加的导通电阻降低了效率并增加了自加热,进一步降低了其性能。
图7A至7F示出了需要功率封装技术的各种现有技术的垂直功率器件。图7A示出了垂直平板DMOSFET的横截面。以高搀杂的(N+)衬底81开始,一外延层82生长到2至20微米(取决于器件的目标击穿)的厚度。接着,P型本体区83和N+源极区域84被注入并扩散,通常自对准多晶硅栅极86。多晶硅栅极86通过一厚度为100至1000埃的薄栅极氧化物层85与下置的硅分开。栅极(以及整个器件)通常还被覆盖在一玻璃层内,以避免与上面的源极金属88短路。在栅极区之间的形成接触窗口87的位置上,玻璃被除去,籍此源极金属88可接触N+源极区84,并通过P+区89接触P型本体区83。
器件的运行涉及在栅极86上施加移电压,以反转位于栅极下面的硅的平坦表面上的P型本体区,并允许源极84和外延漏极82之间的沟道传导。如虚线所示,电流沿器件的平坦表面通过器件的双扩散通道横向流动(因此其名字为“平面”DMOSFET)。一旦经过该通道,电流就改变方向并垂直流向背侧,在该区域内扩展,直到外延传导区毗邻附近单元中的电流传导。为了封装这种器件,在器件的表面和背面上都必需有低电阻通道。栅极也必须连接到表面上。这和P-N二极管不同,一侧至少需要两个电连接,其中一个用来传导高电流。
图7B示出了槽型栅垂直功率MOSFET 90,除了栅极嵌在硅表面中蚀刻出的槽内以外,它与平面MOSFET类似。在此器件中,外延层92形成于N+衬底91上,接着形成槽型栅极。槽型栅极是其中的硅通过光掩蔽和反应离子蚀刻而去除掉的区域,接着形成栅极氧化物层95,并用多晶硅栅极96进行填充,使得得到几乎平坦的表面。平坦表面通过过度填充多晶硅,然后在槽的顶部附近对其进行回刻而获得。然后在位于相邻槽之间的硅沟槽内形成P型本体区93。N+源极和P本体的接触掺杂在P型本体区93内形成。然后,通常将一玻璃沉积在整个表面上,其后蚀刻一接触窗口97以显露N+源极区94和P+区97并使之与顶层金属层98电短路。除了垂直地沿槽侧壁发生沟道导电外,其操作与平面DMOS 80相似。
图7C示出了垂直平面DMOSFET 80或槽型栅DMOSFET 90的平面图。器件的大部分被源极金属层100覆盖。栅极焊点101是另一个金属区,它与源极电隔离2至15微米的间隙。器件的外部边缘还包括一与漏极电压短路的金属环102,它被称作等电位环或EQR,主要为了获得改进的抵抗离子迁徙的可靠性的目的而引入。在装配过程中,此外部环是源极或栅极连接之间意外短路的危险根源。硅还延伸而超出此外环20至70微米,到达虚线103所表示的位置。当晶片被切成单独的方片时,伸出的硅因切割工艺而在尺寸上不同。管芯的此面积也以漏极电压偏置,并可以在封装过程中与连接键合引线的源极或栅极短路。
在图7D中,一金属栅极接头104在器件中心延伸,除了在接头端部外,它将源极金属100分成两半。于是需要对两半源极金属进行封装连接(如键合引线),以避免器件电阻因封装而增加。封装连接对硅管芯设计的尺寸和长径比作了特定限制。这些限制在图7E的管芯设计中被进一步增加,因为源极金属100被三个栅极接头104分成三部分。在电学上,三个源极部分仍然是平行的,但是在大电流下,薄金属层100的横向电阻将内部电阻增加到器件上,从而降低了其作为功率开关的性能。
在图7F所示的器件中,采用多圈型栅极金属106以减少整个器件中的信号传播延迟。在封装设计和引线键合定位中,所得到的将源极金属分成四个完全隔离的部分105A、105B、105C和105D的分隔需要到每个部分上的电连接。这种设计可能和特殊的封装插脚引线不兼容。在这种布置中,引线键合尤其是有问题的,因为引线框的位置限制了引线键合的位置和角度。
例如,在图8中,粘接到源极金属110上的源极键合引线113延伸到故意与漏极电压短路的EQR金属111上方。在所示例子中,EQR金属和延伸到方片间的环路内的外部多晶硅片113接触。在切割过程中,切割边117穿过多晶硅层113、硅衬底115和外延层116而切割,将它们一起在漏极电势下短路。源极金属110、多晶硅场片112和P型扩散区114以相对于漏极的高负电压偏置,从而反向偏置在P扩散区114和N型外延层115之间形成的结。如果引线113陷入或被压(在注射模塑工艺中通过熔融塑料)入EQR 111中,则器件将短路并且不再起作用。较长的键合引线有益于减小短路的可能性,但是增加了器件电阻。这是一个例子,其中引线键合涉及性能和可制造性之间的折衷和妥协。
在制造过程中引线键合引起另外的问题,其中的一些表现为产量的减少,而另一些在后来表现为可靠性的丧失。图9B中,位于有源槽型栅极MOSFET晶体管(类似图7B中器件90的结构)顶部上的引线球形键合120可能在氧化物或在硅中产生微裂纹。这种微裂纹过小以致于没有显微镜就不能观察到,它可能无法挽回地损害覆盖槽的顶层氧化物(玻璃)121(例如,缺陷A),或损害包埋多晶硅栅极的栅极氧化物95(即缺陷B)。在极端情况下,微裂纹可能延伸入P型本体93与N型外延漏极92近邻中的硅内(即缺陷C),并导致结的漏电。在更糟糕的情况下,在产品已经船运至消费者那儿后,并在该产品已经运行了一长时间后,该微裂纹可能仅成为电活性的(场失效)。
如果需要在硅上而非引线框上尝试第二键合,即楔形键合125,则对半导体的潜在损害更糟糕。如图9B所示,形成楔形键合125和引线切口126的工艺产生了应力线,该应力被压入顶层金属98内,并最终被压入下方的硅和氧化物层内。除非精确控制压力,否则微裂纹很可能出现。在制造过程中,精确地控制机械加工需要频繁的机器校准、监测和维修。增加的预防性维护和更长的机器停工期导致更高的制造成本。
微裂纹问题的一种解决方案是,在专用键合焊点上而不是在有源器件区域上键合。避免有源区域上的键合导致更高的金属电阻,因为电流必须用薄金属片连接到焊点区域上,且可用的硅“面积”被损失。即便如此,楔形键合需要比球形键合大的面积,因为机器需要更大的空间来剪切键合引线。在图9C中,将通过虚线130显示并被非相连金属131环绕的球形键合的孤立键合焊点(例如栅极焊点)的尺寸与适用于楔形键合的相同焊点的形状进行比较。楔形键合焊点132和环绕金属133是矩形的,在一个方向上约长50%。例如,2密耳(50微米)金引线的球形键合可以被键合到尺寸为100微米×100微米的焊点上,而楔形键合需要150微米×100微米的大小。在其中的两个芯片通过键合引线连接(称为管芯与管芯键合)的封装中,两个键合中的一个必须是楔形键合。
引线键合的另一个特征性问题是引线和铝之间的劣质键合的可能性,特别是在大电流应用中。图9D中,球形键合140和铝焊点141的粘接显示了点A和B处的劣质粘接,在该点处,键合没有均匀接触金属。可以导致高界面电阻,可能还有长期的可靠性问题。
在过电流条件,如瞬时短路条件下,键合引线可能以多种不可预知的方式失效。在图9E中,键合引线142在A点已经熔化,而没有熔化周围的塑料143。在图9F中,大电流已经使线和周围的塑料熔化(B点附近),使引线142暴露,并产生熔化过程的副产物,如可能有毒的气体或淀积物144。熔化过程可能进而导致起火,特别是对于安装在包含有爆炸性化学物质的电池组内的功率晶体管。
随着时间的推移,引线键合上的其它失效依然会逐渐出现。电迁移失效,如图9G中C点处显示的那样,发生在电流密度比其周围高的地方(如引线可能被偶然弯折的地方),以及在金属原子逐渐转移到别的地方而进一步减薄该引线直到其断开的地方。
引线键合不是限制功率MOSFET导通电阻持续减小的电阻的唯一“寄生”要素。垂直功率MOSFET的薄顶层金属也对器件形成电阻。参考图10A,引线框150上安装的槽型栅极垂直功率器件包括一高搀杂的衬底151、一包含槽型栅极MOSFET器件的有源外延层、一薄金属层153和一键合引线154。每个区域确定了对产品电阻的贡献。在衬底151和外延层152的情形下,在垂直电流流动的方向上产生电阻。在引线框150上,横向(即垂直于硅)电流流动呈现出小的电压降,因为铜具有非常低的电阻并且引线框相对较厚(超过175微米或1.75毫米)。然而,顶部金属层153只有2至4微米厚,一般为薄50倍。因为键合引线154不覆盖管芯表面,所以从上千个到上万个晶体管发射出来的电流在抵达键合引线前必须在达毫米级的距离上横向流动。电阻Rmetal可以对器件贡献达几毫欧的电阻。键合引线154的电阻贡献每根引线几十豪欧,但在与许多引线(如15根键合引线)并联的情况下增加总共几毫欧的电阻。
由于顶部金属层的横向电阻,单个晶体管单元实际上不是并联的。简图10B示出了存在于相邻MOSFET器件161之间的有限横向电阻160。总源极电阻随着到最近的键合引线的距离而增加。不幸的是,通过IC工艺标准,4微米的金属已经非常厚了(大多数IC使用低于1微米的金属厚度)。这种厚层耗费长时间去沉积,并且如果它被沉积至过厚的值,则会开裂。增加键合引线的长度,以将键合更均匀地布置在器件的整个表面上,这同样有问题,因为它通过增加引线电阻162而将Rmetal横向电阻减少一量,该量和横向扩散电阻的减少量相同。如图10C概念地显示,长径比(到最近键合引线的距离除以沿管芯宽度的键合引线间的距离)上的任何增加均有效地损坏了通过增加更多的并联晶体管所得到的好处。由于增加的扩散电阻导致的所得的产品的金属电阻的增加,最终抵销了晶体管电阻上的任何益处。如电阻曲线(对应曲线图的左边Y轴的曲线)所示,具有增加的长径比的更大面积的器件慢慢地接近某最小电阻。导通电阻-面积的乘积(即对应于右边Y轴的曲线)实际上增加了,对于同样的性能,使器件更加昂贵。
图11A至11E总结了管芯布置和封装设计之间的一些可能的相互影响,考虑了所有与问题相关的上述键合引线。图11A中,用传统IC封装(如图2中介绍的第一个)来封装垂直功率器件的问题被作为例子。器件170具有到管芯焊点171的其背侧漏极连接,而其顶侧源极通过键合引线176与引脚173连接。其顶侧栅极连接通过引线175而引线键合到引脚172上。因为引线框171未直接和漏极引脚174连接,所以需要键合引线为从漏极引脚到管芯焊点171上的向下键合。
图11A的封装器件遭遇许多问题,包括:
它具有大的引线电阻;
它因高热阻而受损;
垂直器件需要的向下键合引入了另外的引线电阻;
向下键合限制了管芯的最大管芯尺寸,进而增加了导通电阻;
管芯表面上的横向延伸电阻大;以及
源极键合角受限制。
图11B中,通过将漏极引脚并到管芯焊垫(如图5的封装所示)中,避免了向下键合以形成一个新的管芯焊垫总成178,这减小了封装电阻,降低了热阻,并促进了大管芯面积。11B的封装还遭受许多限制,即:
源极键合引线电阻高,特别是引线的有限数量导致;
未确定功能的引脚的数量少,因为引脚的一半被固定到管芯焊垫上;
管芯表面上的横向延伸电阻大;以及
源极键合角受限。
图11C中,源极键合引线176的数量增加到15根。通过将三个源极引脚一起连接到总线条180上而引入额外的引线,从而增加了引线框上楔形键合可用的面积。否则,此封装特征和图11B所示的封装相似。另外,图11C的封装仍然有许多限制,即:
未分配功能的引脚数量少,因为引脚的一半被连接至管芯焊垫上,且其它引脚中的大多数被用于源极;
管芯表面上的横向延伸电阻大;
源极键合电阻虽然低,但仍然不可忽略;以及
源板键合角度受限。
图11C的封装的源极键合角上受限的一个例子示于图11D。在类似于图7F的管芯设计中,管芯179被分成三个独立的源极部分SA、SB和SC。到SA部分的源极引线键合必须经过栅极键合引线175附近的栅极焊点,这对制造是不可接受的。
较大的键合引线也不能减小整体电阻。如图11E所示,源极键合引线176被较大直径的引线182代替(例如用75微米的引线代替50微米的引线)导致更高的电阻,因为引线数量减少。栅极焊点也必须在尺寸上被增加,以容纳较大的栅极键合引线181,这进一步减小了有源区。
另一种封装技术是图12A至12D所示的TO-220族功率封装,虽然它比上述塑料表面安装封装更费成本。仅这些功率封装的材料成本就超过了许多SO-8型表面安装产品的整个生产成本。尽管如此,它因其低的热阻而已经得到应用,特别是汽车工业中。
在图12A中,TO-220封装包括一管芯焊垫191,它也是热金属块和外部安装薄片。漏极引脚192被并入管芯焊垫191中,而源极引脚193和栅极引脚194分别通过键合引线195和196而连接。在大批量生产设计中,选择键合引线195和196为相同的尺寸,一般为14或20密耳的铝引线。然而,大源极引线如果用作栅极接触,则会因它需要的过大的栅极焊点而浪费面积。使用两种不同尺寸的引线意味着装配工艺需要多步工序,对整个封装操作增加了成本。如图12B所示,垂片191覆盖封装的背部并再延伸出塑料197 35%或更多。于是,如果进行表面安装,则这种封装的面积利用率比SO-8低,也就是浪费了板的空间。
图12C示出了器件的截面,显示了没有被塑料覆盖且没有安装到任何硅管芯上的垂片的大部分。垂片的延伸部分基本上未改进器件的热或电阻,因而浪费了面积。图12C的直腿TO-220一般用于通孔型结构。相似大小的D2PAK和稍小一点的DPAK这两种变体具有相似的结构,除了导线被剪短并弯曲到表面上外。
这种封装的另一个主要限制是它所能容纳的键合引线的数量有限,甚至于它所提供的引脚数也受到限制(一般最多为3至7个)。在受限引脚中,中心引脚192是多余的,因为它与背侧的垂片191是电学相同的。因而,虽然背侧金属是个好的概念,它在TO-220封装族中的执行不适应于现代低成本封装技术,特别是对像功率IC那样的多引脚计数器件没有用。
图13A至13E示出了另一种封装技术,主要为多引脚计数应用而开发,它通过使用形成于晶片表面上的大的金凸点来消除键合引线。此技术应用在历史上被称为倒装芯片、凸点或载带自动焊(TAB)的装配方法中。到目前为止,凸点封装技术由于多种原因在功率器件应用中不成功。如图13A所示,许多高度为250微米或更大的金凸点生长在敞开的键合焊点上方的硅表面上。键合焊点通过钝化层206和下面的氧化物层205中的孔来确定。
芯片上的铝互连也在键合焊点区上提供了金属层201。然而,金不易沉积至大厚度,所以它必须通过电镀或化学镀来生长。为了在铝上面生长金,需要有中间层。一般地,在沉积可以开始前,一钛的薄层202,接着镍层203以及可能还有的金或银被蒸镀在管芯上。通常还需要额外的掩蔽步骤来除掉键合焊点之间的金属,以避免短路。凸点204的生长于是可以开始。金的电镀在工业上广为所知,这里不再讨论。
如图13B所示,一旦生长了凸点,带凸点的管芯可以通过超声波键合粘接到引线框207上,然后用塑料208封装。图13C所示的引线框可以是金属引线框,通常是一导体薄层209,例如在绝源带210上构图的铜(所以它的名字叫带自动焊)。管芯然后被凸点粘接到引线框上。实际上,引线框和载带可以有多层,如图13D所示。完成后的总成也可能涂覆一钝化层211,或是硅化合物,或是聚酰亚胺,以密封该产品。凸点212也可以形成于总成的外侧,以将它粘接到印刷电路板214上的金属迹线213上。这种结构通常称为焊球栅格阵列或微焊球栅格阵列。在图13E所示的其它情形下,可以通过将凸点204键合到电路板迹线213上而直接将管芯键合到PCB上。在这种情况下,需要钝化层211来保护管芯免受离子污染。
凸点和焊球栅格封装的问题在于其高成本和其相对低的可靠性,特别是在功率应用中。由于各种不同材料的热膨胀系数不同,在热循环和功率脉冲过程中,凸点界面202和203遭到恶化。虽然凸点技术无键合引线,但是它不是一个低成本大批量的技术,并且它不支持垂直导电器件,所以它在功率IC中的应用受到质疑,它在垂直功率分立元件中的应用性也非常差。
所需要的是低成本、高制造性,以及像SO-8封装结构一样的高可靠性但(理想地)具有类似D2PAK的热阻的无键合引线(BWL)封装技术。虽然在引进无线功率封装方面已经进行了一些试探,但是大多数都遇到了相似的问题,包括应力、管芯开裂、对准和多引线框的共面。
发明内容
根据本发明一个方面的一种引线框包括减薄的部分,这里称为“缺口”。该缺口位于它粘接到管芯上时引线框经过半导体管芯边缘的位置上。所以该缺口防止引线框和管芯边缘处的电元件发生短路,即使在引线框被弯向管芯时。引线框可以包括多个不同形式的缺口,以容纳一个或多个不同形状和大小的管芯。
根据本发明的另一个方面,引线框的导线包括“沟槽”,当引线被挤压到半导体管芯上时,该沟槽用作环氧树脂或焊料的容器。从而防止环氧树脂或焊料从导线向外铺展,并与另外的导线或是同样从其它导线向外铺展的环氧树脂或焊料接触,以导致导线间的短路。
根据本发明的再一个方面,导线包括多个孔或凹陷,这些孔或凹陷用作环氧树脂或焊料的容器,从而防止与邻近导线的短路。
附图说明
图1是传统塑料表面安装半导体封装的流程图;
图2显示带有端部片的传统引线框的平面图;
图3A至3G示出了传统表面安装半导体封装的工艺流程;
图4A和4B示出了传统表面安装封装半导体管芯的横截面图;
图5A至5G示出了制造用于垂直导电器件的表面安装半导体封装的工艺流程;
图6A至6C是概念性图表,示出了表面安装半导体封装的电热特性;
图7A至7F示出了各种垂直电流功率MOSFET的结构,包括平面DMOSFET和槽型栅极DMOSFET;
图8示出了由引线下垂导致的与管芯边缘和等电位环(EQR)的潜在引线键合短路;
图9A至9G示出了各种引线键合相关设计的约束和失效机制;
图10A至10C示出了垂直功率器件封装中的横向分布电阻效应;
图11A至11E示出了用于垂直功率MOSFET的引线框设计和键合图;
图12A至12D示出了T-220和派生封装中的热垂片类型结构;
图13A至13E示出了倒装芯片和凸点装技术的例子;
图14A示出了根据本发明的二引出端无键合引线封装的横截面图;
图14B至14I示出了现有技术的二引出端无键合引线封装可能发生的问题;
图15示出了单层无键合引线夹层封装和引线框的横截面图;
图16A和16B示出了在无键合引线封装的边缘可能发生的问题;
图16C示出了一种封装的横截面图,其中金凸点使引线框保持远离管芯边缘;
图16D示出了一种封装的横截面图,其中引线框的下沉将导线与管芯边缘隔开;
图16E示出了一种封装的横截面图,其中下沉与引线框中的一台阶结合以将导线与管芯边缘隔开;
图16F示出了一种封装的横截面图,其中引线框中的下沉和台阶与金凸点结合,以将导线与管芯边缘分开;
图17A至17H示出了封装设计中导线共面的问题;
图17I和17J示出了在形成连接中使用的环氧树脂或焊料可以向外铺展,从而导致相邻导线间的短路的方式;
图18A是制造包括一无键合引线源极连接和一键合引线栅极连接的功率MOSFET封装的已有工艺的流程图;
图18B至18G是示出图18A所示工艺的视图;
图19A是制造包括一管芯-跨接线总成的功率MOSFET封装的已有工艺的流程图;
图19B至19R是显示图19A所示工艺的视图;
图20A是根据本发明的半导体封装的横截面图,其中,一个顶部引线框上开有缺口并包含一弯曲部分,使得导线在同一水平面上伸出塑料封壳;
图20B是根据本发明的半导体封装的横截面图,其中,顶部引线框开有缺口,且底部引线框包括一下沉,使得导线在同一水平面上伸出塑料封壳;
图20C是根据本发明的半导体封装的横截面图,其中,顶部引线框开有缺口,且导线不在同一水平面上伸出塑料封壳;
图20D是根据本发明的半导体封装的横截面图,其中,底部引线框开有缺口,且导线不在同一水平面上伸出塑料封壳;
图20E是根据本发明的半导体封装的横截面图,其中,底部引线框开有缺口,且顶部引线框包括一下沉,使得导线在同一水平面上伸出塑料封壳;
图21是制造缺口型无键合引线封装的现有工艺的流程图;
图22A至22K是显示图21所示工艺的视图;
图23A至23C是横截面图,显示了各种缺口型无键合引线封装,该封装包括一粘接到管芯底部的金属块;
图24A至24C示出了一种封装,其中,引线框中的缺口覆盖管芯的整个周长;
图25A至25H示出了可以用于容纳不只一种尺寸的管芯的引线框;
图26A至26E示出了专门设计来与在其顶侧带有栅极和源极引出线的功率半导体管芯一起使用的引线框;
图27A是包含缺口的引线框的平面图,该引线框可以用于接触具有各种形状和大小的小方片;
图27B是图27A的粘接到特定尺寸管芯上的引线框的横截面图;
图28A至28E示出了引线框中沟槽的使用,以防止环氧树脂或焊料从导线下向外铺展而与另一导线形成短路;
图28F至28L示出了带有各种图案的沟槽和缺口的引线框;
图29A和29B示出了一种引线框,该引线框包括袋或空腔以防止环氧树脂或焊料向外铺展;以及
图30A至30C示出了一种引线框,该引线框包括防止环氧树脂或焊料向外铺展的多个凹陷或孔。
具体实施方式
图14A至14I示出了用于如PIN二极管、瞬态抑制器、稳压二极管等二引出端器件的多种无键合引线(BWL)封装的结构,它需要表面安装封装。该封装技术也可以用于电容器、保险丝和其它无源器件。
在图14A的封装300的结构中,两个引线框302和304基本平行,中间夹着一具有导电的上和下表面的半导体管芯306。引线框302和304通过导电环氧树脂(填充银)或焊料的中间层308、310而粘接到管芯306上。引线框导线在两个不同的高度上(相对于电路板)伸出封装300,并弯曲成位于同一平面上的线尾302A和304A,以安装在印刷电路板的表面310上。总成涉及将管芯306安装到第一引线框304上,如图14B的平面图或图14C的截面图所示。管芯粘接优选地通过将导电环氧树脂涂到引线框上,或管芯背面,然后施加压力以将环氧树脂挤作沿管芯的厚度均匀的薄层而获得。优选地,根据环氧树脂的不同,压力在125至390℃的局部固化过程中应当保持10分种到5个小时。中心连接条304B和边缘连接条304C在图14C中被显示成虚线以说明其位置。
在图14D中,第二(顶部)引线框302或管芯306涂覆有另一层导电环氧树脂。接着,引线框302被定位或对准管芯306(或引线框304),并再次在受控压力下挤压一段时间,以将环氧树脂308重分布成薄的均匀层。图14E用横截面图示出了相同的夹层,还是分别将图中垂直凸出的中心和边缘连接条302B和302C表示成虚线。在该设计中,顶部引线框302上的中心连接条302B位于下部引线框304的中心连接条304B的左侧,两者距离为D。通过偏移顶部和底部中心连接条302B和304B,可以施加均匀压力,以将导致夹层非均匀压缩的引线框的扭曲减至最小。优选地,引线框合适地保持着恒定压力直到固化完成。
图14F说明了在管芯分离(修剪)过程中对连接条上受控压力的需要。修剪刀刃的下切压力在每个引线框的力矩中心附近产生一扭矩,该扭矩因其所处的高度不同而不同。在本发明的优选实施例中,中心连接条302B和304B上的压力抵销了该扭曲运动。如图14G所示,没有此补偿力的话,半导体则会在右侧受压,导致管心裂纹D,或在左侧受拉,这导致位置E或F处的开裂的环氧树脂。
此外,作为本发明的另一个特征,相同的反向抵抗力或扭矩可以施加到引线框上,以防止在引线弯曲过程中的损坏(见图14H),从而避免塑料开裂G或塑性分层H,如图14I所示。这种封装的工业尝试还没有采用平衡扭矩法。即使三年工程发展后,封装开裂和可靠性失效仍防止了这种产品的制造许可。
总之,由于引线框相对于管心不对称,在引线框到管芯的粘接过程中或导线的修剪或弯曲过程中,扭矩会作用到封装上。此扭矩能导致封装的分层或其它损坏。假设顶部引线框延伸到管芯右侧,而底部引线框延伸到管芯左侧,如图14A至14I所示,则顶部引线框的扭矩将是顺时针方向的,而底部引线框上的扭矩将是逆时针方向的。为了抵消这些扭矩,顶部引线框上的中心连接条偏移至底部引线框上的中心连接条的左侧。在顶部引线框延伸到管芯左侧,而底部引线框延伸到管芯右侧的封装中,顶部引线框上的中心连接条偏移到底部引线框上的中心连接条的右侧。
图15示出了二引出端BWL封装的一种变体,其中,引线框中的下沉320,塑料322包住的部分,使导线能在离电路板相同的高度上从塑料中伸出。
图16A至16F示出了顶部引线框330与管芯边缘或EQR 332之间的可能的短路,以及各种将其发生的可能减至最小的设计。图16A中,钝化层334覆盖EQR顶部以将短路危险减至最小。封装塑料用335表示。该实施例的另一个特征是与焊点窗口中的钝化层顶部高度相同的平坦化的金属层336。此层改善了BDL引线框和管芯金属化层之间的电接触。填充金属可以是通过化学气相沉积并被回刻平坦的钨。否则,该层可以是通过CMP(化学机械抛光)沉积的厚而平坦的铜层。
在图16B中,将一未钝化的管芯粘接到BWL引线框上,它靠在注射塑料335上,以避免引线框与EQR或管芯边缘332之间的短路。在此方案中,第二金属层338保持引线框不与金属1层340接触,直到可以向间隙中引入塑料为止。
另外,图16C所示的金凸点342可以用来保持引线框344远离管芯边缘346,这里还显示了在相对于电路板352的不同水平面上伸出封装350的引线框344和348。图16D中,顶部引线框354中的下沉352用于躲避管芯边缘356。引线框354未延伸越过管芯358的其它边缘,所以在其附近没有短路的危险。然而,在这种设计中,金属导线354和360以不同的高度伸出封装362,因此必须采用扭矩平衡法来避免管芯和塑料开裂。
此扭矩问题在图16E所示的设计中通过环状设计减为最小,该环状设计将下沉364与台阶366结合,从而导线368和370在封装的两侧以相同的高度伸出封装372。图16E描述了将引线框368和370粘接到管芯371上的导电环氧树脂374的使用。图16F示出了相同的封装372,它用金凸点376来将引线框368粘接到管芯371上。
三引出端无键合引线封装
虽然在BWL封装过程中施加零扭矩和衡定均匀的压力(如上所述)对二引出端垂直器件已经足够了,但是如BWL封装中的垂直功率MOSFET的三引出端器件并不完全是简单明了的。
图17A至17J示出了三引出端BWL封装导线共面中的主要问题。在图17A中,下沉引线框402和硅管芯404(涂有导电环氧树脂粘结剂406)对齐并相互接触,如图17B所示。优选地,衡定压力和最小扭矩通过相同的力将栅极引线408(薄的独立导线)和宽源极金属410挤压在管芯表面上。但是,事实上很难保证两根导线408和410的粘接表面共面,也就是在相同水平面上。对于连接条(未显示),易于弯曲一小量,使得栅极导线408的粘接表面例如可以略高地定位在源极导线410的粘接表面上方。如图17C所示,这种共面问题的后果是栅极导线408没有以足够的力压到管芯404上以重新分布环氧树脂。结果,栅极导线408具有与栅极焊点412的不良(或无)接触(如图17A所示)。
为了进一步澄清这个问题,图17D示出了下沉导线414,它被适当地压到环氧树脂中间层416上,从而形成与焊点418的良好接触。在图17E中,下沉导线420与焊点418的表面平行,但绝不接触,这导致开路和无效器件。在图17F中,导线422被弯曲而仅在其跟部上接触,而在图17G中,仅引线424的尖端接触环氧树脂416。在图17H中,导线426仅与环氧树脂416接触,但是这种接触如此之轻,以致于它未适当地重新分布环氧树脂416,这导致不良电接触。
在图17I所示的截面图中,用过大的力挤压环氧树脂430(或者涂覆过多的环氧树脂),这导致源极引线框432和栅极引线框434之间的横向短路,如图17J的平面图所示。
共面问题是如此麻烦,它使得许多公司放弃了无键合引线栅极接触,转而使用栅极键合引线和无键合引线源极连接。图18A示出了这种复合工艺流程。在这种流程中,管芯和顶部引线框之间的环氧树脂管芯粘接(以及局部固化)之后是翻转管芯,并用环氧树脂将它粘接到底部引线框上。在没有先前所公开的受控扭矩的情况下,难以最佳地维持均匀的界面环氧树脂层。
此外,在这种流程中,引线键合必须在BWL管芯粘接以后进行。在引线键合后,还必须进行模塑、修剪和成型。图18B示出了环氧树脂粘接到管芯442上的顶部引线框440。弯曲的金属驼峰引线框440(即上升和下沉的引线框)使均匀的管芯粘接操作很困难。在管芯粘接后,图18C的平面图示出了用于引线键合栅极的顶部引线框440的BWL部分444和较短的“跳板”片446。即使用连接条连接到一侧,引线键合过程中保持引线框440稳定也是困难的。
顶部引线框440粘接到管芯442上后,底部引线框448通过导电环氧树脂而被管芯粘接,如图18D的横截面图和图18E的平面图所示。再者,管芯粘接和固化过程中控制扭矩和压力是可靠产品的关键。然后用键合引线450引线键合栅极导线446,如图18F的透视图所示。注意,引线键合过程中栅极导线446与带有其自由端小支撑的跳板是机械类似的。它的移动使栅极键合452的质量值得怀疑,并且使该质量可变。图18G示出了塑料模塑(如虚线454所示)后的另外一种透视图。设计的非对称性使这种方法的制造复杂且难以再现。
图19A所示的流程图中示出了避免共面问题的另一种方法。在这种方法中,管芯首先被粘接到铜跨接层上而形成管芯和跨接线总成,然后将管芯和跨接线总成粘接到传统引线框上。在此第二粘接后,还必须将该部件引线键合以连接器件的栅极。其后对该结构进行模塑、修剪和成型。
在图19B中,还将金属驼峰片与管芯462对齐,在此情形中该驼峰片是“跨接线”460。跨接线460有均匀的宽度(见图19C),因此,必须对它进行定位,以使其不覆盖栅极键合焊点464(见图19E),而仍接触源极。图19D的横截面图和19E的平面图中,跨接线460被示作源极导线,它被环氧树脂粘接到管芯462上,从而形成管芯和跨接线总成461。关键的是,驼峰引线框460的线脚466的底表面和管芯462优选地共面,以避免工艺后期的问题。
如图19F的横截面图和图19G的平面图所示,底部引线框470看起来类似普通引线框。注意,虽然在图19F至19R中引线框呈现为分立部件,但是事实上,该部件通过连接条(未显示)连接。引线框470在粘接到管芯上之前一般是平的,虽然可以想像地它可以预先成型,即已经弯曲。
在图19H和19I中,包括管芯462和铜跨接线460的管芯和跨接线总成461与涂有环氧树脂472的底部引线框470对齐。在这一点上,涂到底部引线框470上的环氧树脂472没有与管芯相对应的表面特征,如栅极焊点464。图19J是被压到底部引线框470上的管芯和跨接线总成461的视图,它取自图19I所示的J-J截面。很明显,管芯462和跨接线460的线脚466的底面的共面是同时实现两个良好的低电阻环氧树脂连接的关键,这两个连接分别是管芯460下的一个和线脚466下的另一个。因为第二连接是面积有限的,所以与下面将要讨论的其它三引出端BWL封装相比,这个区域导致了增加的电阻。图19K中示出了栅极键合区的视图,它取自图19I中的K-K截面。
在通过压力挤压环氧树脂后,环氧树脂优选地应当均匀地重新分布到金属跨接线的底部上和管芯之下,如图19L所示。因为虽然封装是总体对称的,但实际上均匀压力难以重复得到。如图19M的截面图和19N的平面图所示,然后进行引线键合480,接着进行注射模塑,形成塑料封壳482,如图19O和19P所示。
明显地,输运大电流的环氧树脂层的数量远大于比其它封装方法-在图19Q所示的设计中是3层,即环氧树脂层484、486和488。一种如图19R所示的在引线框470下引入热金属块492的选择包括另一个环氧树脂层490。这种设计完全依靠环氧树脂层490来将热金属块492固定在引线框470之上,而不需要任何机构来将其“锁定”在适当位置。
特别是在诸多的环氧树脂管芯粘接步骤中,设计的非对称性还使得这种设计的大批量生产无法实现。明显地,大量的加工步骤使成本增加。分裂引线框(即包括栅极和源极连接的引线框)的非平面表面尤其是问题,因为任何下沉均在顶侧管芯粘接过程中使共面问题恶化。
具有缺口引线框的非对称三引出端无键合引线封装
一个主要的改进来自采用平顶引线框,也就是基本上保持与管芯外形的管芯内侧平行的引线框。一种实现这个目标并仍能避免上述管芯边缘短路问题的方法是在引线框越过管芯边缘的所有地方减薄或“切口”引线框。通过减薄或将一部分金属从引线框面对管芯的表面上去除,引线框和管芯相对表面之间的距离增加,从而减小或消除了管芯边缘、端部或等电位环的短路危险。引线框的厚度可以整体增加,以在切口区保持可接受的厚度标准。在一个实施例中,切口区具有正常用于引线框的厚度,即0.2毫米,非切口区根据切口深度的不同厚15至70%。该切口可以例如通过光刻构图和蚀刻引线框(有时称为“半蚀刻”)或通过配备有适当模具的冲压机冲压引线框形成。所有这些技术都涉及现有的技术和设备。
假设顶部引线框仅在一侧经过管芯边缘,则多种基本的设计变体是可能的,如图20A至20D的截面图所示。在图20A中,塑料501中底部引线框500是平的,且顶部引线框502包括一弯曲部分504,使得引线框500和502在相同的高度上(相对于PCB 506或导线线脚)伸出塑料501。由栅极和源极导线构成的顶部引线框502包括一缺口508,该缺口位于引线框502经过或越过管芯510的边缘509的地方。
在图20B中,底部引线框520包括一下沉521。假设引线框520具有与管芯边缘524相同的电势,则引线框520和管芯边缘524之间没有短路的危险,因为它们有相同的电压。至少由栅极和源极连接构成的顶部引线框522除了引线框522经过管芯边缘529处的缺口526外基本上是平的(即平坦的)。优选地,顶部引线框522和底部引线框520在相对于PCB 530和导线线脚532的相同的高度上伸出塑料527。
在图20C中,顶部引线框540和底部引线框542都不包括塑料544内的下沉或弯曲部分,但是引线框540和542在相对于PCB 546的不同的高度上伸出塑料544。在引线框540经过管芯边缘549的地方有一缺口548。
图20D和20E示出了可能的“相反管芯”设计,其中,带缺口的多引出端引线框560位于管芯562下面,管芯562的多引出端侧则面朝下,从而与引线框560上相应的连接连接。在图20D中,顶部和底部引线框564和560在不同的高度上伸出塑料封装566,而在图20E中,顶部和底部引线框568和560是共面的,因为顶部引线框568包括一个向上弯曲部分570,此部分位于塑料566的边界内。
在此处使用的术语中,“顶部”引线框是其中至少具有栅极和源极引出端的引线框,也就是管芯的多引出端侧,而“底部”引线框是单个实心片。这种设计当然能通过用作下侧引线框的多引出端引线框和带有单个电引出端的顶部引线框而反转。在垂直分立功率MOSFET中,管芯将具有其朝下的源极侧和其朝上的漏极。
图21示出了制造缺口型无键合引线(BWI)封装的工艺流程,该流程以带缺口的顶部引线框和硅管芯开始,籍此,两者被对齐、环氧树脂管芯粘接和固化(或局部固化),优选地在衡定压力下(用下面将要描述的方法)进行。虽然在这一步中也可以用软焊料来进行顶部管芯粘接,但是使具有焊料的多引出端引线框短路的几率比用导电环氧树脂的相同危险大,因为熔融焊料是“浸润的”,并且可以沿管芯表面横向流动。
接着,优选地在衡定压力下,将管芯顶部引线框总成环氧树脂粘接到底部引线框上,并固化导电环氧树脂。另外,软焊料还可以用于管芯粘接。可选地,在工艺中的这个阶段上,利用环氧树脂管芯粘接或可选地使用软焊料将热金属块粘接到下侧引线框上。
然后,用塑料模塑化合物对具有或不具有热金属块的整个总成进行注射模塑,接着修剪并弯曲导线(成型)。
图22A至22K中详细地示出了这些步骤。
图22A和22B分别是带有缺口582的顶部引线框580的横截面图和平面图。图22C和22D是相似的视图,示出了位于管芯584之上的顶部引线框580,缺口582位于引线框580越过管芯584的边缘的地方。图22E是一截面图,示出了通过导电环氧树脂层586粘接到管芯584上的引线框580。图22F是在与图22E成直角的方向上得到的截面图。
图22G和22H分别是该总成在用导电环氧树脂层590将底部引线框588粘接到管芯584上之后的截面图和平面图。图22I示出了注射模塑成塑料封壳592后的引线框580和588以及管芯584。
图22J示出了另一种总成,其中,热金属块或热沉594用环氧树脂层596粘接到底部引线框588上。图22K示出了由塑料598包封的顶部引线框580、管芯584、底部引线框588和热金属块594的总成。
图23A至23C中示出了各种金属块引线框设计,其中图23A对应于图20A的金属块形式,图23B对应于图20B的金属块形式,而图23C对应于图20C的金属块形式。
图24A至24C示出了管芯多个侧部上环绕管芯边缘的引线框缺口的使用,以避免在两者重合的任何区域内的边缘短路。在每个实施例中,单个管芯的尺寸与引线框匹配。这具有对每个管芯尺寸需要新引线框的缺点。
图25A至25H示出了容纳多种管芯尺寸的引线框设计。每个引线框包括多个缺口,该缺口可以用以容纳不同的管芯尺寸。在每个平面图(图25B、25D、25G和25H)中,引线框上的阴影部分表示缺口;且在每个截面图(图25A、25C和25E)中,管芯#1、管芯#2和管芯#3表示每个均可单独与所示引线框一起使用的小方片。然而,在图25A和25B中所示的双环引线框600中,图25A的管芯1设计将不能工作,因为在两个所示位置它将会短路。图25C和25D的同心设计的引线框602避免了这个问题,但只适用于二引出端器件。将管芯和一边缘对齐(图25F)或作为一个栅格(图25G)使之可以将此二引出端设计适应于如图26所示的多导线设计。图27示出了图26G的3引出端栅格形式。
图26A示出了用于和带有一栅极焊点614和一源极焊点616的功率MOSFET管芯612一起使用的顶部引线框610。缺口615重叠在管芯612的边缘上。图26B显示了粘接到管芯612上的引线框,图26C示出了粘接到功率MOSFET管芯612的漏极引出端(未显示)上的底部引线框618。图26D和26E示出在图26C的D-D和E-E截面截取的横截面视图。
图27A示出了具有十字图案的缺口的管芯的平面图,它可被用来与各种管芯形状和尺寸(虚线表示了一个例子)进行粘接。缺口有效地形成台面图案,环氧树脂或焊料可存储在该图案中。图27B是截面图,示出了安装到图27A所示种类的引线框上的管芯。
图28A示出了作为沟槽的缺口捕获过多焊料或环氧树脂,以避免导线至导线短路的使用。导线630A和630B表示这样的导线,该导线是引线框630的一部分,但是在封装完成以后,它们彼此电绝源。(换句话说,导线630A和630B起初通过将被切断的连接条连接。)导线630A将电连接到管芯636上的焊点636A上,且导线630B将电连接到管芯636上的焊点636B上。导线636A包括沟槽632,导线630B包括沟槽634。明显的是,当引线框630被压到管芯636上时,环氧树脂层638和640将倾向于向外铺展,并且,如果不检查的化,可能在导线630A和630B之间造成短路。图28C至28E示出了可以防止短路的机构。随着环氧树脂层638和640受压,它们分别流到沟槽632和634中,而不会在导线630A和630B之间形成导电桥。
图28F至28L示出了引线框上与管芯相关的各种沟槽和缺口图案。虽然沟槽被显示得比缺口窄,但是不必如此。
图29A示出了带有彼此电绝源的导线650A和650B的引线框650的截面图。引线650A包括一凹处651,环氧树脂层656沉积在该凹处内。定位凹处651以与管芯652上的凸起焊点654匹配。调整包围凹处651的壁651A和651B的尺寸,使得当引线框650被压到管芯652上时,壁651A和651B将环氧树脂“密封”到凹处651内,如图29B所示。
图30A示出了其中形成有多个孔或凹陷672的引线框670的截面图。图30B示出了平面图,它包括获得图30A的横截面B-B。如图30C所示,当环氧树脂676涂到引线框670的表面上,且引线框670被压到管芯674上时,环氧树脂流到凹陷672中,从而进一步防止环氧树脂往外的流出以及可能导致的短路。引线框670还包括额外防止短路的一个可选沟槽675。
在本发明的具体实施例已得以描述时,对于本领域技术人员来说,明显的是,这些实施例仅是显示例性的,而非限制性的。对本领域技术人员而言,由此处描述所作出的根据本发明的诸多替换实施例是明显的。
Claims (13)
1.一种管芯引线框组合,包括:
具有第一和第二主表面的管芯;
第一引线框,此引线框具有与所述第一引线框的一部分相连的第一连接条,此第一引线框在第一方向上在管芯第一主表面上作用一压力;
第二引线框,此引线框具有与所述第二引线框的一部分相连的第二连接条,此第二引线框在与第一方向相反的第二方向上在管芯第二主表面上作用一压力;
其中,第一和第二连接条彼此偏移,使得第一和第二引线框分别在第一和第二方向上作用在管芯上的压力在管芯上产生一扭矩。
2.一种将第一和第二引线框安装到半导体管芯的第一和第二表面上,使得安装过程中基本上没有扭矩施加到管芯上的方法。
3.如权利要求2所述的方法,其特征在于,第一引线框包括第一外部连接条和第一中心连接条,第二引线框包括第二外部连接条和第二中心连接条,且在安装过程中,第一中心连接条横向地定位在第二中心连接条和第二外部连接条之间。
4.如权利要求3所述的方法,其特征在于,第二中心连接条横向地位于第一中心连接条和第一外部连接条之间。
5.如权利要求4所述的方法,其特征在于,包括将导电环氧树脂涂覆到管芯的第一和第二表面上,并使环氧树脂固化。
6.如权利要求5所述的方法,其特征在于,在环氧树脂固化时,管芯基本上不受扭矩作用。
7.如权利要求6所述的方法,其特征在于,包括修剪引线框,从而将外部连接条与导线分离,其中,在修剪过程中管芯基本上不受扭矩作用。
8.如权利要求7所述的方法,其特征在于,弯曲一根或多根导线,其中,在弯曲过程中管芯基本上不受扭矩作用。
9.一种半导体管芯封装,包括半导体管芯和粘接到管芯表面上的引线框,多根导线从表面伸出而超出管芯边缘,缺口在一位置上在至少一根导线上形成,至少一根导线在此位置上越过管芯边缘,该缺口形成在至少一根导线的面对管芯的一侧上。
10.如权利要求9所述的半导体封装,其特征在于,包括粘接到管芯第二表面上的第二引线框,第二组导线从第二表面伸出而超出管芯的第二边缘,第二缺口在一位置上形成在第二引线框的第二导线上,第二导线在此位置上越过管芯的第二边缘,该第二缺口形成在第二导线的面对管芯的一侧上。
11.如权利要求10所述的半导体封装,其特征在于,包括封闭管芯的塑料封壳,第一和第二组导线在同一水平面上从封壳伸出。
12.如权利要求11所述的半导体封装,其特征在于,第一组导线在封壳内的一个位置上被弯曲。
13.一种引线框,用于在封装中与半导体管芯形成电连接,该引线框包括导线,该导线有多个切口,使得引线框可以用于具有不止一种尺寸的方片,该缺口中的一个位于每个方片的一边缘上方。
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CN100393184C (zh) * | 2005-03-09 | 2008-06-04 | 奇景光电股份有限公司 | 具有导槽的基板 |
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CN104916614A (zh) * | 2014-03-12 | 2015-09-16 | 株式会社东芝 | 半导体装置及其制造方法 |
CN110168388A (zh) * | 2017-02-20 | 2019-08-23 | 新电元工业株式会社 | 电子装置以及连接体 |
CN110168388B (zh) * | 2017-02-20 | 2021-10-22 | 新电元工业株式会社 | 电子装置以及连接体 |
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CN109935548A (zh) * | 2017-12-19 | 2019-06-25 | 中芯国际集成电路制造(上海)有限公司 | 半导体器件及其形成方法 |
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CN111524868B (zh) * | 2020-03-25 | 2024-03-12 | 长电科技(宿迁)有限公司 | 一种引线框架和金属夹片的组合结构及铆接装片工艺 |
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WO2000074448A9 (en) | 2002-04-18 |
US6307755B1 (en) | 2001-10-23 |
CN1188019C (zh) | 2005-02-02 |
WO2000074448A1 (en) | 2000-12-07 |
AU5295400A (en) | 2000-12-18 |
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