CN1670935A - 引线键合方法和半导体器件 - Google Patents

引线键合方法和半导体器件 Download PDF

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Publication number
CN1670935A
CN1670935A CNA200510054299XA CN200510054299A CN1670935A CN 1670935 A CN1670935 A CN 1670935A CN A200510054299X A CNA200510054299X A CN A200510054299XA CN 200510054299 A CN200510054299 A CN 200510054299A CN 1670935 A CN1670935 A CN 1670935A
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China
Prior art keywords
conductor
welded
ball
lead
chip
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Granted
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CNA200510054299XA
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CN100361285C (zh
Inventor
石川克己
牧野信也
武井宏
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Denso Corp
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Denso Corp
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004—Wire welding
    • B23K20/005—Capillary welding
    • B23K20/007—Ball bonding
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Abstract

一种引线键合方法，用于键合多根导线(6)以连接第一导体(4，5，6)和第二导体(4，5，6)，该键合方法包括步骤：1)将第一导电球(8)焊接在第一个第一导体(4或5)上；2)将第一导线(6)焊接在第一导电球(8)上，该第一导线(6)与第一个第二导体(5或4)相连接；3)将第二导电球(8)焊接在第二个第一导体(6或(4或5))上；4)将第二导线(6)焊接在第二个导电球(8)上，该第二导线(6)连接到第二个第二导体((4或5)或6)。这里，该第二个第一导体(6或(4或5))或该第二个第二导体((4或5)或6)是焊接在第一导电球(8)上的第一导线(6)。

Description

引线键合方法和半导体器件
技术领域
本发明涉及半导体器件的引线键合方法，以及利用此方法制作的半导体器件。
背景技术
传统的半导体功率器件，如：侧向扩散MOS(LDMOS)，在半导体芯片上有多个芯片电极，以实现其内部大电流的调整。功率器件也具有一定尺寸的互连，用来连接其上的多根Au(Au)线。通过引线键合方法，Au线连接芯片电极和互连。在这种情况下，使用JP10-229100A的引线键合方法，多根Au线(例如，三根Au线)连接到相同数量的芯片电极(例如，三个电极)和互连。
功率器件要求半导体芯片上有多个芯片电极，用来实现其内部大电流的流通。这会使半导体芯片和半导体器件的尺寸大。
发明内容
本发明的目的是提供一种引线键合方法和用此方法制作的半导体器件，此器件的半导体芯片的芯片电极数量少，从而其尺寸减小。
为了实现以上目的，通过键合导线以连接第一和第二导体的引线键合方法包括以下步骤：1)在第一个第一导体上焊接第一导电球。2)在第一导电球上焊接第一导线，该第一导线连接第一个第二导体。3)在第二个第一导体上焊接第二导电球。4)在第二导电球上焊接第二导线，该第二导线连接第二个第二导体。此处，第二个第一导体或第二个第二导体是焊接在第一导电球上的第一导线。
附图说明
通过研究下列详细描述、所附权利要求书和附图，将可以理解本发明的其它特征和优点、操作方法和相关部件的功能。在附图中：
图1示出了根据本发明的第一实施例的半导体器件及半导体器件制作方法的侧视图。
图2的垂直剖面图示出了根据该第一实施例的第一过程：球焊接Au线以在焊盘上形成凸焊点。
图3的垂直剖面图示出了根据该第一实施例的第二过程：在电极上形成凸焊点。
图4的垂直剖面图示出了根据该第一实施例在电极上形成凸焊点的完成状态。
图5的垂直剖面图示出了根据该第一实施例在焊盘部分上球焊接第一Au线，和在凸焊点上楔形焊接第一Au线的过程。
图6的垂直剖面图示出了根据该第一实施例在凸焊点上完成楔形焊接第一Au线的状态。
图7A的垂直剖面图示出了根据该第一实施例，在已经预先楔形焊接第一Au线的凸焊点上，球焊接Au线以形成另一个凸焊点的第一过程。
图7B的垂直剖面图示出了根据该第一实施例在该凸焊点上形成又一个凸焊点的第二过程。
图7C的垂直剖面图示出了根据该第一实施例在该凸焊点上形成又一个凸焊点的完成状态。
图8的垂直剖面图示出了根据该第一实施例，在焊盘部分上球焊接第二Au线，和在之前已经在其上球焊接Au线的又一凸焊点上楔形焊接第二Au线的过程。
图9示出了利用根据本发明的第二实施例的半导体器件制作方法制作的半导体器件的侧视图。
图10示出了利用根据本发明的第三实施例的半导体器件制作方法制作的半导体器件的侧视图。
图11示出了利用根据本发明的第四实施例的半导体器件制作方法制作的半导体器件的侧视图。
图12示出了利用根据本发明的第五实施例的半导体器件制作方法制作的半导体器件的侧视图。
图13示出了利用根据本发明的第六实施例的半导体器件制作方法制作的半导体器件的侧视图；和
图14示出了利用根据本发明的第七实施例的半导体器件制作方法制作的半导体器件的侧视图。
具体实施方式
下面将参考图1-8描述在功率器件中应用本发明的第一实施例。
如图1所示，在这个实施例中，半导体器件1通常包含：用来在其上固定芯片的岛2、位于岛2上的半导体芯片3、以及互连4。半导体芯片3可以是IGBT或功率MOSFET。三根Au线6使用引线键合方法连接半导体芯片3上的芯片电极(焊盘)5和互连4。
在互连4和芯片电极5之间引线键合Au线6的过程描述参见图2至8。
首先，如图4所示，在芯片电极5上，通过球焊接Au线6形成凸焊点7。球焊接过程如图2和3所示。如图2所示，用于供给Au线6的毛细管9在其顶端(末端)形成Au球8，并将Au球8放在芯片电极5上。然后，如图3所示，毛细管9将Au球8固定在芯片电极5上，通过向其施加压力和超声波，将Au球8塑性变形成凸焊点7。毛细管9顶端有一个圆锥形的腔，以便将凸焊点7形成为近似圆锥形。提起毛细管9，并从凸焊点7上切断Au线6，成为如图4所示的状态。
在上述切断Au线的过程中，理想的是：将毛细管9的顶端提起预定的高度，然后横向移动该顶端并稍靠近芯片电极5。上述过程在半导体芯片3的芯片电极5上形成了凸焊点7。
接下来，如图5左侧部分所示，采用与图2和3所示的相同的球焊接过程，毛细管9在互连4上在Au线6的末端球焊接另一个Au球8。然后，提起毛细管9的顶端，不切断Au线6并横向移动到通常位于半导体芯片3的电极5的上方且稍微超出电极5的位置，如图5所示。毛细管9将Au线6固定在凸焊点7的顶部，凸焊点7具有通过楔形焊接(缝焊(stitch bonding))形成的近似圆锥形，如图6所示。提起毛细管9，并切断Au线6，以便Au线6的末端呈楔形，从而形成楔形焊接部分10，如图6所示。
然后，如图7A至7C所示，通过球焊接Au线6，将另一个凸焊点7固定在凸焊点7之上，该凸焊点7上已经存在如上所述的楔形焊接的Au线6。尤其是，如图7A所示，供给Au线6的毛细管9在其顶端形成Au球8，并将Au球8放在楔形焊接部分10上。然后，如图7B所示，毛细管9将Au球8固定在楔形焊接部分10上，同时采用与图2和3所示的球焊接过程相同的方式，将Au球8塑性变形成形状近似圆锥形的凸焊点7。与此同时，毛细管9将凸焊点7的底端部分变形成与楔形焊接部分10下的凸焊点7相接合的形状。这样，这两个凸焊点7近似排列在与芯片电极5的表面相垂直的一条线上。提起毛细管9，并从凸焊点7上切断Au线6，以形成堆叠的凸焊点7，如图7C所示。这里，提起毛细管9的顶端到预定的高度，然后横向移动并稍微靠近楔形焊接部分10。
进一步，毛细管9在互连4和Au球8的堆叠凸焊点7之间焊接第二根Au线6，如图8所示。具体是，毛细管9通过在其顶端形成Au球8并将Au球8压在互联4上，将Au线6的末端固定在互连4的一部分上。然后，提起毛细管9，并横向移动至通常位于凸焊点堆叠层上方且稍微超过该堆叠层的位置。毛细管9通过楔形焊接推压Au线6将其固定在堆叠的凸焊点上。提起毛细管9，从楔形焊接部分切断Au线6。
毛细管9在互连4和Au球8的堆叠凸焊点之间焊接第三根Au线6，成为如图1所示的状态。具体是，毛细管9形成Au球8，并采用与图7 A至7C所示的焊接过程相同的方式，将Au球8压在Au球8的堆叠凸焊点上。然后，通过与如图8所示的楔形焊接过程相同的方式，毛细管9在互连4的一部分和Au球8的堆叠凸焊点之间焊接Au线6。如上所述，毛细管9在互连4和半导体芯片3上的芯片电极5之间焊接了三根Au线6。
根据该第一实施例，通过堆叠三个Au球8以便在芯片电极5上固定相同数量的Au线6，可减少半导体芯片3上芯片电极5的数量。这有助于制作小面积的半导体芯片3和包含半导体芯片3的半导体器件。
此外，通过依次重复在另一个已有楔形焊接Au线的Au球8上球焊接Au球8的过程，以及楔形焊接其末端球焊接在互连4上的Au线6的过程，该第一实施例使得能够容易地在半导体芯片3的芯片电极5上固定超过三根Au线6。这种构造有助于减少半导体芯片3上的电极5的数量，和以较小的尺寸制作半导体芯片。
更进一步，在该第一实施例中，芯片电极5上三个凸焊点7被变形成彼此键合，并近似排列在与芯片电极5表面相垂直的一条线上，三个凸焊点彼此牢固固定，以便不被外力(例如碰撞)分开。
在该第一实施例中，焊接三根Au线6以连接互连4和芯片电极5，然而，本发明并不限制焊接引线的数量。可以通过相同方法，使用两根或超过三根的Au线6连接互连4和芯片电极5。
图9描述了本发明的第二实施例。在第二实施例中，三个Au球8堆叠在互连4上，每个Au球8上楔形焊接Au线6。采用基本与第一实施例相同的方式，在互连4上堆叠三个Au球8，并且在每个Au球8上楔形焊接Au线6。这三根Au线6的另一端球焊接在三个芯片电极5上，这三个芯片电极5并列于半导体芯片3的同一平面上。
该第二实施例包括步骤：在互连4上堆叠第一凸焊点形状的Au球8，在互连4上堆叠的每个Au球8上楔形焊接第一根Au线6，该Au线6的另一端球焊接在半导体芯片3的第一芯片电极5上。以上的堆叠过程和连接过程可交替重复用于第二和第三组。
除了以上描述的部分，第二实施例具有与第一实施例相同的构造。
根据第二实施例，通过在互连4的一部分上固定或堆叠三根Au线，有可能制作小面积的互连4。
图10描述了本发明的第三实施例，其中底部、中间、顶部半导体芯片11、12、13堆叠在岛2上。第一Au线6连接互连4和球焊接在底部半导体芯片11上的芯片电极5上的Au球8。第二Au线6连接互连4和球焊接在中间半导体芯片12上的芯片电极5上的Au球8。第三Au线6连接互连4和球焊接在顶部半导体芯片13上的芯片电极5上的Au球8。
除了以上描述的部分，该第三实施例与第二实施例有相同的构造，且该第三实施例有与第二实施例的优点等同的优点。在该第三实施例中，三个半导体芯片11、12、13堆叠在岛2上，然而堆叠半导体的数量不限于三个。可以采用同样的方法，堆叠两个或超过三个半导体。
图11描述了本发明的第四实施例，其中三个半导体并列位于岛2上，即半导体14以多芯片结构排列。第一Au线6连接互连4上的底部Au球8和左侧半导体芯片14上的芯片电极5。第二Au线6连接互连4上的中间Au球8和中间半导体芯片14上的芯片电极5。第三Au线6连接互连4上的顶部Au球8和右侧半导体芯片14上的芯片电极5。
第四实施例的构造基本与第二实施例的相同，并且其优点也等同于第二实施例的优点。在第四实施例中，三个半导体芯片14并列排列在岛2上，然而，当然也可以是两个或超过三个半导体芯片并列排列在岛2上。
图12描述了本发明的第五实施例，其中三个半导体芯片11、12、13以与第三实施例中相同的方式堆叠在岛2上。在这个实施例中，两个Au球8堆叠在位于底部半导体芯片11的上表面上的芯片电极5上，并且没有被中间半导体芯片12所覆盖。类似，三个Au球8堆叠在位于中间半导体芯片12的上表面上的芯片电极5上并且没有被顶部半导体芯片13所覆盖。
此处，第一Au线6球焊接在互连4上，并楔形焊接在球焊接在位于底部半导体芯片11上的芯片电极5上的Au球8上，以在其间连接。第二Au线6球焊接在其上楔形焊接了第一Au线6的Au球8上，并且楔形焊接在球焊接在中间半导体芯片12上的芯片电极5上的Au球8上，以在其间连接。第三Au线6球焊接在其上楔形焊接了第二Au线6的Au球8上，并且楔形焊接在球焊接在顶部半导体12的芯片电极5上的Au球8上，以在其间连接。
第五实施例的构造基本上与第三实施例的相同，并且其优点等同于第三实施例的优点。尤其是，第五实施例具有更进一步的优点，即由于包含一种结构：在底部半导体芯片11的芯片电极5上堆叠两个Au球8，以及在中间半导体芯片12的芯片电极5上堆叠三个Au球8，可以防止由Au线6与半导体芯片11、12、13的边缘接触所产生的半导体器件故障。因此，第五实施例有助于提高在半导体芯片11、12、13上排列芯片电极5时的设计灵活性。
图13描述了本发明的第六实施例，该实施例包含左、右半导体3和位于这两个半导体3之间的互连。半导体3分别位于岛2上。底部和顶部Au球8堆叠在互连4上。左、右半导体芯片3中的每一个上都有三个芯片电极5。三根Au线6中的每一根逐一球焊接在左边半导体芯片3的每个芯片电极5上。这三根Au线的另一端楔形焊接在球焊接在互联4上的底部Au球8上。一个Au球8球键合在其上楔形焊接了第一Au线的Au球8上。另外三根Au线6逐一球焊接在右边半导体芯片3的芯片电极5上，并楔形焊接在球焊接在顶部Au球8的Au球8上。
除了以上描述的部分，第六实施例的构造基本上与第四实施例的相同，且其优点等同于第四实施例的优点。尤其是，第六实施例具有进一步的优点：通过楔形焊接三根Au线6于球焊接在互联4上的Au球8上，使互连4的尺寸小。
第六实施例具有在互连4上堆叠两个Au球8的构造，然而，堆叠在互连4上的Au球数量当然不限于一种特例。例如：其上楔形焊接了每根Au线6的六个Au球8可堆叠在互连4上。
图14描述了本发明的第七实施例，其中两个半导体芯片3位于岛2的两侧。具体是，两个半导体芯片3位于岛2的上、下表面，三个Au球8分别堆叠在互连4的上、下表面上。三根Au线6中的每根逐一楔形焊接在互联4的上表面上的三个Au球8上。这三根Au线中的每一根的另一端逐一球焊接在三个芯片电极5上，该三个芯片电极5位于岛2上表面上的半导体芯片3上。另外三根Au线6采用同样的方式连接岛2下表面上的半导体芯片3的三个芯片电极5和互连4下表面上的三个Au球8。
除了以上描述的部分，第七实施例的构造基本上与第四实施例的相同，并且其优点等同于第四实施例的优点。尤其是，该第七实施例具有更进一步的优点：通过在岛2的上下两个表面上放置两个半导体芯片3，有利于缩小岛2和互连4。
本发明的描述实质上仅仅是示例性的，因此，不脱离本发明本质的变化被认为在本发明的范围之内。这种改变不被认为脱离本发明的实质和范围。

Claims (9)

1.一种引线键合方法，用于键合多根导线(6)以连接第一导体(4，5，6)和第二导体(4，5，6)，该键合方法包括步骤：
将第一导电球(8)焊接在第一个第一导体(4或5)上；
将第一导线(6)焊接在第一导电球(8)上，该第一导线(6)与第一个第二导体(5或4)相连接；
将第二导电球(8)焊接在第二个第一导体(6或(4或5))上；以及
将第二导线(6)焊接在第二个导电球上，该第二导线(6)连接到第二个第二导体((4或5)或6)，
其中该第二个第一导体(6或(4或5))或该第二个第二导体((4或5)或6)是焊接在第一导电球(8)上的第一导线(6)。
2.根据权利要求1的引线键合方法，还包括从第三次重复步骤开始的至少一个第K次重复步骤，该第K次重复步骤包括：
将第K个导电球(8)焊接在第K个第一导体(6或(4或5))上；以及
将第K根导线(6)焊接在第K个导电球(8)上，该第K根导线(6)连接到第K个第二导体((4或5)或6)，
其中该第K个第一导体(6或(4或5))或该第K个第二导体((4或5)或6)是焊接在第(K-1)个导电球(8)上的第(K-1)根导线(6)。
3.根据权利要求2的引线键合方法，其中每个第K个第一导体(6)都是焊接在第(K-1)个导电球(8)上的第(K-1)根导线(6)。
4.根据权利要求1或2的引线健合方法，其中
导电球(8)一个位于另一个之上，大致排列成一条垂直线。
5.根据权利要求1或2的引线健合方法，其中
每个导电球(8)的形状近似为顶端向上的圆锥形。
6.根据权利要求1或2的引线健合方法，其中
第一导体(4，5)和第二导体(4，5)包括形成为块体的导体。
7.根据权利要求1或2的引线健合方法，其中
第一导体(4，5，6)和第二导体(4，5，6)包括：
位于半导体器件(1)内的半导体芯片(3，11，12，13)的芯片电极(5)；和
半导体器件(1)的互连(4)。
8.一种半导体器件(1)，包括：
至少一个半导体芯片(3，11，12，13)，其具有芯片电极(5)；
第一导体(4，5，6)和第二导体(4，5，6)，包括芯片电极(5)和互连(4)；
第一导电球(8)，焊接在第一个第一导体(4或5)上；
第一导线(6)，连接到第一个第二导体(5或4)并焊接在第一导电球(8)上；
第二导电球(8)，焊接在第二个第一导体(6或(4或5))上；和
第二导线(6)，连接到第二个第二导体((4或5)或6)并焊接在第二导电球(8)上。
其中该第二个第一导体(6或(4或5))或该第二个第二导体((4或5)或6)是焊接在第一导电球(8)上的第一导线(6)。
9.根据权利要求8的半导体器件(1)，其中：
所述至少一个半导体芯片(11，12，13)包括第一半导体芯片(11或12)和第二半导体芯片(12或13)；并且
第二半导体芯片(12或13)位于第一半导体芯片(11或12)上以便暴露第一半导体芯片(11或12)的芯片电极(5)。
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WO2012055085A1 (zh) * 2010-10-26 2012-05-03 上海嘉塘电子有限公司 一种芯片与芯片、芯片与金属框架间的引线键合方法
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CN105845655B (zh) * 2016-03-24 2018-05-04 中国电子科技集团公司第二十九研究所 微焊盘上叠加进行球形焊接的方法及微焊盘叠加键合结构
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DE102005011429A1 (de) 2005-10-06

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