CN1670945A - 制造高性能铜叠层感应器的方法 - Google Patents

制造高性能铜叠层感应器的方法 Download PDF

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CN1670945A
CN1670945A CNA2005100026394A CN200510002639A CN1670945A CN 1670945 A CN1670945 A CN 1670945A CN A2005100026394 A CNA2005100026394 A CN A2005100026394A CN 200510002639 A CN200510002639 A CN 200510002639A CN 1670945 A CN1670945 A CN 1670945A
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deposition
layer
inductor
metal
resist
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CN100370598C (zh
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J·P·甘比诺
W·T·莫特西夫
E·G·沃尔顿
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Core Usa Second LLC
GlobalFoundries Inc
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Abstract

本发明提供了高性能铜感应器的集成，其中在最后的金属级和最后的金属+1级上形成高的Cu叠层螺旋感应器，金属级通过具有与在最后的金属级和最后的金属+1级上的螺旋金属感应器相同的螺旋形状的条形过孔互连。本发明提供了用于集成厚感应器的形成与接合焊盘、端子和具有最后的金属+1布线的互连布线的形成的方法。本发明使用介质沉积、隔离物形成、和/或选择沉积诸如CoWP的钝化金属以钝化在最后的金属层之后形成的Cu感应器。

Description

制造高性能铜叠层感应器的方法
技术领域
本发明通常涉及高性能铜(Cu)感应器与接合焊盘的集成，更为具体地涉及高性能铜感应器与全局互连以及Al接合焊盘或Cu接合焊盘的集成，其中用于感应器和全局互连的铜由芯片钝化层上的抗蚀剂图形来限定。另外，通过重叠相邻的布线层或级以形成叠层感应器，来制造感应器，金属级通过条形过孔来互连。
背景技术
铜感应器正逐渐地应用于RF集成电路中。通过最大化Cu的厚度来最大化Cu感应器的性能。通过在抗蚀剂掩膜内侧镀一层厚的Cu层(＞5μm)来实现该目的。
不幸的是，很难钝化厚的Cu感应器，其中钝化层用作扩散阻挡层以保护Cu不被腐蚀。如果在最后的金属级(即在芯片钝化层之前的最后的金属层)下形成Cu感应器，则随后的金属级的平面化很难和/或昂贵。如果在最后的金属级处或之上形成Cu感应器，则Cu的钝化很难。通常，利用通过化学气相沉积(CVD)沉积的Si3N4和SiO2层来钝化最后的金属层，以阻止污染物扩散到芯片中的晶体管和布线中。然而，CVD膜的保形性不足以钝化厚的Cu感应器。此外，用于形成感应器和感应器钝化的工艺不应损坏接合焊盘。
发明内容
本发明提供了高性能铜感应器与全局互连以及与Al接合焊盘或Cu焊盘的集成，其中用于感应器和全局互连的Cu由芯片钝化层上的抗蚀剂图形限定。另外，通过在利用下层金属布线层或级的钝化层上重叠金属层以形成叠层感应器，来制造感应器，金属级通过条形过孔来互连，该条形过孔具有与在感应器叠层中的每一个金属级上的螺旋金属感应器相同的螺旋形状。
本发明提供了一种用于与芯片钝化层分开地钝化厚Cu感应器的方法。此外，本发明提供了用于利用芯片钝化层上的金属层将厚感应器与接合焊盘、端子和互连布线集成的方法。
本发明使用介质沉积、隔离物形成、和或选择沉积诸如CoWP的钝化金属以钝化在最后的金属层之后形成的Cu感应器。此外，该工艺结合了接合焊盘、端子和互连布线的形成。
本发明的优点是包括：
能够利用最少的附加工艺来使用高性能Cu感应器；
在最后的金属层之后形成的Cu感应器上形成钝化层；
用于感应器的Cu还可以用作最后的金属+1布线层或用于凸起的接合焊盘以及互连布线；
工艺与凸起的Al接合焊盘或凹陷的Cu接合焊盘兼容。
附图说明
本领域的技术人员参考下述本发明的几个实施例结合附图的详细说明，会更加容易地理解用于高性能铜感应器与接合焊盘集成的本发明的前述目的和优点，其中，贯穿几幅附图，相同的元件由相同的参考标记来表示，其中：
图1示出用于具有凸起的Al接合焊盘的螺旋Cu感应器的本发明的第一实施例的顶视图；
图1a-1h示出用于制造具有凸起的Al接合焊盘的螺旋Cu感应器的本发明的第一实施例的顺序步骤a-h；
图1a示出在利用常规工艺步骤在FSG介质中形成最后的金属层镶嵌Cu互连之后的结构；
图1b示出在沉积两层Si3N4和一层SiO2钝化中间层之后的结构；
图1c示出在通过光刻和RIE构图端子过孔之后的结构；
图1d示出在通过PVD或CVD沉积多层用于接合焊盘的金属层、通过CVD沉积Si3N4层、通过光刻和RIE构图、并通过PVD沉积Cu籽晶层之后的结构；
图1e示出在沉积并构图用于Cu感应器的抗蚀剂以及沉积Cu之后的结构；
图1f示出在剥离抗蚀剂、蚀刻Cu籽晶层和TaN并在Cu感应器上选择地沉积CoWP之后的结构；
图1g示出在利用聚酰亚胺涂敷衬底并形成到接合焊盘的开口之后的结构；
图1h示出在蚀刻接合焊盘上的SiN层、沉积BLM阻挡层并形成C4焊料球之后的结构；
图2示出用于除具有凹陷的Cu接合焊盘之外与图1的螺旋Cu感应器相似的螺旋Cu感应器的本发明的第二实施例的顶视图；
图2d示出在通过PVD沉积TaN并通过PVD沉积Cu籽晶层之后的结构；
图2e示出在沉积并构图用于Cu感应器的抗蚀剂、以及通过电镀沉积Cu以选择地在感应器区中形成Cu之后的结构；
图2f示出在剥离抗蚀剂、蚀刻Cu籽晶层和TaN阻挡层并利用无电镀沉积选择地沉积Cu感应器和端子上的CoWP之后的结构；
图2g示出在利用聚酰亚胺涂敷衬底并形成到接合焊盘的过孔开口之后的结构；
图2h示出在沉积阻挡层冶金BLM并形成C4焊料球之后的结构；
图3示出用于具有凸起的Cu接合焊盘的螺旋Cu感应器的本发明的第三实施例的顶视图；
图3e示出在沉积并构图用于凸起的接合焊盘、Cu感应器和互连布线的抗蚀剂、并通过电镀沉积Cu之后的结构；
图3f示出在剥离抗蚀剂、蚀刻TaN阻挡层并利用无电镀沉积在Cu感应器、端子和互连布线上选择地沉积CoWP之后的结构；
图3g示出在利用聚酰亚胺涂敷衬底并形成到接合焊盘的过孔开口之后的结构；
图3h示出在蚀刻SiN、沉积阻挡层冶金BLM并形成C4焊料球之后的结构；
图4a-4c、5a-5e和6a-6e分别示出用于构图Cu的第一(1)、第二(2)和第三(3)选择。
图4a-4c示出其中在抗蚀剂之前沉积籽晶层随后选择沉积Cu的选择1；
图4a示出在端子过孔蚀刻之后，通过采用PVD沉积TaN阻挡层并采用PVD沉积Cu籽晶层来形成的结构；
图4b示出通过沉积并构图用于感应器、端子和互连的抗蚀剂，并采用电镀沉积Cu以在感应器、端子和互连区中选择地形成Cu来形成的结构；
图4c示出在剥离抗蚀剂并蚀刻Cu籽晶层和阻挡层之后的结构；
图5a-5e示出其中在抗蚀剂之后沉积Cu籽晶层随后覆盖沉积Cu并CMP的选择2；
图5a示出在端子过孔蚀刻后，通过采用PVD沉积TaN阻挡层来形成的结构；
图5b示出在沉积并构图用于感应器、端子和互连的抗蚀剂，并通过PVD沉积Cu籽晶层之后形成的结构；
图5c示出在通过电镀沉积Cu之后的结构；
图5d示出在通过CMP或电抛光除去过量Cu之后的结构；
图5e示出在剥离抗蚀剂并蚀刻之后的结构；
图6a-6e示出用于构图Cu的选择3，其中在抗蚀剂和覆盖沉积Ta和Cu之后沉积阻挡层和籽晶层，随后CMP或蚀刻；
图6a示出在端子过孔构图之后形成的结构；
图6b示出在沉积和构图用于感应器、端子和互连的抗蚀剂，沉积Ta粘合层、通过PVD沉积Cu籽晶层之后形成的结构；
图6c示出在通过电镀沉积Cu以未掩蔽的区域中选择地形成Cu之后的结构；
图6d示出在通过CMP或电抛光除去过量Cu并通过CMP或湿蚀刻除去TaN粘合层之后的结构；
图6e示出在剥离抗蚀剂并蚀刻TaN之后的结构；
图7a-7d示出用于钝化的选择；
图7a示出仅通过选择金属的钝化；
图7b示出仅通过介质沉积的钝化；
图7c示出通过选择金属和介质沉积的钝化，这是图7a和7b的结合；
图7d示出通过隔离物(金属或绝缘体)和介质沉积的钝化；
图7e示出通过隔离物(金属或绝缘体)、选择金属以及介质沉积的钝化；
图7f示出通过选择金属、隔离物(金属或绝缘体)以及介质沉积的钝化。
具体实施方式
图1示出用于螺旋Cu感应器10的本发明的第一实施例的顶视图，该感应器10具有Al(铝)接合焊盘12、连接到螺旋Cu感应器外端的Cu布线端子14和连接到螺旋Cu感应器内端的Cu布线端子16。
图1的实施例提供高性能铜感应器与接合焊盘的集成，其中高的、最后的金属层Cu感应器与Al接合焊盘集成。而且，可以通过重叠并连接在最后的金属和最后的金属+1处的相邻布线层来制造高的Cu感应器，其中金属级由具有与金属感应器相同形状的条形过孔来互连。
图1a-1h示出用于制造如图1所示的具有Al接合焊盘的螺旋Cu感应器的本发明的第一实施例的顺序步骤a-h。
图1a示出经过如下步骤之后的结构：采用介质FSG(氟硅酸盐玻璃)沉积、沟槽18构图、可以为TaN或TiN的衬里20沉积、Cu沉积和CMP(化学机械抛光)的常规工艺步骤在FSG介质中形成最后的金属层镶嵌Cu互连。最后的金属层传统上认为是接合焊盘层下面的最后的金属层，且本文中保持该术语。
图1b示出在通过CVD(化学气相沉积)沉积两层Si3N4(图中以SiN示出)和一层SiO2钝化中间层之后的结构，其中三层中的每一层为10至500nm，优选为200nm。
图1c示出在通过光刻和RIE(采用F基蚀刻的反应离子蚀刻)构图端子过孔之后的结构。在本发明中，利用芯片钝化层上的厚Cu层、或通过利用具有与螺旋金属感应器相同的螺旋形状的中间金属条形过孔互连该层与下层布线层，来制造高的Cu螺旋感应器，该条形过孔示作在形成部分螺旋感应器10的一个螺旋条形过孔的一部分的剖视图中的中间过孔11和右过孔13。
图1d示出经过如下步骤之后的结构：通过PVD(物理气相沉积)或CVD沉积用于接合焊盘的多层金属层，即从底部到顶部的四层连续层TaN/TiN/Al/TiN，其中TaN和TiN为10至50nm，优选为50nm，Al为500至2000nm，优选为1000nm；通过CVD沉积20至100nm，优选为50nm的Si3N4；通过光刻和RIE(F-基和Cl-基蚀刻)构图SiN、TiN、Al；通过PVD沉积20至500nm，优选为200nm的Cu籽晶层30。
图1e示出经过如下步骤之后的结构：沉积和构图用于Cu感应器10的抗蚀剂22，抗蚀剂厚度＝1至50μm；通过电镀沉积1至50μm，优选为10μm的Cu以在感应器区中选择地形成Cu。
图1f示出经过如下步骤之后的结构：利用有机溶剂或低温(＜100℃，优选80℃)低功率O2等离子体剥离抗蚀剂；通过溅射蚀刻来蚀刻Cu籽晶层(如下述选择1或2或3)；通过RIE(F-基)蚀刻TaN；利用无电镀沉积在Cu感应器上选择地沉积10至50nm，优选20nm的CoWP(优选为92％的Co，2％W，6％P)；通过CVD可选地沉积附加的SiN钝化层(可选地，参见图7a-7f)。
图1g示出经过如下步骤之后的结构：用聚酰亚胺24(1至50μm，优选5μm)涂敷衬底；形成到接合焊盘的开口。
图1h示出经过如下步骤之后的结构：蚀刻接合焊盘上的SiN层；沉积诸如50至500nm，优选100nm的TiW的BLM(阻挡层冶金)，并形成C4焊料球。完成的高的Cu螺旋感应器10包括钝化层17上的Cu层，其中Cu过孔形成到最后的Cu金属级15中的下层Cu布线的连接。在不同的实施例中，高的Cu螺旋感应器10包括钝化层17上的Cu层，该Cu层与诸如最后的Cu金属级15的下层螺旋Cu布线层互连并重叠，并与被互连并重叠以形成高的叠层螺旋Cu感应器10的中间螺旋Cu条形过孔19连接，该感应器10还具有Al接合焊盘。
图2示出用于螺旋Cu感应器的本发明的第二实施例的顶视图，该感应器除具有Cu(铜)接合焊盘之外与图1的螺旋Cu感应器相似。
用于制造本发明第二实施例的顺序步骤a-c和e-h基本上与用于制造第一实施例的步骤a-c和e-h相同。而且，第二实施例的步骤a-c全部在图1a-1c中示出，因此不再重复步骤a-c的描述，参考图2d-2h给出步骤d-h的描述。
另外，上面规定的用于不同的特定层和特定材料的厚度和优选厚度的参数、合金的示例性成分、材料的实例以及诸如温度的其它特定参数同样适用于下面描述的实施例，因此在下述说明中不再重复。
参考图1a-1c说明并阐释制造第二实施例的步骤a-c，因此第二实施例的阐释起始于图2d中示出的步骤d。
图2d示出经过如下步骤之后的结构：通过PVD沉积TaN阻挡层；通过PVD沉积Cu籽晶层。
图2e示出经过如下步骤之后的结构：沉积并构图用于Cu感应器42的抗蚀剂40；通过电镀沉积Cu以选择地在感应区42中形成Cu。
图2f示出经过如下步骤之后的结构：利用有机溶剂或低温低功率O2等离子体剥离抗蚀剂；通过溅射蚀刻来蚀刻Cu籽晶层(下面参考图4-6阐释的选择1或2或3)；通过RIE(F-基)蚀刻TaN；利用无电镀沉积在Cu感应器和端子上选择地沉积CoWP；通过CVD可选地沉积附加的SiN钝化层(参见图7a-7f)。
可以采用下述选择1和2来代替CoWP覆盖层。选择1和2适用于本文中采用CoWP覆盖层的所有实施例。
选择1：通过选择的无电镀沉积其它材料，即NiMoP、NiMoB、NiReP、NiWP来代替使用CoWP。
选择2：使用选择的化学气相沉积(CVD)代替选择的无电镀来在Cu上沉积钝化层，优选材料为W。其它选择为Mo或Ru。因此可以使用选择的CVDW来代替CoWP。工艺顺序相同。
图2g示出经过如下步骤之后的结构：使用聚酰亚胺44涂敷衬底，形成到接合焊盘的开口46。
图2h示出经过如下步骤之后的结构：沉积阻挡层冶金BLM(阻挡层冶金)，并形成C4焊料球。
图3示出用于具有凸起的Cu(铜)接合焊盘50的螺旋Cu感应器的本发明的第三实施例的顶视图，如图3h。
第三实施例仍示例性说明可以包括用于交叉芯片布线的全局互连的互连布线52。该互连布线也在第一和第二实施例中示出并且同样适用于第一和第二实施例。
用于制造本发明第三实施例的顺序步骤a-d和f-h基本上与用于制造第二实施例的步骤a-d和f-h相同。而且，第二实施例的步骤a-d全部在图1a-1c和2d中示出，因此不再重复步骤a-d的描述，并参考图3e-3h给出步骤e-h的描述。
图3e示出经过如下步骤之后的结构：沉积并构图用于凸起的接合焊盘50、Cu感应器56和互连布线58的抗蚀剂54；通过电镀沉积Cu，选择地构图在未掩蔽的区域中的Cu(如下述选择1或2或3)。
图3f示出经过如下步骤之后的结构：利用有机溶剂或低温低功率O2等离子体剥离抗蚀剂；通过溅射蚀刻来蚀刻Cu籽晶层(如下述选择1或2或3)；通过RIE(F-基)蚀刻TaN；利用无电镀沉积在Cu感应器、端子和互连布线上选择地沉积CoWP；通过CVD可选地沉积附加的SiN钝化层(参见图7a-7f)。
图3g示出经过如下步骤之后的结构：使用聚酰亚胺60涂敷衬底；形成到接合焊盘的开口62。
图3h示出经过如下步骤之后的结构：蚀刻SiN，沉积BLM(阻挡层冶金)，并形成C4焊料球。
图4、5和6示出用于构图Cu的各自的第一(1)、第二(2)和第三(3)选择。
图4a-4c示出其中在抗蚀剂之前沉积籽晶层随后选择地沉积Cu的选择1。
图4a示出在端子过孔蚀刻之后，通过如下步骤形成的结构：利用PVD沉积10至100nm(不同于图1d？)，优选50nm的TaN(或Ta阻挡层)，利用PVD沉积Cu籽晶层。
图4b示出通过如下步骤形成的结构：沉积和构图用于感应器、端子和互连的抗蚀剂70；利用电镀沉积Cu；选择地在感应器、端子和互连区中形成Cu。
图4c示出经过如下步骤之后的结构：利用有机溶剂或低温低功率O2等离子体剥离抗蚀剂；通过溅射蚀刻来蚀刻Cu籽晶层；通过RIE(F-基)蚀刻TaN。
图5a-5e示出其中在抗蚀剂之后沉积Cu籽晶层随后覆盖沉积Cu并CMP的选择2。
图5a示出在端子过孔蚀刻之后，通过利用PVD沉积10-100nm优选50nm的TaN(或Ta)阻挡层形成的结构。
图5b示出通过如下步骤形成的结构：构图用于感应器、端子和互连的抗蚀剂；选择地沉积5至50nm优选20nm的Ta粘合层；通过PVD沉积Cu籽晶层。
图5c示出在通过电镀沉积Cu之后的结构。
图5d示出经过如下步骤之后的结构：通过CMP或电抛光除去过量的Cu；如果沉积Ta粘合层，则通过CMP(需要低压、无研磨剂的CMP以避免损坏抗蚀剂)或湿蚀刻或干蚀刻除去Ta粘合层。
图5e示出经过如下步骤之后的结构：利用有机溶剂或低温低功率O2等离子体剥离抗蚀剂；通过RIE(F-基)蚀刻TaN。
图6a-6e示出其中在抗蚀剂和覆盖沉积Ta和Cu之后沉积阻挡层和籽晶层，随后进行CMP或蚀刻的选择3。
图6a示出在端子过孔构图之后形成的结构。
图6b示出通过如下步骤形成的结构：沉积和构图用于感应器、端子和互连的抗蚀剂，抗蚀剂厚度为1-20μm；沉积5至50nm优选20nm的TaN粘合层；通过PVD沉积20至500nm优选200nm的Cu籽晶层。
图6c示出经过如下步骤之后的结构：通过电镀沉积Cu、选择地在未掩蔽的区域中形成Cu。
图6d示出经过如下步骤之后的结构：通过CMP或电抛光除去过量的Cu；通过CMP或湿蚀刻(需要低压、无研磨剂的CMP以避免损坏抗蚀剂)除去TaN粘合层。
图6e示出经过如下步骤之后的结构：利用有机溶剂或低温低功率O2等离子体剥离抗蚀剂；通过RIE(F-基)蚀刻TaN。
图7a-7d示出用于钝化的选择。
图7a示出在Cu构图和阻挡层蚀刻、通过无电镀沉积来沉积诸如CoWP(10至100nm)的选择钝化金属之后，仅通过选择金属的钝化。
图7b示出在Cu构图和阻挡层蚀刻、通过CVD来沉积单层介质(100至500nm的Si3N4)或多层介质(Si3N4/SiO2/Si3N4)之后，仅通过介质沉积的钝化。
图7c示出通过选择金属和介质沉积的钝化，这是图7a和7b的结合。
图7d示出经过如下步骤之后通过隔离物和介质沉积的钝化：在Cu构图之后而在阻挡层蚀刻之前，通过CVD沉积钝化金属或介质(10至200nm)；通过RIE回蚀刻以形成隔离物，并蚀刻阻挡层(注意隔离物可以在阻挡层蚀刻之后形成)；沉积单层或多层介质。
图7e示出通过隔离物和选择金属以及介质沉积的钝化，除在隔离物蚀刻之后在Cu顶部上沉积选择金属之外，与图7d相似。
图7f示出通过选择金属和隔离物以及介质沉积的钝化，除在隔离物蚀刻之前在Cu上沉积选择金属之外，与图7d相似。
虽然本文详细描述了用于高性能铜感应器与接合焊盘的集成的本发明的几个实施例和变化，但是显而易见地，本发明的公开和教导会对本领域普通技术人员建议许多可选的设计。

Claims (18)

1、一种制造高性能铜(Cu)叠层感应器的方法，包括：
在最后的金属级上形成Cu叠层感应器的最后的金属Cu级，所述最后的金属级限定为接合焊盘级下的最后的金属级；
在所述Cu叠层感应器的最后的金属Cu级上形成并重叠所述Cu叠层感应器的条形过孔；
在所述条形过孔和所述最后的金属Cu级上的最后的金属+1级上形成并重叠所述Cu叠层感应器的最后的金属+1Cu级，以形成所述Cu叠层感应器。
2、权利要求1的方法，还包括在所述Cu叠层感应器的最后的金属+1Cu级上形成钝化层。
3、权利要求2的方法，还包括在所述Cu叠层感应器的最后的金属+1Cu级上形成CoWP的钝化层。
4、权利要求1的方法，为了形成具有铝接合焊盘的Cu感应器，还包括以下步骤：
a、在介质中形成最后的金属层镶嵌Cu互连；
b、在所述最后的金属层镶嵌Cu互连上沉积一层或多层钝化材料层；
c、在所述一层或多层钝化材料层中构图端子过孔；
d、沉积用于接合焊盘和阻挡层的金属，构图用于接合焊盘和阻挡层的金属，并沉积Cu籽晶层；
e、沉积并构图用于Cu感应器的抗蚀剂，并沉积Cu以选择地在感应区中形成Cu；
f、剥离所述抗蚀剂，蚀刻所述Cu籽晶层，并选择地在Cu感应器上沉积钝化层。
5、权利要求4的方法，还包括以下步骤：
g、在步骤f之后，用聚酰亚胺涂敷步骤f的结构，并形成到接合焊盘的开口；
h、沉积阻挡层冶金，并形成焊料球。
6、权利要求1的方法，为了形成具有Cu接合焊盘的Cu感应器，还包括以下步骤：
a、在介质中形成最后的金属层镶嵌Cu互连；
b、在所述最后的金属层镶嵌Cu互连上沉积一层或多层钝化材料层；
c、在所述一层或多层钝化材料层中构图端子过孔；
d、沉积阻挡层和Cu籽晶层；
e、沉积和构图用于Cu感应器的抗蚀剂，并沉积Cu以选择地在感应区中形成Cu；
f、剥离所述抗蚀剂，蚀刻所述Cu籽晶层，并选择地在Cu感应器和端子上沉积钝化层。
7、权利要求6的方法，还包括以下步骤：
g、在步骤f之后，用聚酰亚胺涂敷步骤f的结构，并形成到接合焊盘的开口；
h、沉积阻挡层冶金，并形成焊料球。
8、权利要求1的方法，为了形成具有凸起的Cu接合焊盘的Cu感应器，还包括以下步骤：
a、在介质中形成最后的金属层镶嵌Cu互连；
b、在所述最后的金属层镶嵌Cu互连上沉积一层或多层钝化材料层；
c、在所述一层或多层钝化材料层中构图端子过孔；
d、沉积阻挡层和Cu籽晶层；
e、沉积和构图用于Cu感应器、端子和互连布线的抗蚀剂，并沉积Cu以选择地在未掩蔽的区中形成Cu；
f、剥离所述抗蚀剂，蚀刻所述Cu籽晶层，并选择地在Cu感应器、端子和互连布线上沉积钝化层。
9、权利要求8的方法，还包括以下步骤：
g、在步骤f之后，用聚酰亚胺涂敷步骤f的结构，并形成到接合焊盘的开口；
h、沉积阻挡层冶金，并形成焊料球。
10、权利要求1的方法，还包括在沉积和构图抗蚀剂之前沉积Cu籽晶层，随后选择地沉积Cu，包括：
a、在端子过孔蚀刻之后，沉积阻挡层，并沉积所述Cu籽晶层；
b、沉积并构图用于感应器、端子和互连的抗蚀剂，并通过电镀沉积Cu以选择地在感应器、端子和互连区中形成Cu；
c、剥离所述抗蚀剂并蚀刻所述Cu籽晶层和所述阻挡层。
11、权利要求1的方法，还包括在沉积和构图抗蚀剂之后沉积Cu籽晶层，随后覆盖沉积Cu并化学机械抛光，包括：
a、在端子过孔蚀刻之后，沉积阻挡层；
b、沉积并构图用于感应器、端子和互连的抗蚀剂，并沉积Cu籽晶层；
c、沉积Cu；
d、除去过量的Cu；
e、剥离所述抗蚀剂并蚀刻所述阻挡层。
12、权利要求1的方法，还包括在沉积和构图抗蚀剂之后沉积阻挡层和Cu籽晶层，随后覆盖沉积阻挡层和Cu并进行化学机械抛光，包括：
a、在端子过孔蚀刻之后；
b、沉积并构图用于感应器、端子和互连的抗蚀剂，沉积阻挡粘合层，并沉积Cu籽晶层；
c、沉积Cu；
d、除去过量的Cu，除去所述阻挡粘合层；
e、剥离所述抗蚀剂并蚀刻所述阻挡层。
13、权利要求1的方法，还包括选择地沉积钝化金属。
14、权利要求1的方法，还包括选择地沉积钝化介质。
15、权利要求1的方法，还包括选择地沉积钝化金属和钝化介质。
16、权利要求1的方法，还包括选择地沉积钝化金属或钝化介质，回蚀刻以形成隔离物，沉积介质层。
17、权利要求1的方法，还包括选择地沉积钝化金属或钝化介质，回蚀刻以形成隔离物，沉积Cu上的选择金属。
18、权利要求1的方法，还包括选择地沉积钝化金属或钝化介质，沉积Cu上的选择金属，回蚀刻以形成隔离物，沉积介质层。
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