CN1890784A - 应变半导体衬底及其制法 - Google Patents
应变半导体衬底及其制法 Download PDFInfo
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- CN1890784A CN1890784A CNA2004800358158A CN200480035815A CN1890784A CN 1890784 A CN1890784 A CN 1890784A CN A2004800358158 A CNA2004800358158 A CN A2004800358158A CN 200480035815 A CN200480035815 A CN 200480035815A CN 1890784 A CN1890784 A CN 1890784A
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- 239000000758 substrate Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims description 30
- 239000004065 semiconductor Substances 0.000 title claims description 19
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 24
- 239000010703 silicon Substances 0.000 claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 claims abstract description 5
- 239000000463 material Substances 0.000 claims description 43
- 230000006835 compression Effects 0.000 claims description 20
- 238000007906 compression Methods 0.000 claims description 20
- 230000004888 barrier function Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 150000004767 nitrides Chemical class 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 21
- 239000012212 insulator Substances 0.000 abstract description 2
- 229910052732 germanium Inorganic materials 0.000 description 15
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 15
- 235000012431 wafers Nutrition 0.000 description 11
- 229910052581 Si3N4 Inorganic materials 0.000 description 10
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 10
- 238000000151 deposition Methods 0.000 description 8
- 230000008021 deposition Effects 0.000 description 8
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 6
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000013022 venting Methods 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 4
- 229910000078 germane Inorganic materials 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 150000003376 silicon Chemical class 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
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- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 1
- 238000010943 off-gassing Methods 0.000 description 1
- 238000002560 therapeutic procedure Methods 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7842—Field effect transistors with field effect produced by an insulated gate means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
Abstract
Description
Claims (10)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/729,479 | 2003-12-05 | ||
US10/729,479 US7144818B2 (en) | 2003-12-05 | 2003-12-05 | Semiconductor substrate and processes therefor |
PCT/US2004/035417 WO2005062357A1 (en) | 2003-12-05 | 2004-10-26 | Strained semiconductor substrate and processes therefor |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1890784A true CN1890784A (zh) | 2007-01-03 |
CN1890784B CN1890784B (zh) | 2013-04-24 |
Family
ID=34633951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2004800358158A Expired - Fee Related CN1890784B (zh) | 2003-12-05 | 2004-10-26 | 应变半导体衬底及其制法 |
Country Status (7)
Country | Link |
---|---|
US (2) | US7144818B2 (zh) |
EP (1) | EP1690288A1 (zh) |
JP (1) | JP2007513517A (zh) |
KR (1) | KR101086896B1 (zh) |
CN (1) | CN1890784B (zh) |
TW (1) | TWI369737B (zh) |
WO (1) | WO2005062357A1 (zh) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070063185A1 (en) * | 2003-06-26 | 2007-03-22 | Rj Mears, Llc | Semiconductor device including a front side strained superlattice layer and a back side stress layer |
US7531828B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions |
US7612366B2 (en) * | 2003-06-26 | 2009-11-03 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice layer above a stress layer |
US20070015344A1 (en) * | 2003-06-26 | 2007-01-18 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Between at Least One Pair of Spaced Apart Stress Regions |
US7598515B2 (en) * | 2003-06-26 | 2009-10-06 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice and overlying stress layer and related methods |
US20070020833A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer |
US20070063186A1 (en) * | 2003-06-26 | 2007-03-22 | Rj Mears, Llc | Method for making a semiconductor device including a front side strained superlattice layer and a back side stress layer |
US20070010040A1 (en) * | 2003-06-26 | 2007-01-11 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer |
US20070020860A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods |
US7144818B2 (en) * | 2003-12-05 | 2006-12-05 | Advanced Micro Devices, Inc. | Semiconductor substrate and processes therefor |
CA2612118A1 (en) * | 2005-07-15 | 2007-01-25 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice layer above a stress layer and associated methods |
DE102006007293B4 (de) | 2006-01-31 | 2023-04-06 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zum Herstellen eines Quasi-Substratwafers und ein unter Verwendung eines solchen Quasi-Substratwafers hergestellter Halbleiterkörper |
JP5055846B2 (ja) * | 2006-06-09 | 2012-10-24 | ソニー株式会社 | 半導体装置およびその製造方法 |
US8912646B2 (en) | 2009-07-15 | 2014-12-16 | Silanna Semiconductor U.S.A., Inc. | Integrated circuit assembly and method of making |
US9390974B2 (en) | 2012-12-21 | 2016-07-12 | Qualcomm Incorporated | Back-to-back stacked integrated circuit assembly and method of making |
TWI619235B (zh) * | 2009-07-15 | 2018-03-21 | 高通公司 | 具背側散熱能力之絕緣體上半導體結構 |
US9466719B2 (en) | 2009-07-15 | 2016-10-11 | Qualcomm Incorporated | Semiconductor-on-insulator with back side strain topology |
US9496227B2 (en) | 2009-07-15 | 2016-11-15 | Qualcomm Incorporated | Semiconductor-on-insulator with back side support layer |
CN102420253A (zh) * | 2011-12-13 | 2012-04-18 | 清华大学 | 一种背面嵌入应变介质区的vdmos器件及其制备方法 |
US9515181B2 (en) | 2014-08-06 | 2016-12-06 | Qualcomm Incorporated | Semiconductor device with self-aligned back side features |
CN111883418B (zh) * | 2020-08-05 | 2021-04-27 | 长江存储科技有限责任公司 | 半导体结构的制造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58138033A (ja) | 1982-02-10 | 1983-08-16 | Toshiba Corp | 半導体基板及び半導体装置の製造方法 |
JPS61181931A (ja) | 1985-02-08 | 1986-08-14 | Fuji Electric Co Ltd | 圧覚センサ |
JPH03201536A (ja) * | 1989-12-28 | 1991-09-03 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP2803321B2 (ja) | 1990-04-27 | 1998-09-24 | 株式会社デンソー | 半導体感歪センサ |
JP2728310B2 (ja) * | 1990-07-30 | 1998-03-18 | シャープ株式会社 | 半導体ウェーハーのゲッタリング方法 |
US5294559A (en) | 1990-07-30 | 1994-03-15 | Texas Instruments Incorporated | Method of forming a vertical transistor |
JPH04245640A (ja) | 1991-01-31 | 1992-09-02 | Kawasaki Steel Corp | 半導体基板の加工方法 |
JP2824818B2 (ja) * | 1991-08-02 | 1998-11-18 | キヤノン株式会社 | アクティブマトリックス液晶表示装置 |
JPH05198783A (ja) | 1992-01-23 | 1993-08-06 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
US6191432B1 (en) * | 1996-09-02 | 2001-02-20 | Kabushiki Kaisha Toshiba | Semiconductor device and memory device |
US20020046985A1 (en) | 2000-03-24 | 2002-04-25 | Daneman Michael J. | Process for creating an electrically isolated electrode on a sidewall of a cavity in a base |
US6555839B2 (en) * | 2000-05-26 | 2003-04-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
US6580124B1 (en) * | 2000-08-14 | 2003-06-17 | Matrix Semiconductor Inc. | Multigate semiconductor device with vertical channel current and method of fabrication |
US6835246B2 (en) * | 2001-11-16 | 2004-12-28 | Saleem H. Zaidi | Nanostructures for hetero-expitaxial growth on silicon substrates |
US6900521B2 (en) * | 2002-06-10 | 2005-05-31 | Micron Technology, Inc. | Vertical transistors and output prediction logic circuits containing same |
US6707106B1 (en) * | 2002-10-18 | 2004-03-16 | Advanced Micro Devices, Inc. | Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer |
JP2004228273A (ja) * | 2003-01-22 | 2004-08-12 | Renesas Technology Corp | 半導体装置 |
US6803631B2 (en) * | 2003-01-23 | 2004-10-12 | Advanced Micro Devices, Inc. | Strained channel finfet |
US7144818B2 (en) * | 2003-12-05 | 2006-12-05 | Advanced Micro Devices, Inc. | Semiconductor substrate and processes therefor |
-
2003
- 2003-12-05 US US10/729,479 patent/US7144818B2/en active Active
-
2004
- 2004-10-26 KR KR1020067011087A patent/KR101086896B1/ko not_active IP Right Cessation
- 2004-10-26 WO PCT/US2004/035417 patent/WO2005062357A1/en active Application Filing
- 2004-10-26 JP JP2006542572A patent/JP2007513517A/ja active Pending
- 2004-10-26 CN CN2004800358158A patent/CN1890784B/zh not_active Expired - Fee Related
- 2004-10-26 EP EP04796404A patent/EP1690288A1/en not_active Withdrawn
- 2004-12-03 TW TW093137307A patent/TWI369737B/zh not_active IP Right Cessation
-
2005
- 2005-07-12 US US11/179,282 patent/US7265420B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US7265420B2 (en) | 2007-09-04 |
US20050263753A1 (en) | 2005-12-01 |
JP2007513517A (ja) | 2007-05-24 |
TW200525641A (en) | 2005-08-01 |
US20050124170A1 (en) | 2005-06-09 |
EP1690288A1 (en) | 2006-08-16 |
CN1890784B (zh) | 2013-04-24 |
WO2005062357A1 (en) | 2005-07-07 |
KR101086896B1 (ko) | 2011-11-25 |
KR20060121136A (ko) | 2006-11-28 |
TWI369737B (en) | 2012-08-01 |
US7144818B2 (en) | 2006-12-05 |
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