CN1933161A - Semiconductor device and method for fabricating the same - Google Patents

Semiconductor device and method for fabricating the same Download PDF

Info

Publication number
CN1933161A
CN1933161A CNA2006100912281A CN200610091228A CN1933161A CN 1933161 A CN1933161 A CN 1933161A CN A2006100912281 A CNA2006100912281 A CN A2006100912281A CN 200610091228 A CN200610091228 A CN 200610091228A CN 1933161 A CN1933161 A CN 1933161A
Authority
CN
China
Prior art keywords
film
mentioned
barrier film
semiconductor device
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2006100912281A
Other languages
Chinese (zh)
Inventor
大塚隆史
中林隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of CN1933161A publication Critical patent/CN1933161A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3141—Deposition using atomic layer deposition techniques [ALD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31641—Deposition of Zirconium oxides, e.g. ZrO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31645—Deposition of Hafnium oxides, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma

Abstract

To provide a semiconductor device and its manufacturing method that can suppress both leakage currents resulting from thermal emission of electrons from an electrode and from the tunneling effect, which has an MIM capacitor capable to maintain a high specific inductive capacity. The semiconductor device is equipped with a capacitor that is formed by laminating a lower electrode 16, a capacitance insulating film 18, and an upper electrode 20 one after another, wherein the capacitance insulating film 18 is composed of Hf oxide or Zr oxide, and a barrier film 17 is formed between the lower electrode 16 and the capacitance insulating film 18 that is composed of Hf oxide or Zr oxide containing at least either one of Al and Si.

Description

Semiconductor device and manufacture method thereof
Technical field
The present invention relates to a kind of semiconductor device and manufacture method thereof, particularly have the semiconductor device and the manufacture method thereof of capacitor.
Background technology
In recent years, along with highly integrated, the high performance and the high speed of conductor integrated circuit device, proposed in DRAM semiconductor devices such as (Dynamic Random Access Memory), to use the technology that high dielectric film is used in MIM (Metal-Insulator-Metal) capacitor in the capacitor insulating film.
Aspect the miniaturization of seeking semiconductor device and densification, must dwindle the capacitor occupied area in the chip.But, stably work in order to make storage part, must necessarily above capacitance.Therefore, developing and to have the Hf oxide (HfO of high-k x) or Zr oxide (ZrO x) be used in the capacitor in the capacitor insulating film.
But, with HfO xOr ZrO xBe used in the capacitor of capacitor insulating film, have that leakage current uprises along with working temperature and the problem that increases.This is because for HfO xAnd ZrO xThe band gap (band gap) of each electrode lower and the heat of the electronics of origin self-electrode is emitted and the leakage current that causes uprises along with temperature and increase so.
So, such technology has been proposed: by by HfO xOr ZrO xThe capacitor insulating film that constitutes and the interface of electrode form band gap higher by Al oxide (AlO x) barrier film that constitutes, improve the band gap between electrode and the capacitor insulating film, the leakage current (opening the 2002-222934 communique) that causes thereby the heat that suppresses the electronics of origin self-electrode is emitted with reference to the spy.
Fig. 6 (a)～Fig. 6 (f) shows and is disclosed in the spy AlO that opened use in the past in the 2002-222934 communique xThe profile of each operation of the manufacture method of the MIM capacitor of barrier film.
At first, shown in Fig. 6 (a), after forming the 1st interlayer dielectric 61 on the silicon substrate 60, form the 1st through hole 62 that runs through the 1st interlayer dielectric 61.Then, by the 1st through hole 62 being buried with tungsten, titanium or titanium nitride etc., form electrically conductive film plunger 63 after, forming the 2nd interlayer dielectric 64 on the 1st interlayer dielectric 61 and on the electrically conductive film plunger 63 again.Secondly, run through the 2nd interlayer dielectric 64 and form the 2nd through hole 65 that arrives electrically conductive film plunger 63.
Secondly, shown in Fig. 6 (b), on whole the 2nd interlayer dielectric 64 that contains the 2nd through hole 65 inside, form lower electrode material membrane 66A such as titanium nitride film.
Secondly, shown in Fig. 6 (c), CMP (chemical mechanical polishing) handles or comprehensive etch-back process by carrying out, and comes in the outside of the 2nd through hole 65 the lower electrode material membrane 66A that is formed on the 2nd interlayer dielectric 64 to be removed.Thereby, in the 2nd through hole 65, form lower electrode 66 with three-D structure.
Secondly, shown in Fig. 6 (d), utilizing atomic layer deposition method is that ALD (Atomic LayerDeposition) method forms AlO on lower electrode 66 x Film 67.
Fig. 7 shows and utilizes atomic layer deposition method to form AlO xFilm and HfO described later xThe sequence of film (sequence).
As shown in Figure 7, at first, with environmental gas (N 2) import in the film forming room, then, allow silicon substrate (wafer) 60 heat up.Then, will be indoor with the wavy importing of pulse for TMA (trimethyl aluminium) gas of Al supply source, allow TMA or its spike chemisorbed on the surface of the 2nd interlayer dielectric 64 and the surface of lower electrode 66.Secondly, after cutting off TMA gas, will clean (purge) gas (N 2) indoor with the wavy importing of pulse, method is removed remaining in indoor TMA gas by this.Secondly, after cutting off purge gas, with ozone (O 3) gas is indoor with the wavy importing of pulse.At this moment, therefore this ozone gas and be adsorbed on the surface of the 2nd interlayer dielectric 64 and the above-mentioned TMA on the surface of lower electrode 66 or its spike produce thermal response, forms the AlO of an atomic layer level thickness xThen, again that purge gas is indoor with the pulse type importing, method is removed remaining in indoor ozone gas by this.Can pass through repeatedly above-mentioned repeatedly film forming sequence, on lower electrode 66, form AlO with desirable thickness xFilm 67.
Secondly, shown in Fig. 6 (e), utilize atomic layer deposition method at AlO xForm HfO on the film 67 x Film 68.
Specifically, as shown in Figure 7, at first, will (tetraethyl methylamino hafnium: tetrakis ethylmethylamino hafnium) gas be indoor with the wavy importing of pulse, allows TEMA-Hf or its spike chemisorbed at AlO for the TEMA-Hf of Hf supply source xThe surface of film 67.Secondly, after cutting off TEMA-Hf gas, purge gas is indoor with the wavy importing of pulse, and method is removed remaining in indoor TEMA-Hf gas by this.Secondly, after cutting off purge gas, that ozone gas is indoor with the wavy importing of pulse.At this moment, this ozone gas and be adsorbed on AlO xThe above-mentioned TEMA-Hf on film 67 surfaces or its spike produce thermal response, therefore, form the HfO of an atomic layer level thickness xThen, again that purge gas is indoor with the wavy importing of pulse, method is removed remaining in indoor ozone gas by this.Can pass through repeatedly above-mentioned repeatedly film forming sequence, come at AlO xForm HfO on the film 67 with desirable thickness xFilm 68.
Secondly, shown in Fig. 6 (f), at HfO xAfter forming upper electrode material film 69 such as titanium nitride film on the film 68, form upper electrode, omit diagram by this upper electrode material film 69 being processed into desirable shape.
Via above-mentioned operation, next formation on silicon substrate 60 has by AlO xThe MIM capacitor of the barrier film that film 67 constitutes.
From now on, if the downsizing of capacitor occupied area further develops,, must carry out the filming of capacitor insulating film then in order to ensure capacitance.But, if use relative dielectric constant to be lower than HfO xOr ZrO xAlO xBarrier film then is difficult to guarantee capacitance by the filming of capacitor insulating film.
For example, if make AlO xOxide-film conversion thickness)=requirement of 1.2nm the thickness of barrier film is 0.5nm, then in order to satisfy Teq (Thickness Equivalent:, must make HfO xThe thickness of film is about 3.8nm (AlO xRelative dielectric constant: be approximately 9, HfO xRelative dielectric constant: be approximately 20).At this moment, owing to contain AlO xCapacitor insulating film (the HfO of the thickness of barrier film xFilm) thickness is discontented with 5nm, and therefore the leakage current that is caused by the raceway groove effect increases.As mentioned above, using AlO xIn the MIM capacitor of barrier film, the extremely difficult capacitance of guaranteeing that Teq=1.2nm is following.
Summary of the invention
As above reflect, the objective of the invention is to: the semiconductor device and the manufacture method thereof that have comprised MIM capacitor are provided, this MIM capacitor can suppress the heat of the electronics of origin self-electrode emits and leakage current that causes and the leakage current that is caused by the raceway groove effect, and can keep higher relative dielectric constant.
In order to achieve the above object, this case inventors have found instead AlO of the barrier film that is made of Hf oxide that contains Al or Si or Zr oxide xThe new barrier film of barrier film is optimum, and is specifically optimum as the barrier film that electrode is had higher band gap and be made of the higher material of relative dielectric constant, expected following invention.
Specifically, semiconductor device involved in the present invention is included on the substrate lamination lower electrode, capacitor insulating film and upper electrode successively and the capacitor that forms.Above-mentioned capacitor insulating film is made of Hf oxide or Zr oxide.Between above-mentioned lower electrode and above-mentioned capacitor insulating film, be formed with the 1st barrier film that Hf oxide or Zr oxide by at least one side who contains Al or Si constitute.
In semiconductor device of the present invention, be preferably in and be formed with the 2nd barrier film that Hf oxide or Zr oxide by at least one side who contains Al or Si constitute between above-mentioned upper electrode and the above-mentioned capacitor insulating film.At this moment, preferably above-mentioned the 2nd barrier film is noncrystal.And preferably the containing ratio of Al in above-mentioned the 2nd barrier film or Si is more than or equal to 1atm% and discontented 25atm%.
In semiconductor device of the present invention, preferably above-mentioned the 1st barrier film is noncrystal.
In semiconductor device of the present invention, preferably the containing ratio of Al in above-mentioned the 1st barrier film or Si is more than or equal to 1atm% and discontented 25atm%.
In semiconductor device of the present invention, best above-mentioned lower electrode and above-mentioned upper electrode are made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.
The manufacture method of semiconductor device involved in the present invention comprises: operation a forms capacitor lower electrode on substrate; Operation b forms the 1st barrier film that Hf oxide or Zr oxide by at least one side of containing Al or Si constitute on above-mentioned capacitor lower electrode; Operation c forms the capacitor insulating film that is made of Hf oxide or Zr oxide on above-mentioned the 1st barrier film; And operation d, on above-mentioned capacitor insulating film, form the electric capacity upper electrode.
In the manufacture method of semiconductor device of the present invention, be preferably between above-mentioned operation c and the above-mentioned operation d, also be included on the above-mentioned capacitor insulating film operation e that forms the 2nd barrier film that Hf oxide or Zr oxide by at least one side of containing Al or Si constitute.At this moment, be preferably among the above-mentioned operation e, above-mentioned the 2nd barrier film forms with atomic layer deposition method.
In the manufacture method of semiconductor device of the present invention, be preferably among the above-mentioned operation b, above-mentioned the 1st barrier film forms with atomic layer deposition method.
In the manufacture method of semiconductor device of the present invention, be preferably among the above-mentioned operation c, above-mentioned capacitor insulating film forms with atomic layer deposition method.
In the manufacture method of semiconductor device of the present invention, be preferably in after the above-mentioned operation c, also comprise above-mentioned capacitor insulating film is carried out the operation f that plasma oxidation is handled.
In the manufacture method of semiconductor device of the present invention, best above-mentioned lower electrode and above-mentioned upper electrode are made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.
(effect of invention)
According to the present invention, at the HfO that constitutes capacitor insulating film xOr ZrO x, and the barrier film that constitutes by at least one side's of containing Al or Si Hf oxide or Zr oxide of the layout setting of electrode.So, owing to can improve band gap between capacitor insulating film and the electrode, the heat that therefore can suppress the electronics of origin self-electrode is emitted and the leakage current that causes.And, even owing in barrier film, also can obtain and HfO xOr ZrO xTherefore the higher relative dielectric constant that is equal to can keep the thickness of physics to a certain extent when guaranteeing capacitance, thereby, can suppress the leakage current that causes by the raceway groove effect.
The simple declaration of accompanying drawing
Fig. 1 (a)～Fig. 1 (g) shows the profile of each operation of the manufacture method of the related semiconductor device of the 1st embodiment of the present invention.
Fig. 2 be show in the manufacture method of the related semiconductor device of the 1st embodiment of the present invention, utilize atomic layer deposition method to form Hf xAl yO zThe sequence chart of the importing reacting gas in the operation of film.
Fig. 3 is using HfO for showing xIn the time of capacitor insulating film, with Hf xAl yO zBarrier film uses the electrical characteristics figure of the mim structure capacitor involved in the present invention between lower electrode and capacitor insulating film.
Fig. 4 is for showing Hf of the present invention xAl yO zThe Al containing ratio in the barrier film and the dependency relation figure of relative dielectric constant.
Fig. 5 be show in the manufacture method of the related semiconductor device of the 2nd embodiment of the present invention, utilize atomic layer deposition method to form Zr xAl yO zThe sequence chart of the importing reacting gas in the operation of film.
Fig. 6 (a)～Fig. 6 (f) is the profile of each operation of the manufacture method that shows MIM capacitor in the past.
Fig. 7 be show in the manufacture method of MIM capacitor in the past, utilize atomic layer deposition method to form AlO xFilm and HfO xThe sequence chart of film.
(explanation of symbol)
The 10-Semiconductor substrate; 11-the 1st interlayer dielectric; 12-the 1st through hole; 13-electrically conductive film plunger; 14-the 2nd interlayer dielectric; 15-the 2nd through hole; The 16-lower electrode; 16A-lower electrode material membrane; 17-the 1st barrier film; The 18-capacitor insulating film; 19-the 2nd barrier film; 20-upper electrode material film.
Embodiment
(the 1st embodiment)
Below, with reference to accompanying drawing the 1st embodiment of the present invention related semiconductor device and manufacture method thereof are illustrated.
Fig. 1 (a)～Fig. 1 (g) is the profile of each operation of the manufacture method that shows the related semiconductor device of the 1st embodiment.
At first, shown in Fig. 1 (a), for example, for example depositing on the Semiconductor substrate 10 that is made of silicon, thickness is the 1st interlayer dielectric 11 of 300nm.Then, for example bore that runs through the 1st interlayer dielectric 11 formation arrival Semiconductor substrate 10 is the 1st through hole 12 of 150nm, and then, for example conductors such as tungsten, titanium or titanium nitride are imbedded in the 1st through hole 12 and formed electrically conductive film plunger 13.Secondly, depositing on the 1st interlayer dielectric 11 after for example thickness is the 2nd interlayer dielectric 14 of 500nm, running through the 2nd interlayer dielectric 14, to form for example bore that arrives electrically conductive film plungers 13 be the 2nd through hole 15 of 400nm.
Secondly, shown in Fig. 1 (b), for example on whole the 2nd interlayer dielectric 14 that contains the 2nd through hole 15 inside, deposit lower electrode material membrane 16A such as titanium nitride film.
Secondly; for example; utilizes on one side (omitting diagram) against corrosion to imbed the 2nd through hole 15 and protect lower electrode material membrane 16A in the 2nd through hole 15; carry out comprehensive etch-back process on one side; method by this; in the outside of the 2nd through hole 15, remove the lower electrode material membrane 16A that is formed on the 2nd interlayer dielectric 14, shown in Fig. 1 (c).Thereby, in the 2nd through hole 15, form the lower electrode 16 that for example constitutes by titanium nitride film.
Secondly, shown in Fig. 1 (d), depositing the 1st barrier film 17 on the surface of lower electrode 16 and on the surface of the 2nd interlayer dielectric 14.The 1st barrier film 17 is by the non-crystal Hf oxide (Hf that for example contains Al xAl yO z) constitute, the thickness of its film for example is approximately 0.5nm.And for example using, atomic layer deposition method (ALD:Atomic Layer Deposition) method forms the 1st barrier film 17.In utilizing the film forming of atomic layer deposition method, wavy with pulse, reacting gas is imported in the chamber (reative cell) intermittently.The atomic layer deposition method that utilizes that Fig. 2 shows present embodiment forms Hf xAl yO zThe sequence of the importing reacting gas in the operation of film.
Specifically, as shown in Figure 2, at first, with environmental gas (for example, nitrogen (N 2) gas) and import indoor after, Semiconductor substrate 10 is warmed up to for example about 200～400 ℃.At this moment, indoor gas pressure is set at about 100Pa.And,, except nitrogen, can also use inert gases such as argon as environmental gas.Then, wavy with pulse will to be that for example TEMA-Hf (the tetraethyl methylamino hafnium) gas of Hf supply source imports indoor, allows TEMA-Hf or its spike chemisorbed on the surface of the 2nd interlayer dielectric 14 and the surface of lower electrode 16.Secondly, after cutting off TEMA-Hf gas, purge gas is indoor with the wavy importing of pulse, and method is removed remaining in indoor TEMA-Hf gas by this.Here, as purge gas, can use for example nitrogen, argon gas body or helium gas etc.Secondly, after cutting off purge gas, with ozone (O 3) gas is indoor with the wavy importing of pulse.At this moment, therefore this ozone gas and be adsorbed on the surface of the 2nd interlayer dielectric 14 and the above-mentioned TEMA-Hf on the surface of lower electrode 16 or its spike produce thermal response, forms the HfO of an atomic layer level thickness xThen, again that purge gas is indoor with the wavy importing of pulse, method is removed remaining in indoor ozone gas by this.
In the present embodiment, by with above-mentioned HfO xFilm forming sequence for example 2,3 times repeatedly, form for example HfO of 2～3 atomic layer level thickness xBehind the film, as described below, carry out Al is added on HfO xSequence in the film.
That is, forming HfO xBehind the film, as shown in Figure 2, wavy with pulse will to be that TMA (trimethyl aluminium) gas of Al supply source imports indoor, allows TMA or its spike chemisorbed at HfO xThe surface of film.Secondly, after having cut off TMA gas, wavy that purge gas (for example, nitrogen) importing is indoor with pulse, method is removed remaining in indoor TMA gas by this.Secondly, after cutting off purge gas, with pulse wavy ozone gas is imported indoor.At this moment, at this ozone gas, be adsorbed on HfO xThe above-mentioned TMA on the surface of film or its spike and bottom HfO xCarry out thermal response between the three, the result forms non-crystal Hf xAl yO zFilm.Then, purge gas is imported indoor so that pulse is wavy again, method is removed remaining in indoor ozone gas by this.
In the present embodiment, by to by 2～3 above-mentioned HfO xThe film forming sequence and 1 time Al is added on above-mentioned HfO xIn sequence form non-crystal Hf xAl yO zThe operation of film carries out twice, and forming by for example thickness is noncrystal Hf about 0.5nm xAl yO zThe 1st barrier film 17 that film constitutes.At this moment, the Al containing ratio of the 1st barrier film 17 is for for example about 15%, and its relative dielectric constant is about 15.In addition, in the present embodiment, can be by changing above-mentioned HfO xThe film forming sequence number of times and Al is added on above-mentioned HfO xIn the number of times ratio of sequence, set the Al containing ratio of the 1st barrier film 17 arbitrarily.
Secondly, shown in Fig. 1 (e), utilize for example atomic layer deposition method, on the surface of the 1st barrier film 17, form for example by HfO xThe capacitor insulating film 18 that constitutes.Specifically, by with HfO shown in Figure 2 xThe film forming sequence for example carry out about 30 times, forming by for example thickness is HfO about 4.8nm xThe capacitor insulating film 18 that film constitutes.
Secondly, shown in Fig. 1 (f), deposition the 2nd barrier film 19 on the surface of capacitor insulating film 18.In the present embodiment, the 2nd barrier film 19 is the same with the 1st barrier film 17, by the noncrystal Hf oxide (Hf that for example contains Al xAl yO z) constitute, its thickness for example is approximately 0.5nm.And the formation method of the 2nd barrier film 19 is identical with the formation method of the 1st barrier film 17 for example shown in Figure 2.
In addition, in the present embodiment, the 1st barrier film 17 is that thickness is the Hf of 0.5nm xAl yO zFilm, capacitor insulating film 18 are that thickness is the HfO of 4.8nm xFilm and the 2nd barrier film 19 are that thickness is the Hf of 0.5nm xAl yO zThe laminated body of film can satisfy the requirement of Teq=1.2nm.
Secondly, the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19 are carried out plasma oxidation handle, method by this offers oxygen the oxygen shortcoming part in each film of the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19.
Secondly, shown in Fig. 1 (g), after for example forming the thickness that constitutes by titanium nitride film etc. on the 2nd barrier film 19 and being 50nm right and left upper electrode material film 20,, this upper electrode material film 20 forms upper electrode by being processed into desirable shape.
Via above-mentioned operation, on Semiconductor substrate 10, form and have by Hf xAl yO zThe MIM capacitor of the present embodiment of the barrier film that film constitutes.
According to present embodiment, at the HfO that constitutes capacitor insulating film 18 xWith the layout setting of lower electrode 16 by Hf xAl yO zFilm promptly contains the 1st barrier film 17 of the Hf oxide formation of Al, simultaneously, and at the HfO that constitutes capacitor insulating film 18 xWith the layout setting of upper electrode by Hf xAl yO zThe 2nd barrier film 19 that film (the Hf oxide that contains Al) constitutes.So, owing to can improve band gap between capacitor insulating film 18 and each electrode, therefore can suppress the leakage current that causes by emitting from the heat of the electronics of each electrode.And, even owing in barrier film 17 and 19, also can obtain and HfO xTherefore the higher relative dielectric constant that is equal to can keep the thickness of physics to a certain extent when guaranteeing capacitance, thereby, can suppress the leakage current that causes by the raceway groove effect.
Fig. 3 is compared the electrical characteristics of the electrical characteristics of mim structure capacitor involved in the present invention and mim structure capacitor in the past, and described mim structure capacitor involved in the present invention uses HfO xCapacitor insulating film simultaneously, has used Hf between lower electrode and capacitor insulating film xAl yO zBarrier film (AHO barrier film), described mim structure capacitor in the past uses HfO xCapacitor insulating film simultaneously, has used AlO between lower electrode and capacitor insulating film xBarrier film.In Fig. 3, transverse axis shows the Teq (oxide-film conversion thickness) of capacitor, and the longitudinal axis shows the leakage current of each memory cell.
As shown in Figure 3, using AlO xIn the mim structure capacitor in the past of barrier film and since Teq become about 1.4nm or below the 1.4nm after, therefore leakage current obviously increases, and can not satisfy the requirement of Teq=1.2nm.
And using Hf xAl yO zIn the mim structure capacitor of the present invention of barrier film,, therefore can satisfy the requirement of Teq=1.2nm fully owing to suppressed the increase of the leakage current of Teq till about 1.0nm.That is to say Hf of the present invention xAl yO zBarrier film has in order to the heat of the electronics that suppresses the origin self-electrode emits and enough band gap of the leakage current that causes.
And, according to present embodiment,, can form capacitor insulating film 18 with noncrystalline or similar non-crystalline state because the bottom of capacitor insulating film 18 is that the 1st barrier film 17 is noncrystal (noncrystalline), therefore can further reduce the leakage current of capacitor.
And,,, can positively form the noncrystal Hf that becomes the 1st barrier film 17 on the surface of lower electrode 16 owing in the film forming of the 1st barrier film 17 and the 2nd barrier film 19, use atomic layer deposition method according to present embodiment xAl yO zFilm simultaneously, can positively form the noncrystal Hf that becomes the 2nd barrier film 19 on the surface of capacitor insulating film 18 xAl yO zTherefore film can positively obtain above-mentioned effect.
In addition, in the present embodiment, relevant Hf as the 1st barrier film 17 and the 2nd barrier film 19 xAl yO zThe composition of film, preferably x+y+z=1,0.115＜x≤0.32,0.01≤y＜0.25,0.635≤z≤0.67.That is to say that the Al containing ratio in best the 1st barrier film 17 or the 2nd barrier film 19 is more than or equal to 1atm% and discontented 25atm%.So, can when descending, the relative dielectric constant that prevents each barrier film make each barrier film be higher than HfO to the band gap of electrode x
Fig. 4 shows Hf of the present invention xAl yO zThe Al containing ratio in the barrier film and the dependency relation of relative dielectric constant.In addition, in Fig. 4, transverse axis shows Hf xAl yO zAl containing ratio in the barrier film, the longitudinal axis shows relative dielectric constant.As shown in Figure 4, if the discontented 25atm% of Al containing ratio, then can obtain practical value more than 12～13 or 12～13 as Hf xAl yO zThe relative dielectric constant of barrier film.
And, in the present embodiment, also can replace Hf xAl yO zFilm uses Hf xSi yO zFilm (the Hf oxide that contains Si) or contain Al and Si two sides' Hf oxide as the 1st barrier film 17 or the 2nd barrier film 19.When using Hf xSi yO zDuring film, about its composition, preferably x+y+z=1,0.115＜x≤0.32,0.01≤y＜0.25,0.635≤z≤0.67.That is to say that the Si containing ratio in best the 1st barrier film 17 or the 2nd barrier film 19 is more than or equal to 1atm% and discontented 25atm%.So, can when descending, the relative dielectric constant that prevents each barrier film make each barrier film be higher than HfO to the band gap of electrode x
And in the present embodiment, the 1st barrier film 17 also can be made of different materials with the 2nd barrier film 19.And, any one party in the 1st barrier film 17 or the 2nd barrier film 19 also can be set.
And, in the present embodiment, become the HfO of capacitor insulating film 18 xAl in the film or the containing ratio of Si, from the viewpoint that prevents that relative dielectric constant from descending, preferably discontented 1atm%.In addition, also can use ZrO xFilm replaces HfO xFilm is as capacitor insulating film 18.
And in the present embodiment, the MIM capacitor that forms with the recess that is provided with in the dielectric film on substrate still also can replace it as object, is object with the MIM capacitor of other type.
And, in the present embodiment, titanium nitride (TiN) film being used as lower electrode 16 and upper electrode, but be not limited thereto, lower electrode 16 and upper electrode also can be made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.And lower electrode 16 also can be made of different materials with upper electrode.
And, in the present embodiment, when utilizing atomic layer deposition method to form the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19, carried out film forming with an atomic layer level thickness at every turn, but also can replace it, carry out film forming with 2～3 atomic layer level thickness at every turn.
(the 2nd embodiment)
Below, with reference to accompanying drawing the 2nd embodiment of the present invention related semiconductor device and manufacture method thereof are illustrated.
Maximum different being of the 2nd embodiment and the 1st embodiment: use ZrO xReplace HfO xAs capacitor insulating film, simultaneously, use Zr xAl yO zReplace Hf xAl yO zFilm is as barrier film.
In the manufacture method of the related semiconductor device of the 2nd embodiment, at first, carry out and the same operation of the 1st embodiment shown in Fig. 1 (a)～Fig. 1 (c), promptly carry out the operation till the lower electrode 16 that forms capacitor on the Semiconductor substrate 10.
Secondly, shown in Fig. 1 (d), depositing the 1st barrier film 17 on the surface of lower electrode 16 and on the surface of the 2nd interlayer dielectric 14.In the present embodiment, the 1st barrier film 17 is by the non-crystal Zr oxide (Zr that for example contains Al xAl yO z) constitute, its thickness for example is approximately 0.5nm.And, in the formation of the 1st barrier film 17, use for example atomic layer deposition method.In utilizing the film forming of atomic layer deposition method, wavy with pulse, reacting gas is imported indoor (reative cell in) intermittently.The atomic layer deposition method that utilizes that Fig. 5 shows present embodiment forms Zr xAl yO zThe sequence of the importing reacting gas in the operation of film.
Specifically, as shown in Figure 5, at first, after environmental gas (for example, nitrogen) importing is indoor, Semiconductor substrate 10 is warmed up to for example about 200～400 ℃.At this moment, indoor gas pressure is set at about 100Pa.And,, except nitrogen, can also use inert gases such as argon as environmental gas.Then, wavy with pulse will be for example ZrCl of Zr supply source 4It is indoor that (zirconium chloride) gas imports, and allows ZrCl 4Or its spike chemisorbed is on the surface of the 2nd interlayer dielectric 14 and the surface of lower electrode 16.Secondly, cutting off ZrCl 4Behind the gas, purge gas is indoor with the wavy importing of pulse, and method will remain in indoor ZrCl by this 4Gas is removed.Here, as purge gas, can use for example nitrogen, argon gas body or helium gas etc.Secondly, after cutting off purge gas, with H 2O (gas) is indoor with the wavy importing of pulse.At this moment, this H 2O and be adsorbed on the surface of the 2nd interlayer dielectric 14 and the above-mentioned ZrCl on the surface of lower electrode 16 4Or its spike generation thermal response, therefore, form the ZrO of an atomic layer level thickness xThen, again that purge gas is indoor with the wavy importing of pulse, method will remain in indoor H by this 2O removes.
In the present embodiment, for example, with above-mentioned ZrO xFilm forming sequence 2,3 times repeatedly, form for example ZrO of 2～3 atomic layer level thickness xFilm, as described below then, carry out Al is added on ZrO xSequence in the film.
That is, forming ZrO xBehind the film, as shown in Figure 5, wavy with pulse will to be that TMA (trimethyl aluminium) gas of Al supply source imports indoor, allows TMA or its spike chemisorbed at ZrO xThe surface of film.Secondly, after having cut off TMA gas, wavy that purge gas (for example, nitrogen) importing is indoor with pulse, method is removed remaining in indoor TMA gas by this.Secondly, after cutting off purge gas, wavy with H with pulse 2O (gas) imports indoor.At this moment, at this H 2O, be adsorbed on ZrO xThe above-mentioned TMA on the surface of film or its spike and bottom ZrO xCarry out thermal response between the three, the result forms non-crystal Zr xAl yO zFilm.Then, purge gas is imported indoor so that pulse is wavy again, method will remain in indoor H by this 2O removes.
In the present embodiment, by to by 2～3 above-mentioned ZrO xThe film forming sequence and 1 time Al is added on above-mentioned ZrO xIn sequence and form non-crystal Zr xAl yO zThe operation of film for example carries out twice, and forming by for example thickness is noncrystal Zr about 0.5nm xAl yO zThe 1st barrier film 17 that film constitutes.At this moment, the Al containing ratio of the 1st barrier film 17 for example is approximately 15%, and its relative dielectric constant is approximately 15.In addition, in the present embodiment, can be by changing above-mentioned ZrO xThe film forming sequence number of times and Al is added on above-mentioned ZrO xIn the number of times ratio of sequence, set the Al containing ratio of the 1st barrier film 17 arbitrarily.
Secondly, shown in Fig. 1 (e), utilize for example atomic layer deposition method, on the surface of the 1st barrier film 17, form for example by ZrO xThe capacitor insulating film 18 that constitutes.Specifically, by with ZrO shown in Figure 5 xThe film forming sequence for example carry out about 30 times, forming by for example thickness is ZrO about 4.8nm xThe capacitor insulating film 18 that film constitutes.
Secondly, shown in Fig. 1 (f), deposition the 2nd barrier film 19 on the surface of capacitor insulating film 18.In the present embodiment, the 2nd barrier film 19 is the same with the 1st barrier film 17, by the noncrystal Zr oxide (Zr that for example contains Al xAl yO z) constitute, its thickness for example is approximately 0.5nm.And the formation method of the 2nd barrier film 19 is identical with the formation method of the 1st barrier film 17 for example shown in Figure 5.
In addition, in the present embodiment, the 1st barrier film 17 is that thickness is the Zr of 0.5nm xAl yO zFilm, capacitor insulating film 18 are that thickness is the ZrO of 4.8nm xFilm and the 2nd barrier film 19 are that thickness is the Zr of 0.5nm xAl yO zThe laminated body of film can satisfy the requirement of Teq=1.2nm.
Secondly, the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19 are carried out plasma oxidation handle, method by this offers oxygen the oxygen shortcoming part in each film of the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19.
Secondly, shown in Fig. 1 (g), after for example forming the thickness that constitutes by titanium nitride film etc. on the 2nd barrier film 19 and being 50nm right and left upper electrode material film 20, form upper electrode by this upper electrode material film 20 being processed into desirable shape, omit diagram.
Via above-mentioned operation, on Semiconductor substrate 10, form and have by Zr xAl yO zThe MIM capacitor of the present embodiment of the barrier film that film constitutes.
According to present embodiment, at the ZrO that constitutes capacitor insulating film 18 xLayout setting Zr with lower electrode 16 xAl yO zThe 1st barrier film 17 that film promptly is made of the Zr oxide that contains Al, simultaneously, at the ZrO that constitutes capacitor insulating film 18 xWith the layout setting of upper electrode by Zr xAl yO zThe 2nd barrier film 19 that film (the Zr oxide that contains Al) constitutes.So, owing to can improve band gap between capacitor insulating film 18 and each electrode, therefore can suppress the leakage current that causes by emitting from the heat of the electronics of each electrode.And, even owing in barrier film 17 and 19, also can obtain and ZrO xTherefore the higher relative dielectric constant that is equal to can keep the thickness of physics to a certain extent when guaranteeing capacitance, thereby, can suppress the leakage current that causes by the raceway groove effect.
And, according to present embodiment,, can form capacitor insulating film 18 with noncrystalline or similar non-crystalline state because the bottom of capacitor insulating film 18 is that the 1st barrier film 17 is noncrystal (noncrystalline), therefore can further reduce the leakage current of capacitor.
And,,, therefore can positively form the noncrystal Zr that becomes the 1st barrier film 17 on the surface of lower electrode 16 owing in the film forming of the 1st barrier film 17 and the 2nd barrier film 19, use atomic layer deposition method according to present embodiment xAl yO zFilm simultaneously, can positively form the noncrystal Zr that becomes the 2nd barrier film 19 on the surface of capacitor insulating film 18 xAl yO zTherefore film can positively obtain above-mentioned effect.
In addition, in the present embodiment, about Zr as the 1st barrier film 17 and the 2nd barrier film 19 xAl yO zThe composition of film, preferably x+y+z=1,0.115＜x≤0.32,0.01≤y＜0.25,0.635≤z≤0.67.That is to say that the Al containing ratio in best the 1st barrier film 17 or the 2nd barrier film 19 is more than or equal to 1atm% and discontented 25atm%.So, can when descending, the relative dielectric constant that prevents each barrier film make each barrier film be higher than ZrO to the band gap of electrode x
And, in the present embodiment, also can replace Zr xAl yO zFilm uses Zr xSi yO zFilm (the Zr oxide that contains Si) or contain Al and Si two sides' Zr oxide as the 1st barrier film 17 or the 2nd barrier film 19.When using Zr xSi yO zDuring film, about its composition, preferably x+y+z=1,0.115＜x≤0.32,0.01≤y＜0.25,0.635≤z≤0.67.That is to say that the Si containing ratio in the 1st barrier film 17 or the 2nd barrier film 19 is more than or equal to 1atm% and discontented 25atm%.So, can when descending, the relative dielectric constant that prevents each barrier film make each barrier film be higher than ZrO to the band gap of electrode x
And in the present embodiment, the 1st barrier film 17 also can be made of different materials with the 2nd barrier film 19.And, any one party in the 1st barrier film 17 or the 2nd barrier film 19 also can be set.
And, in the present embodiment, become the ZrO of capacitor insulating film 18 xAl in the film or the containing ratio of Si, from the viewpoint that prevents that relative dielectric constant from descending, preferably discontented 1atm%.In addition, also can use HfO xFilm replaces ZrO xFilm is as capacitor insulating film 18.
And in the present embodiment, the MIM capacitor that forms with the recess that is provided with in the dielectric film on substrate still also can replace it as object, is object with the MIM capacitor of other type.
And, in the present embodiment, used titanium nitride (TiN) film, but be not limited thereto as lower electrode 16 and upper electrode, lower electrode 16 and upper electrode also can be made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.And lower electrode 16 also can be made of different materials with upper electrode.
And, in the present embodiment, when using atomic layer deposition method to form the 1st barrier film 17, capacitor insulating film 18 and the 2nd barrier film 19, carried out film forming with 1 atomic layer level thickness at every turn, but also can replace it, carry out film forming with 2～3 atomic layer level thickness at every turn.
(practicality)
The present invention relates to have semiconductor device and the manufacture method thereof of capacitor, can be by the HfO at the formation capacitor insulating filmxOr ZrOxWith the interface of electrode, setting can improve capacitor insulating film and electrode Between band gap and can suppress the barrier film that relative dielectric constant descends, obtain to suppress by from The heat of the electronics of electrode is emitted and the effect of the leakage current that causes, and can be by guaranteeing capacitance The time, keep the thickness of physics to suppress the leakage current that is caused by the raceway groove effect to a certain extent Effect, very useful.

Claims (14)

1, a kind of semiconductor device is included on the substrate lamination lower electrode, capacitor insulating film and upper electrode successively and the capacitor that forms, it is characterized in that:
Above-mentioned capacitor insulating film is made of Hf oxide or Zr oxide;
Between above-mentioned lower electrode and above-mentioned capacitor insulating film, be formed with the 1st barrier film that Hf oxide or Zr oxide by at least one side who contains Al or Si constitute.
2, semiconductor device according to claim 1 is characterized in that:
Between above-mentioned upper electrode and above-mentioned capacitor insulating film, be formed with the 2nd barrier film that Hf oxide or Zr oxide by at least one side who contains Al or Si constitute.
3, semiconductor device according to claim 2 is characterized in that:
Above-mentioned the 2nd barrier film is noncrystal.
4, semiconductor device according to claim 2 is characterized in that:
Al in above-mentioned the 2nd barrier film or the containing ratio of Si are more than or equal to 1atm% and discontented 25atm%.
5, semiconductor device according to claim 1 is characterized in that:
Above-mentioned the 1st barrier film is noncrystal.
6, semiconductor device according to claim 1 is characterized in that:
Al in above-mentioned the 1st barrier film or the containing ratio of Si are more than or equal to 1atm% and discontented 25atm%.
7, semiconductor device according to claim 1 is characterized in that:
Above-mentioned lower electrode and above-mentioned upper electrode are made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.
8, a kind of manufacture method of semiconductor device is characterized in that:
Comprise: operation a forms capacitor lower electrode on substrate;
Operation b forms the 1st barrier film that Hf oxide or Zr oxide by at least one side of containing Al or Si constitute on above-mentioned capacitor lower electrode;
Operation c forms the capacitor insulating film that is made of Hf oxide or Zr oxide on above-mentioned the 1st barrier film; And
Operation d forms the electric capacity upper electrode on above-mentioned capacitor insulating film.
9, the manufacture method of semiconductor device according to claim 8 is characterized in that:
Between above-mentioned operation c and above-mentioned operation d, also be included on the above-mentioned capacitor insulating film operation e that forms the 2nd barrier film that Hf oxide or Zr oxide by at least one side of containing Al or Si constitute.
10, the manufacture method of semiconductor device according to claim 9 is characterized in that:
In above-mentioned operation e, above-mentioned the 2nd barrier film forms with atomic layer deposition method.
11, the manufacture method of semiconductor device according to claim 8 is characterized in that:
In above-mentioned operation b, above-mentioned the 1st barrier film forms with atomic layer deposition method.
12, the manufacture method of semiconductor device according to claim 8 is characterized in that:
In above-mentioned operation c, above-mentioned capacitor insulating film forms with atomic layer deposition method.
13, the manufacture method of semiconductor device according to claim 8 is characterized in that:
After above-mentioned operation c, also comprise above-mentioned capacitor insulating film is carried out the operation f that plasma oxidation is handled.
14, the manufacture method of semiconductor device according to claim 8 is characterized in that:
Above-mentioned lower electrode and above-mentioned upper electrode are made of at least a among TiN, Ti, Al, W, WN, Pt, Ir and the Ru.
CNA2006100912281A 2005-09-16 2006-06-07 Semiconductor device and method for fabricating the same Pending CN1933161A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005269648A JP2007081265A (en) 2005-09-16 2005-09-16 Semiconductor device and manufacturing method therefor
JP2005269648 2005-09-16

Publications (1)

Publication Number Publication Date
CN1933161A true CN1933161A (en) 2007-03-21

Family

ID=37878886

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2006100912281A Pending CN1933161A (en) 2005-09-16 2006-06-07 Semiconductor device and method for fabricating the same

Country Status (3)

Country Link
US (1) US20070066012A1 (en)
JP (1) JP2007081265A (en)
CN (1) CN1933161A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102263027A (en) * 2010-05-28 2011-11-30 东京毅力科创株式会社 Film formation method and film formation apparatus

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7723771B2 (en) * 2007-03-30 2010-05-25 Qimonda Ag Zirconium oxide based capacitor and process to manufacture the same
WO2009057589A1 (en) * 2007-10-30 2009-05-07 Nec Corporation Capacitor, semiconductor device comprising the same, and method for manufacturing capacitor
KR101451716B1 (en) * 2008-08-11 2014-10-16 도쿄엘렉트론가부시키가이샤 Film forming method and film forming apparatus
JP2011192801A (en) * 2010-03-15 2011-09-29 Elpida Memory Inc Capacitor element, method for manufacturing capacitor element, and semiconductor device
US8541282B2 (en) * 2011-11-07 2013-09-24 Intermolecular, Inc. Blocking layers for leakage current reduction in DRAM devices
US8741712B2 (en) * 2012-09-18 2014-06-03 Intermolecular, Inc. Leakage reduction in DRAM MIM capacitors
US8835273B2 (en) * 2012-09-19 2014-09-16 Intermolecular, Inc. High temperature ALD process of metal oxide for DRAM applications
CN110164850A (en) * 2018-02-15 2019-08-23 松下知识产权经营株式会社 The manufacturing method of capacity cell and capacity cell
KR20210108736A (en) 2020-02-26 2021-09-03 삼성전자주식회사 Capacitor, semiconductor device inclduing the same, method of fabricating capacitor
US20220084936A1 (en) * 2020-09-17 2022-03-17 Intel Corporation Embedded three-dimensional electrode capacitor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6194754B1 (en) * 1999-03-05 2001-02-27 Telcordia Technologies, Inc. Amorphous barrier layer in a ferroelectric memory cell
JP2002222934A (en) * 2001-01-29 2002-08-09 Nec Corp Semiconductor device and manufacturing method thereof
US6844604B2 (en) * 2001-02-02 2005-01-18 Samsung Electronics Co., Ltd. Dielectric layer for semiconductor device and method of manufacturing the same
KR100531419B1 (en) * 2001-06-12 2005-11-28 주식회사 하이닉스반도체 semiconductor device and method for fabricating the same
US6713199B2 (en) * 2001-12-31 2004-03-30 Memscap Multilayer structure used especially as a material of high relative permittivity
JP3894554B2 (en) * 2002-08-07 2007-03-22 松下電器産業株式会社 Capacitor element and manufacturing method thereof
JP2004119832A (en) * 2002-09-27 2004-04-15 Toshiba Corp Semiconductor device
US7192892B2 (en) * 2003-03-04 2007-03-20 Micron Technology, Inc. Atomic layer deposited dielectric layers
KR101159070B1 (en) * 2003-03-11 2012-06-25 삼성전자주식회사 Method for manufacturing oxide film having high dielectric constant, capacitor comprising dielectric film formed by the method and method for manufacturing the same
US6812110B1 (en) * 2003-05-09 2004-11-02 Micron Technology, Inc. Methods of forming capacitor constructions, and methods of forming constructions comprising dielectric materials
JP4408653B2 (en) * 2003-05-30 2010-02-03 東京エレクトロン株式会社 Substrate processing method and semiconductor device manufacturing method
KR100584996B1 (en) * 2003-11-22 2006-05-29 주식회사 하이닉스반도체 Capacitor with alloyed hafnium oxide and aluminium oxide and method for fabricating the same
KR100575887B1 (en) * 2004-11-08 2006-05-03 주식회사 하이닉스반도체 Method for forming capacitor of semiconductor device
US7220600B2 (en) * 2004-12-17 2007-05-22 Texas Instruments Incorporated Ferroelectric capacitor stack etch cleaning methods

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102263027A (en) * 2010-05-28 2011-11-30 东京毅力科创株式会社 Film formation method and film formation apparatus
TWI506156B (en) * 2010-05-28 2015-11-01 Tokyo Electron Ltd Film formation method and film formation apparatus

Also Published As

Publication number Publication date
US20070066012A1 (en) 2007-03-22
JP2007081265A (en) 2007-03-29

Similar Documents

Publication Publication Date Title
CN1933161A (en) Semiconductor device and method for fabricating the same
CN1790674A (en) Capacitor with zirconium oxide and method for fabricating the same
CN1270352C (en) Methods for forming and integrated circuit structures contg. ruthenium and tungsten contg. layers
US7271055B2 (en) Methods of forming low leakage currents metal-insulator-metal (MIM) capacitors and related MIM capacitors
KR100670747B1 (en) Method for manufacturing capacitor in semiconductor device
KR100555543B1 (en) Method for forming high dielectric layer by atomic layer deposition and method for manufacturing capacitor having the layer
TWI488290B (en) Semiconductor device including carbon-containing electrode and method for fabricating the same
CN1301549C (en) Method for mfg. semiconductor IC device
US20090309187A1 (en) Semiconductor Device and Method of Fabricating the Same
JP2007013086A (en) Nano-mixed dielectric film, capacitor having the same, and its manufacturing method
US20050141168A1 (en) Capacitor with aluminum oxide and lanthanum oxide containing dielectric structure and fabrication method thereof
CN1598981A (en) Analog capacitor having at least three high-k dielectric layers, and method of fabricating the same
JP2008028249A (en) Semiconductor device, and method for manufacturing semiconductor device
US20080182427A1 (en) Deposition method for transition-metal oxide based dielectric
CN1231973C (en) Film capacitor and its manufacturing method
JP2011034995A (en) Method of manufacturing semiconductor device, and semiconductor device
CN1638093A (en) Method for manufacturing semiconductor device
JP2007129190A (en) Dielectric film forming method and method of manufacturing semiconductor device
CN1674286A (en) Ferroelectric memory element and its manufacturing method
US7759718B2 (en) Method manufacturing capacitor dielectric
KR100713906B1 (en) Method for forming capacitor of semiconductor device
KR100717824B1 (en) Capacitor and method for manufacturing the same
KR100653709B1 (en) Methods of forming a MIM capacitor and MIM capacitors fabricated using the same
US20150170837A1 (en) Dielectric K Value Tuning of HAH Stack for Improved TDDB Performance of Logic Decoupling Capacitor or Embedded DRAM
KR100713922B1 (en) Method for forming capacitor of semiconductor device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Open date: 20070321