DE10058446A1 - Halbleitervorrichtung mit Abstrahlungsstruktur, sowie Verfahren zu ihrer Herstellung - Google Patents
Halbleitervorrichtung mit Abstrahlungsstruktur, sowie Verfahren zu ihrer HerstellungInfo
- Publication number
- DE10058446A1 DE10058446A1 DE10058446A DE10058446A DE10058446A1 DE 10058446 A1 DE10058446 A1 DE 10058446A1 DE 10058446 A DE10058446 A DE 10058446A DE 10058446 A DE10058446 A DE 10058446A DE 10058446 A1 DE10058446 A1 DE 10058446A1
- Authority
- DE
- Germany
- Prior art keywords
- radiation
- component
- components
- semiconductor device
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- H01L23/051—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
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Abstract
Description
Claims (65)
einem Halbleiterchip (1a, 1b);
ersten und zweiten Abstrahlungsteilen (2, 3), welche thermisch und elektrisch mit dem dazwischen liegenden Halbleiterchip verbunden sind und eine Abstrahlungsober fläche (10) zur Abführung von Wärme von dem Halbleiter chip aufweisen; und
ersten und zweiten Verbindungsbauteilen (4), welche jeweils zwischen das erste Abstrahlungsbauteil und den Halbleiterchip und zwischen den Halbleiterchip und das zweite Abstrahlungsbauteil gesetzt sind, wobei:
die ersten und zweiten Abstrahlungsbauteile aus ei nem metallischen Material gefertigt sind, welches gegen über Wolfram und Molybdän zumindest in der elektrischen Leitfähigkeit oder der thermischen Leitfähigkeit besser ist.
das erste Abstrahlungsbauteil eine Schraubenöffnung (23a) hat, welche sich zu der ersten Abstrahlungsoberflä che hin öffnet und einen geschlossenen Boden hat;
das äußere Verdrahtungsbauteil eine Durchgangsboh rung (23b) an einer Stelle entsprechend der Schraubenöff nung hat; und
eine Schraube in die Durchgangsöffnung und die Schraubenöffnung eingeführt ist, um das äußere Verdrah tungsbauteil mit dem ersten Abstrahlungsbauteil zu ver binden.
ersten und zweiten Halbleiterchips (1a, 1b); und
ersten und zweiten Abstrahlungsbauteilen (3, 4), welche über ein Verbindungsbauteil (4) thermisch und elektrisch mit den ersten und zweiten Halbleiterchips in Verbindung stehen, welche zwischen ihnen liegen und eine Abstrahlungsoberfläche (10) aufweisen zur Abstrahlung von Wärme von den ersten und zweiten Halbleiterchips, wobei:
das erste Abstrahlungsbauteil erste und zweite vor stehende Abschnitte (2a) hat, welche in Richtung der er sten und zweiten Halbleiterchips vorstehen; und
erste und zweite vordere Endabschnitte der ersten und zweiten vorstehenden Abschnitte thermisch und elek trisch mit den ersten und zweiten Halbleiterchips über die Verbindungsbauteile in Verbindung stehen.
das eine der ersten und zweiten Abstrahlungsbauteile eine Schraubenöffnung (23a) hat, welche sich in der Abstrahlungsbaufläche öffnet und einen geschlossenen Boden hat;
das äußere Verdrahtungsbauteil eine Durchgangsöff nung (23b) in einer Position entsprechend der Schrauben öffnung hat; und
eine Schraube in die Durchgangsöffnung und die Schraubenöffnung eingeführt ist, um das äußere Verdrah tungsbauteil mit dem ersten oder zweiten Abstrahlungsbau teil zu verbinden.
einem Halbleiterchip (301, 302), der eine Ele mentausbildungsoberfläche (301a, 302a) und eine Rücken oberfläche (301b, 302b) hat;
einem ersten leitfähigen Bauteil (303), welches mit Elementausbildungsoberfläche des Halbleiterchips über ein erstes Verbindungsbauteil (304) verbunden ist, welches elektrische Leitfähigkeit hat;
einem zweiten leitfähigen Bauteil (305), welches mit der Rückenoberfläche des Halbleiterchips über ein zweites Verbindungsbauteil (304) verbunden ist, welches elektri sche Leitfähigkeit hat; und
einem dritten leitfähigen Bauteil (306), welches mit dem ersten leitfähigen Bauteil über ein drittes Verbin dungsbauteil (304) verbunden ist, welches elektrische Leitfähigkeit hat, wobei die Verbindung an einer gegen überliegenden Seite des Halbleiterchips erfolgt, wobei
ein Verbindungsbereich zwischen dem ersten leitfähi gen Bauteil und dem dritten leitfähigen Bauteil kleiner als derjenige zwischen dem ersten leitfähigen Bauteil und dem Halbleiterchip ist.
einem Halbleiterchip (301, 302), mit einer ele mentausbildenden Oberfläche (301a, 302a) und einer Rückenoberfläche (301b, 302b) an einer gegenüberliegenden Seite der Elementausbildungsoberfläche;
einem ersten leitfähigen Bauteil (303), welches elektrisch mit der Elementausbildungsoberfläche des Halb leiterchips verbunden ist;
einem zweiten leitfähigen Bauteil (305), welches elektrisch mit der Rückenoberfläche des Halbleiterchips verbunden ist;
einem dritten leitfähigen Bauteil (306), welches elektrisch mit dem ersten leitfähigen Bauteil an einer gegenüberliegenden Seite des Halbleiterchips verbunden ist; und
einem Versiegelungsbauteil (309), welches die ele mentausbildende Oberfläche und die Rückoberfläche des Halbleiterchips versiegelt, welche jeweils elektrisch mit den ersten und zweiten leitfähigen Bauteilen verbunden sind, sowie eine Fläche (306b) des dritten leitfähigen Bauteils versiegelt, welches elektrisch mit dem ersten leitfähigen Bauteil verbunden ist, wobei:
das erste leitfähige Bauteil einen abgestuften Ab schnitt (303c) an einem Abschnitt in Richtung eines äuße ren Umfanges des Versiegelungsbauteiles weisend aufweist, wobei das erste leitfähige Bauteil einen Abschnitt gerin ger Dicke (303d) durch Vorsehen des abgestuften Abschnit tes hat.
einem Substrat (110) aus Si (Silizium), mit einer elementausbildenden Oberfläche (401a) und einer Rücken oberfläche (401b) auf einer gegenüberliegenden Seite der elementausbildenden Oberfläche;
einer Elektrode (112, 113), die auf der elementaus bildenden Oberfläche des Substrates ausgebildet ist und mit Ausnahme einer Verunreinigung aus reinem Al (Aluminium) ist; und
einem Sperrmetal (111), welches zwischen der Elek trode und dem Substrat angeordnet ist, um zu verhindern, daß Si sich in der Elektrode löst.
einem äußeren Kühlbauteil, welches die Abstrahlungs oberfläche des zweiten Abstrahlungsbauteiles an einer ge genüberliegenden Seite des Substrates berührt, um eine Abstrahlung der Wärme zur Außenseite hin zu erleichern, wobei:
das erste Abstrahlungsbauteil mit dem zweiten Ab strahlungsbauteil verbunden ist, so daß von der ele mentausbildenden Oberfläche erzeugte Wärme von der Ab strahlungsoberfläche des zweiten Abstrahlungsbauteiles abgestrahlt wird.
einem Halbleiterchip (501a, 501b) mit einer ersten Oberfläche und einer zweiten Oberfläche;
einem ersten Abstrahlungsbauteil (503), welches über ein erstes Verbindungsbauteil (502) mit thermischer Leit fähigkeit mit der ersten Oberfläche des Halbleiterchips in Verbindung ist, und
einem zweiten Abstrahlungsbauteil (504), welches über ein zweites Verbindungsbauteil (502) mit thermischer Leitfähigkeit mit der zweiten Oberfläche des Halbleiter chips in Verbindung ist, wobei das zweite Abstrahlungs bauteil einen konkaven Abschnitt (508) zur Aufnahme des Halbleiterchips hierin aufweist.
das erste Abstrahlungsbauteil einen konvexen Abschnitt (506) hat, der in Richtung des Halbleiterchips vorsteht;
und wobei der konvexe Abschnitt mit dem Halbleiterchip über das erste Verbindungsbauteil in Verbindung steht.
einem Halbleiterchip (501a, 501b) mit einer ersten Oberfläche und einer zweiten Oberfläche;
einem ersten Abstrahlungsbauteil (503) mit einem konvexen Abschnitt (506), der mit der ersten Oberfläche des Halbleiterchips über ein erstes Verbindungsbauteil (502) mit thermischer Leitfähigkeit in Verbindung steht; und
einem zweiten Abstrahlungsbauteil (504), welches mit der zweiten Oberfläche des Halbleiterchips über ein zwei tes Verbindungsbauteil (502) mit thermischer Leitfähig keit in Verbindung steht;
einer Steuerelektrode, die auf der ersten Oberfläche des Halbleiterchips vorhanden ist;
einem Leiterrahmen (509), der elektrisch mit der Steuerelektrode verbunden ist, wobei das erste Abstrah lungsbauteil oder das zweite Abstrahlungsbauteil einen vorstehenden Abschnitt (507a, 507b) auf einer Seite in Richtung des Halbleiterchips weisend hat;
der vorstehene Abschnitt fest in eine Bohrung (512a, 512b) eingeführt ist, welche in dem Leiterrahmen ausge bildet ist, um das erste Abstrahlungsbauteil oder das zweite Abstrahlungsbauteil festzulegen; und
wobei ein Abstandshalter (513) in einem Raum ange ordnet ist, der zwischen dem ersten Abstrahlungsbauteil oder dem zweiten Abstrahlungsbauteil definiert ist, um das erste Abstrahlungsbauteil oder das zweite Abstrah lungsbauteil und den Halbleiterchip in Dickenrichtung des Halbleiterchips zu positionieren.
einem Halbleiterchip (101, 102) mit einer ersten Oberfläche und einer zweiten Oberfläche;
einem ersten leitfähigen Bauteil (103), welches über ein erstes Lötbauteil (104) an die erste Oberfläche des Halbleiterchips angeheftet ist; und
einem zweiten leitfähigen Bauteil (107), welches über ein zweites Lötbauteil (106) an die zweite Oberflä che des Halbleiterchips angeheftet ist, wobei ein Schmelzpunkt des zweiten Lötbauteils niedriger als derje nige des ersten Lötbauteils ist.
Befestigen eines Halbleiterchips (101, 102) an einem ersten leitfähigen Bauteil (103) mit einem dazwischen liegenden ersten Lötbauteil (104);
Befestigen eines zweiten leitfähigen Bauteiles (107) an dem Halbleiterbauchip mit einem dazwischen liegenden zweiten Lötbauteil (106), wobei das zweite Lötbauteil ei nen niedrigeren Schmelzpunkt als das erste Lötbauteil hat;
Durchführen einer Reflow-Behandlung nur an dem zwei ten Lötbauteil; und
Aufbringen eines Drucks auf das zweite leitfähige Bauteil von einer Seite gegenüberliegend des Halbleiter chips her, um einen Grad der Parallelität zwischen dem ersten leitfähigen Bauteil und dem zweiten leitfähigen Bauteil einzustellen.
Anordnen eines Heizelementes (201) zwischen ersten und zweiten Abstrahlungsbauteilen (202, 203) über ein Verbindungsbauteil (205);
Anordnen einer Lehre (206) in einem Raum, der zwi schen den ersten und zweiten Abstrahlungsbauteilen defi niert ist, so daß die Lehre die ersten und zweiten Ab strahlungsbauteile berührt und die Lehre zum Festlegen eines Abstandes zwischen den ersten und zweiten Abstrah lungsbauteilen ist, und
Unterdrucksetzen der ersten und zweiten Abstrah lungsbauteile von außen her, um die ersten und zweiten Abstrahlungsbauteile und das Heizelement über das Verbin dungsbauteil miteinander zu verbinden.
Anordnen eines Heizelementes (201) zwischen ersten und zweiten Oberflächen (202a, 203a) erster und zweiter Abstrahlungsbauteile (202, 203) mit einem ersten Verbin dungsbauteil (205) zwischen der ersten Oberfläche des er sten Abstrahlungsbauteiles und dem Heizelement und eines zweiten Verbindungsbauteiles (205) zwischen der ersten Oberfläche des zweiten Abstrahlungsbauteiles und dem Heizelement;
Bereitstellen einer ersten Lehre (260) mit einem er sten vorstehenden Abschnitt (261) an einer ersten Lehren oberfläche (260a) und einer zweiten Lehre (260) mit einem zweiten vorstehenden Abschnitt (271) und einer zweiten Lehrenoberfläche (270a);
Anordnen der ersten Lehre mit der ersten Lehrenober fläche in Richtung der zweiten Oberfläche (203b) des zweiten Abstrahlungsbauteiles weisend und der zweiten Lehre mit der zweiten Lehrenoberfläche in Richtung einer zweiten Oberfläche (202b) des ersten Abstrahlungsbautei les weisend;
Anschlagenlassen eines vorderen Endabschnittes (261a) des ersten vorstehenden Abschnittes an der ersten Oberfläche des ersten Abstrahlungsbauteiles und Anschla genlassen eines vorderen Endabschnittes (271a) des zwei ten vorstehenden Abschnittes an der ersten Oberfläche des zweiten Abstrahlungsbauteiles, wobei ein Abstand zwischen der ersten Lehre und der zweiten Lehre konstant gehalten wird; und
Unterdrucksetzen der ersten und zweiten Abstrah lungsbauteile von den zweiten Oberflächen der ersten und zweiten Abstrahlungsbauteile her, um die ersten und zwei ten Abstrahlungsbauteile und das Heizelement über die er sten und zweiten Verbindungsbauteile miteinander zu ver binden.
Applications Claiming Priority (12)
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JP33311999A JP3525832B2 (ja) | 1999-11-24 | 1999-11-24 | 半導体装置 |
JP11-333124 | 1999-11-24 | ||
JP11-333119 | 1999-11-24 | ||
JP33312499A JP3596388B2 (ja) | 1999-11-24 | 1999-11-24 | 半導体装置 |
JP2000088579A JP3614079B2 (ja) | 2000-03-24 | 2000-03-24 | 半導体装置及びその製造方法 |
JP00-88579 | 2000-03-24 | ||
JP2000097912A JP3620399B2 (ja) | 2000-03-30 | 2000-03-30 | 電気機器の製造方法 |
JP00-97912 | 2000-03-30 | ||
JP2000097911A JP3630070B2 (ja) | 2000-03-30 | 2000-03-30 | 半導体チップおよび半導体装置 |
JP00-97911 | 2000-03-30 | ||
JP00-305228 | 2000-10-04 | ||
JP2000305228A JP3601432B2 (ja) | 2000-10-04 | 2000-10-04 | 半導体装置 |
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DE10066445A Expired - Fee Related DE10066445B4 (de) | 1999-11-24 | 2000-11-24 | Halbleitervorrichtung mit Abstrahlungs-Struktur |
DE10066443A Expired - Fee Related DE10066443B8 (de) | 1999-11-24 | 2000-11-24 | Halbleitervorrichtung mit Abstrahlungsbauteilen |
DE10058446A Expired - Lifetime DE10058446B8 (de) | 1999-11-24 | 2000-11-24 | Halbleitervorrichtung mit Abstrahlungsbauteilen |
DE10066446A Expired - Fee Related DE10066446B4 (de) | 1999-11-24 | 2000-11-24 | Verfahren zur Herstellung eines elektronischen Bauteils mit zwei Abstrahlungsbauteilen |
DE10066441A Expired - Lifetime DE10066441B4 (de) | 1999-11-24 | 2000-11-24 | Halbleitervorrichtung mit Abstrahlungsbauteilen |
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- 2000-11-24 DE DE10066445A patent/DE10066445B4/de not_active Expired - Fee Related
- 2000-11-24 DE DE10066443A patent/DE10066443B8/de not_active Expired - Fee Related
- 2000-11-24 DE DE10058446A patent/DE10058446B8/de not_active Expired - Lifetime
- 2000-11-24 DE DE10066446A patent/DE10066446B4/de not_active Expired - Fee Related
- 2000-11-24 DE DE10066441A patent/DE10066441B4/de not_active Expired - Lifetime
- 2000-11-24 DE DE10066442A patent/DE10066442B4/de not_active Expired - Lifetime
-
2003
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- 2003-11-04 US US10/699,746 patent/US6998707B2/en not_active Expired - Lifetime
- 2003-11-04 US US10/699,838 patent/US6798062B2/en not_active Expired - Lifetime
- 2003-11-04 US US10/699,744 patent/US20040089940A1/en not_active Abandoned
- 2003-11-04 US US10/699,784 patent/US20040089941A1/en not_active Abandoned
- 2003-11-04 US US10/699,785 patent/US6891265B2/en not_active Expired - Lifetime
- 2003-11-04 US US10/699,954 patent/US6967404B2/en not_active Expired - Lifetime
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US8354754B2 (en) | 2009-08-18 | 2013-01-15 | Semikron Elektronik Gmbh & Co., Kg | Layered chip for use in soldering |
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DE102012204085B4 (de) * | 2011-03-17 | 2014-01-23 | Kabushiki Kaisha Toshiba | Halbleitervorrichtung mit Wärmeverteiler und Lotlage und Verfahren zum Herstellen einer solchen |
US8653651B2 (en) | 2011-03-17 | 2014-02-18 | Kabushiki Kaisha Toshiba | Semiconductor apparatus and method for manufacturing the same |
CN103545298A (zh) * | 2012-07-09 | 2014-01-29 | 赛米控电子股份有限公司 | 具有至少一个减小应力的适配元件的功率半导体模块 |
Also Published As
Publication number | Publication date |
---|---|
DE10058446B4 (de) | 2012-12-27 |
US6703707B1 (en) | 2004-03-09 |
FR2801423A1 (fr) | 2001-05-25 |
FR2801423B1 (fr) | 2004-04-23 |
DE10066441B4 (de) | 2012-10-18 |
US6992383B2 (en) | 2006-01-31 |
US6998707B2 (en) | 2006-02-14 |
DE10066443B4 (de) | 2011-08-11 |
DE10066446B4 (de) | 2011-09-29 |
US6798062B2 (en) | 2004-09-28 |
US20050167821A1 (en) | 2005-08-04 |
US6967404B2 (en) | 2005-11-22 |
US20040089941A1 (en) | 2004-05-13 |
US20040070060A1 (en) | 2004-04-15 |
US6891265B2 (en) | 2005-05-10 |
DE10058446B8 (de) | 2013-04-11 |
US20040097082A1 (en) | 2004-05-20 |
US20040070072A1 (en) | 2004-04-15 |
US20040089942A1 (en) | 2004-05-13 |
US20040089925A1 (en) | 2004-05-13 |
DE10066445B4 (de) | 2011-06-22 |
DE10066442B4 (de) | 2011-09-22 |
US20040089940A1 (en) | 2004-05-13 |
US6960825B2 (en) | 2005-11-01 |
DE10066443B8 (de) | 2012-04-19 |
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