DE10085281T1 - System zur kooperativen Behandlung von Fehlern - Google Patents
System zur kooperativen Behandlung von FehlernInfo
- Publication number
- DE10085281T1 DE10085281T1 DE10085281T DE10085281T DE10085281T1 DE 10085281 T1 DE10085281 T1 DE 10085281T1 DE 10085281 T DE10085281 T DE 10085281T DE 10085281 T DE10085281 T DE 10085281T DE 10085281 T1 DE10085281 T1 DE 10085281T1
- Authority
- DE
- Germany
- Prior art keywords
- handling system
- error handling
- cooperative error
- cooperative
- handling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
- G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/475,417 US6622260B1 (en) | 1999-12-30 | 1999-12-30 | System abstraction layer, processor abstraction layer, and operating system error handling |
PCT/US2000/035660 WO2001050262A1 (en) | 1999-12-30 | 2000-12-29 | Cooperative error handling system |
Publications (1)
Publication Number | Publication Date |
---|---|
DE10085281T1 true DE10085281T1 (de) | 2002-11-21 |
Family
ID=23887478
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10085281T Ceased DE10085281T1 (de) | 1999-12-30 | 2000-12-29 | System zur kooperativen Behandlung von Fehlern |
Country Status (6)
Country | Link |
---|---|
US (2) | US6622260B1 (de) |
AU (1) | AU2744901A (de) |
DE (1) | DE10085281T1 (de) |
GB (1) | GB2372125B (de) |
HK (1) | HK1046451B (de) |
WO (1) | WO2001050262A1 (de) |
Families Citing this family (102)
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US6622260B1 (en) * | 1999-12-30 | 2003-09-16 | Suresh Marisetty | System abstraction layer, processor abstraction layer, and operating system error handling |
US20040181731A1 (en) * | 2000-04-12 | 2004-09-16 | Advantest Corporation | Semiconductor test system storing pin calibration data, commands and other data in non-volatile memory |
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US8949468B2 (en) | 2001-09-21 | 2015-02-03 | International Business Machines Corporation | Method and system for time synchronization among systems using parallel sysplex links |
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US20050273502A1 (en) * | 2004-05-21 | 2005-12-08 | Patrick Paul B | Service oriented architecture with message processing stages |
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US20050264581A1 (en) * | 2004-05-21 | 2005-12-01 | Bea Systems, Inc. | Dynamic program modification |
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CN102519390B (zh) * | 2011-12-21 | 2015-01-07 | 哈尔滨理工大学 | 三编码周期灰度梯形相移结构光三维信息获取方法 |
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-
1999
- 1999-12-30 US US09/475,417 patent/US6622260B1/en not_active Expired - Lifetime
-
2000
- 2000-12-29 GB GB0212156A patent/GB2372125B/en not_active Expired - Fee Related
- 2000-12-29 AU AU27449/01A patent/AU2744901A/en not_active Abandoned
- 2000-12-29 DE DE10085281T patent/DE10085281T1/de not_active Ceased
- 2000-12-29 WO PCT/US2000/035660 patent/WO2001050262A1/en active Application Filing
-
2002
- 2002-10-21 HK HK02107617.6A patent/HK1046451B/zh not_active IP Right Cessation
-
2003
- 2003-07-28 US US10/628,769 patent/US7904751B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
WO2001050262A1 (en) | 2001-07-12 |
US6622260B1 (en) | 2003-09-16 |
AU2744901A (en) | 2001-07-16 |
US20040019835A1 (en) | 2004-01-29 |
HK1046451B (zh) | 2004-12-31 |
US7904751B2 (en) | 2011-03-08 |
HK1046451A1 (en) | 2003-01-10 |
GB2372125B (en) | 2004-06-30 |
GB2372125A (en) | 2002-08-14 |
GB0212156D0 (en) | 2002-07-03 |
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