DE10085350T1 - Bezugsspannungsverteilung für Multilast-I/O-Systeme - Google Patents
Bezugsspannungsverteilung für Multilast-I/O-SystemeInfo
- Publication number
- DE10085350T1 DE10085350T1 DE10085350T DE10085350T DE10085350T1 DE 10085350 T1 DE10085350 T1 DE 10085350T1 DE 10085350 T DE10085350 T DE 10085350T DE 10085350 T DE10085350 T DE 10085350T DE 10085350 T1 DE10085350 T1 DE 10085350T1
- Authority
- DE
- Germany
- Prior art keywords
- load
- systems
- reference voltage
- voltage distribution
- distribution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/4013—Management of data rate on the bus
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/470,686 | 1999-12-23 | ||
US09/470,686 US6453422B1 (en) | 1999-12-23 | 1999-12-23 | Reference voltage distribution for multiload i/o systems |
PCT/US2000/030578 WO2001048921A1 (en) | 1999-12-23 | 2000-11-07 | Reference voltage distribution for multiload i/o systems |
Publications (2)
Publication Number | Publication Date |
---|---|
DE10085350T1 true DE10085350T1 (de) | 2002-12-05 |
DE10085350B3 DE10085350B3 (de) | 2013-09-12 |
Family
ID=23868608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10085350T Expired - Fee Related DE10085350B3 (de) | 1999-12-23 | 2000-11-07 | Bezugsspannungsverteilung für Multilast-I/O-Systeme |
Country Status (6)
Country | Link |
---|---|
US (2) | US6453422B1 (de) |
AU (1) | AU1470401A (de) |
DE (1) | DE10085350B3 (de) |
GB (1) | GB2373152B (de) |
HK (1) | HK1045610B (de) |
WO (1) | WO2001048921A1 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6697896B1 (en) * | 1999-12-31 | 2004-02-24 | Intel Corporation | Method and apparatus for implementing high speed signals using differential reference signals |
US6738415B2 (en) * | 2001-03-22 | 2004-05-18 | Sun Microsystems, Inc. | Bi-directional communication system |
JP2002351588A (ja) * | 2001-05-30 | 2002-12-06 | Hitachi Ltd | 信号受信回路、半導体装置およびシステム |
US7177288B2 (en) * | 2001-11-28 | 2007-02-13 | Intel Corporation | Simultaneous transmission and reception of signals in different frequency bands over a bus line |
US6906531B2 (en) * | 2002-10-11 | 2005-06-14 | Dell Products L.P. | Adaptive reference voltage method and system |
JP4593915B2 (ja) * | 2002-12-31 | 2010-12-08 | 三星電子株式会社 | 同時両方向入出力回路及び方法 |
US6891406B2 (en) * | 2003-01-09 | 2005-05-10 | International Business Machines Corporation | Method and apparatus for supplying a reference voltage for chip-to-chip communication |
US7155352B2 (en) * | 2003-12-31 | 2006-12-26 | Intel Corporation | Using feedback to select transmitting voltage |
KR100687923B1 (ko) * | 2005-04-29 | 2007-02-27 | 삼성전자주식회사 | 마스터디바이스, 그 제어방법과 마스터디바이스를 갖는전자장치 |
US7710188B1 (en) | 2006-01-13 | 2010-05-04 | Marvell International Ltd. | Low-noise, temperature-insensitive, voltage or current input, analog front end architecture |
JP2008042376A (ja) * | 2006-08-03 | 2008-02-21 | Fujitsu Ltd | 双方向伝送回路及び送受信素子 |
US8487655B1 (en) | 2009-05-05 | 2013-07-16 | Cypress Semiconductor Corporation | Combined analog architecture and functionality in a mixed-signal array |
US8179161B1 (en) * | 2009-05-05 | 2012-05-15 | Cypress Semiconductor Corporation | Programmable input/output circuit |
US9612987B2 (en) | 2009-05-09 | 2017-04-04 | Cypress Semiconductor Corporation | Dynamically reconfigurable analog routing circuits and methods for system on a chip |
EP3217291B1 (de) * | 2016-03-11 | 2020-06-17 | Socionext Inc. | Integrierte schaltungssysteme |
US10599590B2 (en) | 2016-11-30 | 2020-03-24 | International Business Machines Corporation | Uniform memory access architecture |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5023488A (en) * | 1990-03-30 | 1991-06-11 | Xerox Corporation | Drivers and receivers for interfacing VLSI CMOS circuits to transmission lines |
GB9007793D0 (en) * | 1990-04-06 | 1990-06-06 | Foss Richard C | Dram cell plate and precharge voltage generator |
US5355391A (en) * | 1992-03-06 | 1994-10-11 | Rambus, Inc. | High speed bus system |
US5247209A (en) | 1992-05-12 | 1993-09-21 | Acer Incorporated | Supply independent constant output circuit having fast stabilization |
US5371424A (en) * | 1992-11-25 | 1994-12-06 | Motorola, Inc. | Transmitter/receiver circuit and method therefor |
JPH07131471A (ja) * | 1993-03-19 | 1995-05-19 | Hitachi Ltd | 信号伝送方法と信号伝送回路及びそれを用いた情報処理システム |
US5550496A (en) * | 1995-07-31 | 1996-08-27 | Hewlett-Packard Company | High speed I/O circuit having a small voltage swing and low power dissipation for high I/O count applications |
US6011419A (en) * | 1997-08-05 | 2000-01-04 | International Business Machines Corporation | Decoupling scheme for mixed voltage integrated circuits |
US6201572B1 (en) * | 1998-02-02 | 2001-03-13 | Agilent Technologies, Inc. | Analog current mode assisted differential to single-ended read-out channel operable with an active pixel sensor |
US6195395B1 (en) * | 1998-03-18 | 2001-02-27 | Intel Corporation | Multi-agent pseudo-differential signaling scheme |
US6184717B1 (en) * | 1998-12-09 | 2001-02-06 | Nortel Networks Limited | Digital signal transmitter and receiver using source based reference logic levels |
US6226205B1 (en) * | 1999-02-22 | 2001-05-01 | Stmicroelectronics, Inc. | Reference voltage generator for an integrated circuit such as a dynamic random access memory (DRAM) |
US6133799A (en) * | 1999-02-25 | 2000-10-17 | International Business Machines Corporation | Voltage controlled oscillator utilizing threshold voltage control of silicon on insulator MOSFETS |
US6320438B1 (en) * | 2000-08-17 | 2001-11-20 | Pericom Semiconductor Corp. | Duty-cycle correction driver with dual-filter feedback loop |
-
1999
- 1999-12-23 US US09/470,686 patent/US6453422B1/en not_active Expired - Lifetime
-
2000
- 2000-11-07 DE DE10085350T patent/DE10085350B3/de not_active Expired - Fee Related
- 2000-11-07 GB GB0213018A patent/GB2373152B/en not_active Expired - Fee Related
- 2000-11-07 AU AU14704/01A patent/AU1470401A/en not_active Abandoned
- 2000-11-07 WO PCT/US2000/030578 patent/WO2001048921A1/en active Application Filing
-
2002
- 2002-04-29 US US10/136,011 patent/US6594769B2/en not_active Expired - Lifetime
- 2002-09-27 HK HK02107147.5A patent/HK1045610B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US20020151288A1 (en) | 2002-10-17 |
HK1045610B (zh) | 2005-05-06 |
AU1470401A (en) | 2001-07-09 |
US6453422B1 (en) | 2002-09-17 |
HK1045610A1 (en) | 2002-11-29 |
DE10085350B3 (de) | 2013-09-12 |
GB2373152A (en) | 2002-09-11 |
US6594769B2 (en) | 2003-07-15 |
GB2373152B (en) | 2004-09-08 |
GB0213018D0 (en) | 2002-07-17 |
WO2001048921A1 (en) | 2001-07-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8125 | Change of the main classification |
Ipc: H03K 190175 |
|
R016 | Response to examination communication | ||
R016 | Response to examination communication | ||
R018 | Grant decision by examination section/examining division | ||
R020 | Patent grant now final |
Effective date: 20131213 |
|
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |