DE102004019435A1 - An einer Kühlrippe angeordnetes Bauelement - Google Patents
An einer Kühlrippe angeordnetes Bauelement Download PDFInfo
- Publication number
- DE102004019435A1 DE102004019435A1 DE200410019435 DE102004019435A DE102004019435A1 DE 102004019435 A1 DE102004019435 A1 DE 102004019435A1 DE 200410019435 DE200410019435 DE 200410019435 DE 102004019435 A DE102004019435 A DE 102004019435A DE 102004019435 A1 DE102004019435 A1 DE 102004019435A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- insulating material
- electrically insulating
- contact surface
- electrical contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2401—Structure
- H01L2224/24011—Deposited, e.g. MCM-D type
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2401—Structure
- H01L2224/2402—Laminated, e.g. MCM-L type
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H01L2924/0101—Neon [Ne]
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- H01L2924/01013—Aluminum [Al]
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- H01L2924/01029—Copper [Cu]
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- H01L2924/01032—Germanium [Ge]
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01052—Tellurium [Te]
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- H01L2924/01061—Promethium [Pm]
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- H01L2924/01068—Erbium [Er]
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- H01L2924/01074—Tungsten [W]
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- H01L2924/01075—Rhenium [Re]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200410019435 DE102004019435A1 (de) | 2004-04-19 | 2004-04-19 | An einer Kühlrippe angeordnetes Bauelement |
PCT/EP2005/051652 WO2005101490A2 (de) | 2004-04-19 | 2005-04-14 | An einer kühlrippe angeordnetes bauelement |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200410019435 DE102004019435A1 (de) | 2004-04-19 | 2004-04-19 | An einer Kühlrippe angeordnetes Bauelement |
Publications (1)
Publication Number | Publication Date |
---|---|
DE102004019435A1 true DE102004019435A1 (de) | 2005-11-03 |
Family
ID=34981674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE200410019435 Withdrawn DE102004019435A1 (de) | 2004-04-19 | 2004-04-19 | An einer Kühlrippe angeordnetes Bauelement |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE102004019435A1 (es) |
WO (1) | WO2005101490A2 (es) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005053396A1 (de) * | 2005-11-09 | 2007-05-16 | Semikron Elektronik Gmbh | Schaltungseinrichtung, insbesondere Frequenzumrichter |
US8823175B2 (en) | 2012-05-15 | 2014-09-02 | Infineon Technologies Ag | Reliable area joints for power semiconductors |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5293301A (en) * | 1990-11-30 | 1994-03-08 | Shinko Electric Industries Co., Ltd. | Semiconductor device and lead frame used therein |
DE10058446A1 (de) * | 1999-11-24 | 2001-05-31 | Denso Corp | Halbleitervorrichtung mit Abstrahlungsstruktur, sowie Verfahren zu ihrer Herstellung |
WO2003030247A2 (de) * | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6188547A (ja) * | 1984-10-05 | 1986-05-06 | Fujitsu Ltd | 半導体装置 |
US5229916A (en) * | 1992-03-04 | 1993-07-20 | International Business Machines Corporation | Chip edge interconnect overlay element |
US5731633A (en) * | 1992-09-16 | 1998-03-24 | Gary W. Hamilton | Thin multichip module |
US5545924A (en) * | 1993-08-05 | 1996-08-13 | Honeywell Inc. | Three dimensional package for monolithic microwave/millimeterwave integrated circuits |
US6002589A (en) * | 1997-07-21 | 1999-12-14 | Rambus Inc. | Integrated circuit package for coupling to a printed circuit board |
KR100236671B1 (ko) * | 1997-09-09 | 2000-01-15 | 윤종용 | 인쇄회로기판과 방열판을 구비하는 수직실장형 반도체 칩패키지 및 그를 포함하는 패키지 모듈 |
US5963427A (en) * | 1997-12-11 | 1999-10-05 | Sun Microsystems, Inc. | Multi-chip module with flexible circuit board |
US6449159B1 (en) * | 2000-05-03 | 2002-09-10 | Rambus Inc. | Semiconductor module with imbedded heat spreader |
FR2818801B1 (fr) * | 2000-12-21 | 2003-04-04 | Gemplus Card Int | Interconnexion par organe d'isolation decoupe et cordon de conduction |
-
2004
- 2004-04-19 DE DE200410019435 patent/DE102004019435A1/de not_active Withdrawn
-
2005
- 2005-04-14 WO PCT/EP2005/051652 patent/WO2005101490A2/de active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5293301A (en) * | 1990-11-30 | 1994-03-08 | Shinko Electric Industries Co., Ltd. | Semiconductor device and lead frame used therein |
DE10058446A1 (de) * | 1999-11-24 | 2001-05-31 | Denso Corp | Halbleitervorrichtung mit Abstrahlungsstruktur, sowie Verfahren zu ihrer Herstellung |
WO2003030247A2 (de) * | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Verfahren zum kontaktieren elektrischer kontaktflächen eines substrats und vorrichtung aus einem substrat mit elektrischen kontaktflächen |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005053396A1 (de) * | 2005-11-09 | 2007-05-16 | Semikron Elektronik Gmbh | Schaltungseinrichtung, insbesondere Frequenzumrichter |
DE102005053396B4 (de) * | 2005-11-09 | 2010-04-15 | Semikron Elektronik Gmbh & Co. Kg | Schaltungseinrichtung, insbesondere Frequenzumrichter |
US8823175B2 (en) | 2012-05-15 | 2014-09-02 | Infineon Technologies Ag | Reliable area joints for power semiconductors |
DE102013208818B4 (de) | 2012-05-15 | 2023-12-28 | Infineon Technologies Ag | Leistungshalbleitermodul und Verfahren zur Fertigung eines Leistungshalbleitermoduls |
Also Published As
Publication number | Publication date |
---|---|
WO2005101490A2 (de) | 2005-10-27 |
WO2005101490A3 (de) | 2006-04-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
OP8 | Request for examination as to paragraph 44 patent law | ||
8139 | Disposal/non-payment of the annual fee |