DE2512935A1 - SYSTEM FOR STORING DATA IN AN INDEPENDENT, PORTABLE OBJECT - Google Patents

Description

DIPL.-CHEM. DR. VOLKER VOSSIUS 8 M0NCHEN86,

PATENT ADVOCATE S ^ rtstrass

PHONE: 47 40 7ί

CABLE ADDRESS: RICNZOLPATENT MÖNCHEN ΤΤ.ΕΧ5-29 ·· ο3 VOPATD

u.z .: L 258 (Vo / Al / Pa) March 24, 1975

Case: DBE 11 3IO, Cas 1 + 1A + IB

SOCIETE INTERNATIONAL POUR L'INNOVATION

Paris, France

System for storing data in an independent,
portable object

Priority: 25 March 197 ^, France, No. 7 ^ 10191

The present invention relates to methods of storage of data and data storage systems.

A first series of systems is known, the following Elements have:

On the one hand, at least one portable object with a the memory containing the data,

on the other hand, at least one transmission device that
is generally formed by a peripheral unit which is connected to a central computer and which
Has means for transferring data between the memory of the portable object and the central computer.

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The owner of the portable object leads it to a peripheral device connected to the central computer Unit currently on. The data contained in the memory of the portable object becomes the central one Computer that processes and analyzes them. The data processed in this way are subsequently used in general to control various facilities. With the help of such a system, e.g. the opening a door or a distribution of banknotes can be controlled. The wearable object plays the role of one electronic key that allows its owner to log into the portable object with the help of the to identify contained identification data and control the activation of connected units.

Such a system is in particular for the distribution of banknotes with the help of credit cards ("blue" cards or others). However, these systems show major shortcomings based on the fact that the memory of the portable object is formed by a magnetic track. These inadequacies consist of the following:

The contents of the memory can be erased by heat or by a magnetic field,

its storage capacity is relatively small, so that the

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Identification data are limited in number,

the contents of the memory can easily be reproduced on other portable objects, which is especially in the event of theft or fraud, has a detrimental effect,

the contents of the memory can be modified using a relatively simple mechanical tool (colloidal magnifying glass, magnetic needle),

the magnetic track, like all storage systems on magnetic tapes, must be arranged in the vicinity of the read head will; In addition, the process is electromechanical, i.e. the magnetic track must be in relation to the read head be moved.

In order to overcome these shortcomings, it has been proposed to use monolithic dead memories of the semiconductor type or fuse type. In particular, a portable object is described in US-PS 37o2 ^ 64, the one particular embodiment of such Has memory.

In addition, the known systems - whatever the memory structure: magnetic or semiconductor

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construction - another major disadvantage, which stems from the fact that these systems are not so designed are in order to temporarily or permanently prevent certain data contained in the memory (or able to to be contained in the memory) is read by the transmission device and extracted from the memory can be. In addition, they are not designed to temporarily or permanently prevent that certain data transferred to the memory (or certain storage areas) are changed by new inscriptions can be.

In many applications it is necessary to use the Memory to reserve predetermined, well-defined sections and to prohibit their content from being modified or read, at least for the moment - if ^ is not final. These predetermined sections can either be free of any information, which is particularly the case when the portable object e.g. has processing means and associated writing means which are intended to store the processed data write into memory; in this case it is indeed necessary to have empty sections in the memory without reserving any information and all registrations coming from outside the portable object to prevent,

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or already contain information that one wants to preserve without being able to access it modify or read.

It is particularly crucial (this will be explained later see) to solve such a problem when the storage system is used to maintain a bank account.

A second series of data storage systems is known which have the following elements: on the one hand, at least a portable object with a memory provided for storing data,

on the other hand, at least one transmission device, generally constituted by a peripheral unit which is connected to a central computer * and means for transmitting data between the central Computer and the memory of the portable object (and possibly vice versa).

With such a system it is possible to store the data coming from a central computer data in easily transportable form and bring it to a different place.

Such a system is particularly in FR-PS 7oo71Ö7

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has been described. The portable article described in this patent has magnetic memory on. It therefore has the same shortcomings that have just been described and those of the result from the magnetic structure of the memory.

To some extent, U.S. Patent 37o2464 suggests to use a special monolithic semiconductor dead memory as a memory and to store the data in such a memory Transfer memory. However, it does not describe or specify the means that bring about this transference not the modalities of this transfer.

In addition, these known systems - whatever the structure of the memory may have: magnetic or semi-conductor type - another major drawback stemming from the fact that these systems do not are designed to transmit incoming data from different geographical locations in a scattered form and store (in a volume as small as possible). In other words, the known systems are not designed to - making maximum use of all the available sections of the Memory - to write any new size in the different sections of the memory and any modifications of the Prevent the content of already written sections.

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This inadequacy is significant. In many use cases, especially use cases In banking (you will see this) it is essential to use the usable capacity of the memory to the maximum, without changing the content of already programmed sections. More precisely, in the case of these applications In banking, the same portable object works with a multitude of transmission devices, which are under are not connected to each other, together so that a given transmission device a priori the address of empty sections ignored without any inscriptions and in particular the address of the empty section in the last written section is adjacent. It is therefore essential to solve this problem.

The present invention particularly relates to systems for storing and transmitting data that have just been have been described (those of the first row as well as those of the second row) and aims to address the shortcomings, which the known systems have to avoid.

The aim of the present invention is as follows: To provide a system that enables transmission of data between a transmission device and a portable object with a memory and / or

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conversely, the transfer of data between a memory contained in the portable object and a transmission device allowed. In addition, the transmission should be carried out with the two additional, the following properties, which can be used separately or in combination:

1. The system should allow these transmissions to be carried out in an irregular and discontinuous manner effect, i.e. in such a way that:

the same portable object can be connected to several different transmission devices repeatably and without order,

multiple portable objects repeatable and out of order with the same transmission device can be connected.

The problem to be solved is the following:

Such a system is to be developed to prevent the irregular registration of new data the content of the data already written into the memory of the portable object (its existence one cannot foresee a priori) is not changed and occurs automatically in empty parts of the memory.

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comes.

2. The system should allow the transmission to be effected in such a way that: certain ones contained in the memory Data (or capable of being contained in memory) not currently or definitively through the transmission device can be read and extracted from memory,

certain data transferred to the memory cannot be changed either momentarily or permanently.

The problem to be solved is as follows: A system should be created that certain data are neither momentarily nor finally read back and / or written and / or in the memory can be written again.

One can say more generally, in which the two additional properties listed above under one Formula be summarized that the aim of the present invention is to effect the transfer so that the contents of various specific sections of memory is temporarily or permanently inaccessible from outside for reading or enrollment.

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Finally, the object of the present invention is to create a system that, in addition to those specified above functional properties has the advantage of being as little falsifiable as possible, i.e. a system in which it is difficult to irregularly extract the contents of the memory of the to change the portable object. It is utopian to claim that a system is completely unalterable or is invulnerable. However, it can be reasonably stated that there are several different systems there are less falsifiable than others due to the technical difficulties that the fraudsters must overcome in order to change these systems in their favor.

It is underlined that none of the known, The systems described above achieve the object of the present invention, in particular the two additional ones Properties presented above under points 1 and 2. The present inventor has a problem for the first time posed and resolved, the importance of which in practice, as will be seen, is considerable.

This object is achieved according to the invention by a system with at least one portable, independent,

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electronic object, with at least one transmission device (in the text also specific Device called), wherein the portable object has at least one for storing data in an easily transportable form certain memory, accessible from axjßen, a temporary connection coupling means allowing between the portable object and the specific device and has control circuits for the memory arranged between the coupling means and the memory, which allow access to the memory and the circulation of data to and from the memory.

The memory and the control circuits are preferably implemented in a logic microswitch type. The portable object is preferably not powered and the memory consists of a dead memory. In particular, the dead memory is of semiconductor design which is reprogrammable (i.e. erasable) or programmable (i.e. not erasable). Finally, the memory is preferably inaccessible incorporated inside the portable object.

ie. 'depending on the particular structures and dispositions of the Memory contribute significantly to the fiction to make the original system unalterable.

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The transmission device consists of the following elements:

Coupling elements that are complementary to the coupling elements of the portable object,

Transmission means that are connected to the coupling means and are intended to store data in the memory, rather to be introduced and / or withdrawn, these transmission means in particular from registered and / or Reading aids exist.

According to the essential feature of the present invention, the system is characterized in that it furthermore has locking means for the transmission means (i.e. locking means for the reading means and / or Means of writing) which prohibit reading and / or any changes to the specific section of the memory.

Because of these locking means, these particular sections of the memory of the portable object remain in the state in which they are at the moment the locking means are activated, and this during the entire period Duration in which the locking means are active. It is also not possible to determine the content of this particular Sections to read.

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The locking means can be arranged either in the transmission device or in the portable object be. Preferably, especially in order to make the system as unalterable as possible, are the Locking means connected to control means of the memory and arranged in the portable object. Furthermore they are incorporated into this portable object as inaccessibly as possible.

The embodiment according to the invention, which is designed in particular so that the writing of new data in the memory of the portable object does not change the content of the data already written and occurs automatically in the empty parts of the memory, is characterized in that: *

the transmission means comprise means for writing data into the memory of the portable object,

the memory of the portable object, in connection with the control circuits, of a multitude of different ones Consists of sections, each of which is intended to take up a word,

the blocking means of the writing means, preferably arranged in the portable object, from a detector

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of the unprogrammed sections of the memory consists of:

which then prevents the activation of the writing means if the section in question is already is programmed

and which allows the writing means to be activated when the section in question is unprogrammed is to write a new size in this section.

In addition, the detector is designed so that it the write authorization for the duration of a saves the complete reading cycle.

Because of this detector, a new size cannot be entered in an already programmed section of the memory whatever the means employed. In addition, each new size is automatic written in an unprogrammed section of memory.

The unprogrammed portion detector is preferred arranged in the portable object so that it is connected to the control means of the memory.

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Due to this arrangement, the fraudster, even if he has the firm intention, can read the contents of the programmed Do not change sections as he does not have the opportunity to get to the detector and his Eliminate influence without risking destroying the memory and control circuits.

The detector of the unprogrammed section of the memory preferably has the following elements:

A first link for the parallel recording of the content of the section of the memory under consideration (e.g. an AND element if the bits not written correspond to the level correspond),

a second authorization policy, which is activated by the first member when the section in question does not contain any size, and the activation of the writing means allows,

a memory circuit which is inserted between the first and second members and is intended to the to save the active state of the first link (at least for the duration of a write-in cycle).

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The memory circuit has the task of the write authorization despite the writing of the first bit, which touches the state of the section. In addition, the detector of the unprogrammed portion of the memory preferably one in the addressing circuit of the memory inserted bolt, which is actuated by the first link through the intermediary of the memory circuit. This latch is intended to retrieve the address of the unprogrammed section of the memory during the to record the entire duration of the writing cycle.

Because of this arrangement, the fraudster does not have the opportunity to access the memory as desired, e.g. an already written page to be addressed during the write cycle. In addition, this arrangement allows lock the addressing while writing, which is desirable to avoid any error of electronic origin.

The embodiment of the system according to the invention, which has been particularly created, thus determined data contained in memory (or capable of being contained in memory) is not currently or definitively read and / or can be written and / or written again, is characterized in that the locking means

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the transmission means (means for reading and / or writing) have the following elements:

A coding means of the specific prohibited sections, a detection means of the coded prohibited sections, which then prohibits the activation of the transmission means if the section considered is forbidden is coded, and the activation of the transmission means is then permitted if the section considered as not is coded forbidden.

Based on such a combination of means, it is possible:

reading or writing, before or after writing, this or that section of the memory of the portable Prohibiting the subject, reading or writing, momentarily or permanently, this or that section to forbid the store,

after the moment at which the coding and detection means are activated (before or after writing), and for the duration in which they remain active.

In order to solve the special problems that arise when using this system in banking, and in particular

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in particular to avoid attempts at fraud, the coding and detector means are preferably according to one additional feature of the present invention inside the portable object in an outside arranged in an inaccessible manner.

With this arrangement, it is impossible whatever the means employed by the fraudster like to get to the memory and change or read its contents.

The coding and detection means of the predetermined prohibited sections can be of different types be. If the memory consists of words with η bits and input-output circuits (for reading and Writing) with η conductors, the coding means can be formed by one of the bits of the word.

The detector means connected to the conductor of the input-output circuit are connected, which corresponds to the coding bit, can in particular from a write authorization member exist (an AND element if the state 0 of the coding bit indicates a forbidden section), that forbids any writing if the section in question is forbidden. Preferably the coding bit is

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the nth bit of the word, where the usable part of the host is η - 1 bits. Based on these Arrangement prohibits the coding of the η-th bit

writing only after it has been effected for the useful η - 1 bits of the word. It is clear that such an arrangement addresses the particular problem posed by the banking application solves. If the account number or identification number has been written into the card and the nth bit has been changed (to the state it is no longer possible to change it.

The coding and detector means of the predetermined sections can also be designed in a different manner be. The coding means can consist of diode matrices of dead memories, or simply from connection points and the detector means from at least one address comparator, which is between the addressing circuit of the memory and the coding means is inserted. This address comparator deactivates a write authorization member when the address under consideration is an address coded as forbidden.

To the special when using it in banking To solve problems, the coding means are preferably in an irreversible manner during manufacture

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of the card and programmed in such a way that it is not possible to insert it into that card re-encode in different ways without destroying the card. The addresses of the Prohibited sections set once and for all. To the registered mail of confidential and personal Data (e.g. account number or identification data) in the forbidden sections by the person authorized to do so Furthermore, allowing facilities (e.g. a bank, etc.) is special in the portable item the means available to the facility are provided, which is intended to deactivate the means of blocking the enrollment. This particular remedy exists from another member inserted between the address comparator and the write authorization member. This further link can finally be made permeable by irreversibly changing an activation circuit will. The institution entrusted with entering the confidential identification data therefore has the option of Due to this special means, the blocking of the means of registration before the confidential data is registered and the blocking of the means of registration (the Coding and detector means) after the confidential data has been entered.

The data storage system according to the invention, which dio Has the properties described is in practice

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suitable for many applications. There will be particular the following applications are mentioned:

Keeping a bank account,
Distribution of banknotes,
Keeping a health hex book.

In the case of a bank account, the customer has e.g. a portable item (e.g. in the form of a card) its memory contains the following information:

Personal authorization code,
Account number,
Customers' Name,
Serial number of the card,

List (dated or not) of the various guilt operations,

List (dated or not) of the various loan operations.

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The merchant has a transmission device in the form of a cash register, which allows him to read the contents of the card and the new data, in particular to write in the date and the amount of the purchase made.

The account is managed in the following way:

The transmission device installed at the point of sale checks the coverage of the account shown on the customer's card, in which there is the debt time with the loan amount compares; this transfer device then compares the coverage with the amount of the planned Buy it; if this is sufficient, the transmission device changes the memory of the customer card by writing in the amount of the purchase made.

The transmission device then registers the account number of the in a local electronic register Customers as well as the amount of the expenditure made.

The merchant then regulates the operation his bank by giving him the bank details of his customers and the amount of their from the transfer device regiA forwarded purchases; the bank has the bankers of the various customers transfer the amount of their purchases.

• assign and credit these amounts to the merchant's account.

It is therefore essential for the management of a thank-you account to have a system that prevents all changes (involuntary or fraudulent) to the content of the memory , in particular to the predetermined sections in which the customer's bank details and his personal authorization code are stored,

d in already written sections of the memory are recorded in such a way that their content is not changed,

detects the non-written portions of the memory so that all new data is written into them.

The system according to the invention is therefore particularly suitable for such a use in banking, and all the more so because it is difficult to falsify.

In the following, various embodiments of the system according to the invention for storing and transmitting data are described in conjunction with the figures.

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It shows:

FIG. 1 shows a general functional diagram of an application of the system according to the invention for the distribution of Banknotes,

FIG. 2 shows a detailed diagram of the embodiment shown in FIG. 1, which shows the function of the memory explained in the integrated circuit of the portable object,

Figure 3 is a detailed scheme of a balancing works, the one represents the elements of the embodiment shown in Figure 1,

Figure 4 shows a first embodiment of the locking means, the prohibit any modification of the contents of the already programmed sections of the portable memory,

Figure 5 shows another embodiment of the write inhibiting means on a section that has already been written,

Figure 6 a latch on a path,

FIG. 7 a brief organizational diagram of a transmission device, those with a card with blocking means

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can interact as shown in Figure 5,

FIG. 8 addressing circuits of the device shown in FIG. 7,

FIG. 9 shows a memory grid, formed by mn words from one bit, implemented with the aid of a primary memory, formed with m words with η bits,

Figure Io is a symbolic representation of the related memory grid described with Figure 9,

FIG. 11 shows a modified embodiment of the clock circuit the memory grid described in connection with Figure 9,

FIG. 12 shows a modified embodiment of the locking means, if the memory is made up of mn words of one bit,

Figure 13 shows a further embodiment of the locking means, if the memory grid is of the type described in connection with FIG.

Figure l4 a modified embodiment of the locking means, . which change the writing of the coded as prohibited

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prohibits ten sections,

FIG. 15 shows a modified embodiment of the Locking means, different from the embodiment shown in Figure 14:

Figure l6. an embodiment of an activation circuit, which is intended for the final activation of the locking means,

Figure 17 shows an embodiment of the locking means for the Case in which the memory is addressed with the help of a counter,

Figure l8 a modified embodiment of the locking means, which makes it possible to determine the addresses of the memory that are between a lower limit X and a upper limit Y are arranged to prohibit, and

FIG. 19 shows an embodiment of the locking means in particular intended to prohibit the reading of certain sections of the memory.

The following general comments are required for the following description.

fä ff O "

All forms of execution of the Systems according to the invention are intended in particular for applications in banking and accounting. For this reason and to make it easier to read, is largely one of the banks and the management when explaining how it works and its effects a bank account uses its own terminology. However, the embodiments can also lead to others Purposes and used wherever it is necessary, data, especially in confidential and irreversible type zti save.

The electronic circuits of all the embodiments described below are because of their use inaccessible in banking in a portable object, in particular in the form of a flat rectangular Card is formed, arranged. They are incorporated into this object in an inaccessible manner, i.e. it is not possible to get to the electronic circuits without destroying them. This The result can be achieved in particular that these circuits are in the form of logic microcircuits (Integrated circuits) are executed and embedded in an opaque plastic, but other mechanical solutions are also conceivable.

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In all figures, which represent the portable object (the card) concern, is the envelope, which the circuit parts that are electrically or optically inaccessible from the outside, limited, shown by a dashed line.

The coupling agents are the only elements that make one enable electrical or optical access to the electronic components contained inside the card.

It should be noted that for other applications an intensive protection against attempts of fraudulent manipulation of the content of the card is not required, with certain - if not the entirety - elements that make up the Represent blocking means, can be arranged outside the card, in particular in the specific device. In addition, the measures provided for inaccessible incorporation of the circuits are for other applications superfluous in the map.

In order to make the description of the electronic circuits as simple as possible, it has not been the supply circuits, etc ... to show only the absolutely necessary functional circuits keep. As for the coupling means, however, the utility connections are those between the card

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and the specific external device to be set up, indicated by the characters VP, VG, mass (Characters, each the write voltage source, the general supply source of the logic circuits and mark the neutral line).

Finally, it should be noted that these exports Forms of application used monolithic dead memories of various types, particularly programmable ones or can be of a reprogrammable type. Such storage systems do not require any energy for the Storage of information. In contrast, writing information generally requires -n a significant amount of energy (several instantaneous watts). Therefore the manufacturers guarantee an extremely long storage period on the order of several decades in the case of reprogrammable ones Storage. Storage of this type are:

INTEL 17o2 and National Semiconducter 52o3 · These memories can be erased by ultraviolet or X-rays, HARRIS 762O, Monolithic memories 63 ^ 0, TEXAS INSTRUMENT 7k S 387, INTERSIL 5604. These non-erasable (destructible) memories are of the fuse or connection breakdown type .

Capacities of ^ 096 bits are currently used by different Manufactured by manufacturers, especially in

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- 3σ *

Area of MOS memory (erasable). The modern methods of connecting platelets are more integrated Circuits make it possible to manufacture a memory block of 16 kbits or less at low cost 32 kBits (4 or 8 plates) on one surface

2
of a few Io mm, including the special circuits of the subject matter of the present invention, such that this block can now be included in a card with the dimensions 2 × 60 × 80.

Compared to other memories, such as magnetic "cassettes", these monolithic semiconductor dead memories elastic disks etc. have considerable "advantages. They are more reliable and their dimensions are smaller. They don't require any mechanical movements for that Reading and writing are insensitive to magnetic fields and difficult to falsify and to damage (the fraudster has to use complex electronic means to break the state of the semi-exterspexchers to change). These. Semiconductor spexchers are therefore particularly suitable in comparison to others in the storage systems of the invention to be used. This is particularly true for the applications of the systems for banks to.

The various embodiments of the storage system

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of the invention differ significantly from one another in the structure of the portable object. In order not to repeat (on the occasion of each embodiment) de description of the portable object connected transmission device, this is only described twice:

In detailed form in connection with the figures 1,3 »

in general and concise form in connection with FIGS. 7 to 8.

However, it is clear to those skilled in the art that any of the portable objects, which are shown in the figures, are connected to a transmission device may represent all or part of the characteristics of the transmission devices described having.

The system shown in Figure 1 has two different parts, which in operation by a transition are connected, which is symbolically represented by a dash-dotted line.

In the left part of Figure 1, a non-powered, portable object is shown, preferably a ring,

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a card, a tag, a pen, in which a certain number of electronic circuits are incorporated has been (e.g. implemented in an integrated circuit).

To the right of the ^ igur 1 is a specific one Device, preferably a bank note distributor or a cash register, for immediate use shown at a point of sale. In this latter case is the business process described below not associated with the issue of banknotes, but with the writing of information in the The merchant's cash register, which later allows him to to receive a counterpart in paper money or book money from the bank of the holder of the ring.

For the sake of clarity, the hypothesis of a distribution of banknotes is maintained in the context of this description which, by the way, is accurate in terms of the electronic structure of the hypothesis of a cash register is equivalent.

The circuits of the ring contain an identification memory 4o, a debt memory 5o and a credit memory 51. The system allows the following operations during the same use:

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Identification of the owner of the ring, a process who allows or denies the further consequence of the procedure,

possible reading of a document after a credit authorization and copying of the loan amount of this Document in the ring's credit repository,

Selling a required amount of cash if and only if the account balance of the ring holder has it given the amount of this sum allowed,

Registration of the entire procedure for the purpose of booking and / or possible subsequent control a medium such as semiconductor memory, magnetic tape or disk, cassette, etc.

The operations to be performed by the owner of the ring are as follows:

Eventually introducing a credit approval into the reader

Insertion of the confidential identification number in the keyboard 31,

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possible insertion of the debt amount in the keyboard 63 »

whereby these three operations can be carried out in different chronological order,

Introduction of a protruding part of the ring on a corresponding one provided in the housing of the distributor Job.

At the moment in which the owner of the ring the last operation incumbent on him, i.e. the introduction of the ring into the distributor, are effected all above operations listed are carried out very quickly. Almost immediately, the device will perform this operation have finished giving one of the following possible outcomes according to the choice of the ring holder and his account balance allows:

Simple checking of the account balance by numerical display of the balance on display element 69,

Checking the account balance after introducing a loan amount by introducing a "credit authorization", which is absorbed, erased or disposed of in a manner not shown, after the inscription of the Loan amount in the loan memory of the ring,

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Checking the account balance after introducing the credit and selling the cash through the distributor, where the new balance after these two operations is necessarily positive or zero,

Checking the account balance after the cash has been sold by the distributor; as in the previous one In this case, the sale has only taken place if the account balance of the new balance is positive or zero.

The various functional sequences of the device, which serve as an overview for the following description, are the following:

Feeding the ring,

Commissioning of the general control of the various elements of the device by triggering the multiplexer Operation of one of the three storage tanks (Figure 2)

Operation of one of the two series baling plants (marked AS / S) (Figure 3), ■.

Reading of previous credits,
Registration of the new loan,

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Reading of previous debts,
Enrollment of the new debt.

The bank note distributing device has a Power generator 15o which feeds a winding 151. When the hanging is inserted into the distributor, the primary winding 151 becomes with a secondary winding Io5 coupled, which is part of the circuits of the ring. This winding supplies via a GIeL rectifier circuit with a diode Io6 and a non-capacitive electronic filter lo? a DC voltage, which for the different supply circuits of the ring determined is. If necessary, this electromagnetic coupling is replaced by an optical coupling, whereby the elements 15o and 151 can be replaced by a light source and the winding Io5 by a photocell. The coupling of the Ring and the distributor is effected in a simple manner in that a projecting part of the ring in one corresponding point provided in the housing of the distributor is introduced. This introduction causes a contact 27 is closed by a mechanical shock, which is part of a general (not shown) The supply device of the circuit of the thanks note distributor is. At the same time a timer 28 is triggered, whereby a level 1 is applied to a first input of an OR gate 4l. This level 1 is maintained for so long

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right that the identification of the owner of the ring can be effected. It should be noted that the second input of the OR gate 4l, which corresponds to the output of the flip-flop k2, is set to zero by toggling the flip-flop 42, which occurs through the occurrence of a level 1 at its clear input via the OR gate 86 is caused. If this identification attempt succeeds (from the following it becomes clear under which conditions this happens and what this entails) the supply connection is maintained until the end of operation of the distributor due to a level 1 at a second input of the OR element kl .

The absence of this signal, which indicates that the user has used an incorrect identification number, on the contrary, suppresses the supply connection by a level 0 at the two inputs of the OR element 4l, where level 1 is reset to 0 at the first input and level 1 is reset to the second Input has not been set so that the distributor cannot be used. The objective one The configuration of the device 28 can be left to the person skilled in the art.

It is noted that all of the apparatus described herein is wired in positive logic.

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- 38 Commissioning the general control \

If level 1 appears at one of the two inputs of the OR element kl ., It is transmitted through this element to an AND element Jk and, in parallel, to the monostable, rising multivibrator 35. The monostable rising multivibrator 35 'whose stable state is marked at its two outputs with 1 and 0, delivers a pulse of complementary value (1 at the output marked 0 and 0 at the output marked 1) during the appearance of a rising pulse leading edge at its Entry. During the duration of the pulse emitted by the monostable multivibrator 35, the output marked 1 transmits a level 0 to a second input of the AND element 3 ^ t which thus remains blocked. The second output of the monostable rising multivibrator 35 supplies a positive pulse to the input of the counter 36 which is reset to 0 and which takes over the control of the demultiplexer 38. At the end of the pulse emitted by the monostable rising multivibrator 35, the stable state 1 appears at the output of this multivibrator labeled 1, whereby the AND gate Jk is opened. This AND element now allows a first pulse supplied by the clock 33 to pass. This pulse transmitted to the counter 36th brings the demultiplexer 38 into its first position, wherein

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the starting position 0 corresponds to the T-Leitun ^ l6o. This pulse is given simultaneously to the input of the monostable falling multivibrator 37, which how the monostable rising multivibrator 35 works, with the difference that e.r only with one falling Impulse leading edge at the input a pulse at the output supplies. This pulse present at the output 0 of the multivibrator 37 is raised by the demultiplexer 3 ^ whose output 0 is transmitted. After this pulse, this part of the device remains unchanged until it appears of the next pulse sent by the clock 33. The cycle repeats itself identically to the previous one, the counter 36 taking the demultipreader 38 from output 0 can pass to output 1, the next pulse emitted by the clock 33 with a delay and after shaping by the monostable descending multivibrator 37 is given to output 1 (to 0 reset RG Le ± device 16I of the demultiplexer 38). This operating cycle is thus carried out one after the other for the ten output states of the multiplexer 38, wherein the last eight all in a row a positive pulse to the same clock excitation I62 through the OR gate 39 direct. It is noted that the state of the output 9 of the multiplexer 38 immediately before reverse operation described is followed by state 0. This part of the device will do that System controlled during the entire operating time,

5Ü9841 / 0863

In addition to the supply of the circuits of the ring, the transmission of information between the ring is carried out and the distributor in the same way by optical coupling between a light emitting diode and a photodiode causes.

Reading of the confidential identification number

When a positive pulse appears at the output 0 of the monostable rising multivibrator 35, a level is transmitted through the OR gate 6o and the optical coupling ^ 5 to the zero reset memory input, which the credit memory 5 ° and target memory 51 on the first Page in the correct position to trigger the later reading process (here a page is understood as a set of several parallel storage locations, each of which corresponds to a blocking or passing state, depending on whether it has been written or not and that in an irreversible way) »This level also sets the serial balancing units 32 and% 9 in the counting position 0- and sets the counter 47 to 0 surüek» The memory 4o is on the <st β tea page char eh aiii "const- niem Mdvsam 1 aaf ssinssa to 0 gurüekgsstslltssi- Speidisrsliigang festgs · = sets (level ₉ xis-lcLies tfesrelk sis Piiisssieiaesi isa. Figiai "rt is) 5 dssin the Spei ^ iier siathMlt .ΐΐτΐλ "a

8 I. 1 / η ^ ft v

- kl -

only page described in principle and previously for the life of the ring, which is confidential Contains identification number of its holder, registered at the moment the account is opened. It should be noted that the confidential code (not shown) is designed so that it represents both the owner of the ring and his bank.

The memory ko of the ring (FIG. 2) is permanently in the read position due to a level O on its write / read input, which also implies the closure of the contacts 3 and the inhibition of the locks 2. The 8-bit counter 1, followed by the locks 2, is used to address the memory 5 (here a single address, which is that of the first page). The transition from one side to the other takes place at the beginning of each clock cycle by a pulse at the RG input 16l, which is delayed by the monostable falling multivibrator 88, which causes the addressing counter 1 to advance from one switch position for the credit and debt collectors. The first pulse which appears on conductor 16 resets the ^ -bit counter 6 to 0 while it is controlling the output multiplexer 4 and causes counter 1 to advance one step after being delayed by the monostable decaying multivibrator 88. The clock pulses recognize their arrival

509841/0863

on the selected page of the memory the value of the

different bits that are present on the output under consideration from the bit with the highest weight to the bit with the lowest weight and which are transmitted in series through the coupling Io4 to the SaXdierwerlc 3 ² , which is determined by counting in binary and parallel Shape indicates a number χ , which is given to the input of a comparator 3o. A number ^ r is already displayed in the same form on the other inputs of the comparator 3 °, which, in a manner not shown, is derived from the identification number previously entered on the decimal keyboard 31 by the. Holder of the ring has been enrolled, has been encoded. If χ and y_ are equal, the comparator 3o delivers a level 1 through the AND gate 85 to the set input of the flip-flop 42, which thereby toggles, with a level 1 being applied to the input of the OR gate 4l via its output which ensures that the clock 33 is maintained after the timer 28 has stopped. The presence of the AND gate 85 obliges the owner of the ring to enter his confidential code within a prescribed period corresponding to the time of the maintenance of the timer 28.

Operation of the Identifxkatxonssaldxerwerkes 32 (Figure 3)

In the present case, the device 32 is operated only as an addition device. It is held in the positive counting position by a permanent level 1 at its counting-subtracting input C / D, symbolized in FIG. 1 by a plus sign. It essentially has a 16-bit counter extractor 11 (of which only the least significant 8 bits are used here), on which, in the presence of a positive information bit at the input of the AND element Io from the memory ko, the clock generator 15 coming impulses are given by the AND element Ik. The resetting to zero resulting from the conductor 16 ^ closes the AND gate 14 via the OR gate l6 and the flip-flop 13 and resets the k bit counter 12 to zero, which puts the multiplexer in its inert input state O. The first clock pulse causes the multiplexer 9 to advance from one position, whereby it. is transferred to its input state by the counter 12. The first clock pulse also causes the unit 13 to tilt, which prevents blocking at the input of the AND gate Ik , which allows the pulses of the clock 15 to pass, which is 300 times i-'shneller than the clock 33. Before the second clock, gec sr impuls are 123 impulses of the .. clock 1.5, possibly via the AND element Io in the 16-bit counter meter

509841/088 3

has been introduced. At the end of the 128th pulse, the frequency divider 2o delivers a level 1 to the input 1 of the multiplexer 9, which blocks the AND element Ik by tilting the flip-flop 13 via the OR element 16.

The system remains unchanged until the

9 second clock pulse, which puts the multiplexer in its input state 2. The previous cycle is now repeated. The following information appearing at the element Io corresponds to the reading value of the bit »which follows immediately after the bit with the greatest weight (2nd bit of the first page of the memory ko). The confidential identification number is thus read, translated into a pulse number according to its value, written in stable binary form into the unit 11 and transmitted in parallel to the input 3c of the comparator 3o (compare: FIG. 1). The shift register 17 with serial input and parallel output (FIG. 3) t followed by locks 18 and the OR gate 19 % signals an empty page through a level 1 at the end of the page, ie a page on which all bits contain the information O ₉ so nothing inscribed- i? orden is marked »'This © device for the detection of zero,' sit D2 ₉ is not used foxer'o you will. vi-elsaelhsir in the Saldisr ^ erts 49 ΐ tile i-ieitsr below. h &&'<& iar ± & b®Ti Ί · ι ± τ ~ ύ ₀

- 45 - Reading of the previous loan (compare figure 1)

When a level 1 appears at the output of the comparator 30, it is transmitted by the AND element 85 (the timer 28 has not yet been stopped theoretically), which corresponds to the set input PR of the flip-flop 42. This latter flip-flop goes from level 0 to level 1 at its output, which maintains the operation of the general clock until the end of the operation of the entire distributor. This level 1 is transmitted to an input of the AND gate 87, which makes this gate permeable until the end of operation of the device, the units 50, 51 »49, 47 and consequently 46 and 48 are already reset to 0, as in FIG described above. At the beginning of the cycle of the general clock after the cycle of the identification of the owner of the ring, the information contained in the credit memory 50 is introduced into the balancing unit 49 via the output S of the memory 50 and the coupling 119, according to a method that of reading the confidential identification number during the first clock cycle. The transition of a page of memory 50 on a subsequent page is performed on the Niveeu the memory 5o by a pulse at the beginning of the clock cycle via the LLG-line 161 through the coupling 44. The sum of the values of all previous Kijdite which a in the credit memory in below-described manner have been introduced,

509841/0863

'- 46 -

appears in stable form at the output of the series' balancing unit 49 in binary form. It is made visible on the display device 69 after recoding (not shown), which is familiar to the person skilled in the art. The same remark for an inverse transformation applies to keyboards 31 and 63 in the decimal system. It is noted that during the operation of reading the credit, the serial balancing unit 49 is in the counting position due to a level 1 at its input via the output 0 of the decoder 48 and the element 52 Page that is read in the following clock cycle, an empty page, which is recognized in the series balancing unit 49 by a level 1 that is generated at its output for recognizing a 0, identified by DZ, via the shift register with series input and parallel output (Figure 3 ), the eight locks 18 at the beginning of the second clock cycle by the output T and the NOR gate 19 are activated. This level 1 blocks the clock pulse RG I61 via the output 0 of the monostable rising multivibrator 8l (Figure 1) and the AND gate 82 in such a way that the addressing of the memory 5 ° is maintained and the writing of a new credit, if necessary, requested by the owner of the ring the blank page is enabled.

509841/0863

- 47 registrations; of the new loan

The same level 1 for the detection of zero, which the OR gate I08 passes through, lets the counter 47 advance from one position and sets the multiplexer to its input position 1 and the decoder 48 to its output position 1, which the balancing unit 49 by a level 1 at the other input of the OR gate 52 holds in positive counting position. The same level 1 is applied to the write / read input of the credit memory 5o via the coupling 57, whereby the memory is brought into the write position by suppressing the addressing at the level of the locks 2, opening the reading contacts 3 and the AND element 7. The input of the information in serial form on the cable provided for writing is now effected via the multiplexer 113 (FIG. 1), partly in the direction of the credit store via the coupling 12o, partly in the direction of the serial balancing unit 49 via the multiplexer 46, the multiplexer 113 through the counter 115 ', which in turn is operated by the general clock generator, is controlled. The value of the loan amount is therefore written on the first blank page of the loan memory 5o and the sum? which was previously displayed on the display element t> 9, added via the 16-bit counter extractor of the serial balancing unit 49. The end of the written page is indicated by the

509841/0863

AND gate 59 detected whose two inputs are at this moment at a level 1, the first The input is the output 1 of the decoder 48 and the second input is the output of the highest weight of the Counter 115 via the monostable descending multivibrator 1 ^ o is whose task it is to find the Transition of the counter 115 from the state No. 7 to the state No. O to be detected. When reading and enrolling of the new credit in the memory 5o is finished the corresponding value in a manner not shown by the reader of credit notes 114 through an over the conductor 93 transmitted level at its input E deleted. The output of the AND gate 59 now provides the credit memory and debt memory via the OR element 6o and the coupling 45 back to zero and lets the OR gate Io8 den Step forward counter 47 from one position.

Reading the previous debt

The new position of the counter 47 sets the multiplexer to its input state 2 (reading of the memory 151) s brings the output 2 of the decoder 48 to logic level 1, with the outputs O ₈ -1 and 3 of the decoder 48 the logical level O lies @ n ₉ what-the serial balance work 49 by a Bli ^ sani O at its entrance. C / D in Ahzlehpo 3 it ion brings, you reading the

S03841 / 0883.

previous debt is now effected like the reading in the credit memory 5o via the coupling 122, where the number representing the sum of these debts is taken from the already in binary form in the l6 · bit counter subtractor of the Serxensaldierwerkes 49 is deducted, i.e. from the number which was previously has been displayed on the display org ^ n 5 °. the first empty page of the debt memory is through a level 1 at the output DZ of the Serxensaldierwerkes 49 through the AND gate Io9 is detected. It should be noted that the moment this information appears, the outputs of the Serxensaldierwerkes 49 are in a stable numerical binary state, accordingly the operation:

X »(sum of previous credits) -f (new credit) (sum previous debts)

The value X ist.notwendigerweise posit "v, even if the new loan is zero. If the previous balance and the new loan is zero, obviously the W _e rt X equal to zero, which is a borderline case.

The value of any sum determined for sale by the distributor before the introduction of the ring has been written into the distributor by the owner of this ring on the decimal keyboard 63, is in its binary form Y with X through the binary

509841/0863

- 5ο - ^

same 110 compared. If at output 3 of the Decoder 48 sets a logic level 1, which is caused during the last tilting of the counter 47 by a logic level 1 at the output of the element Io9 through the element Io8, is generated the comparison of X and Y a level 1 at the only output of the comparator Ho if and only if X is greater than Y At this moment, the counter 115 will show the successive input states of the Multiplexer Il6 controls, reset to zero as soon as the counter 47 is determined to its last state has been. The distributor is now in the writing position for a new debt.

Enrollment of the new debt

The multiplexer 46, which is in its input position, is in connection with the fault memory 51 the coupling 124 to write a new debt, the value of which is deducted simultaneously in the same way as before by the serial balancing mechanism 49 and in the Display member 69 is subtracted. It should be noted that the monostable rising multivibrator 81 plays a role for the debt store 51 he plays for the credit memory 5o, i.e. the entry in the memory is carried out on the first blank page,

509841/0863

and not on the following, which is also a blank page. On the other hand, the exit represents 3 of the decoder 48, which is at a logic level 1, the fault memory 51 in write position, during this last phase of the operation of the device via the coupling 123 »where at the end of this Phase a general stop signal caused by toggling the flip-flop 42 is caused by a level at its extinguishing input via the OR gate 86 as a result of the opening of the AND gate 111, which in turn is permeable is made by one. positive pulse at its input derived from the zero output of the monostable falling multivibrator l4o originates in the acts in the same way as at the end of the enrollment new 'credit in the memory 5o. The process of issuing of the banknotes, not shown, takes place at the same time as the inscription of the new debt happens in the debt memory 51, to an amount the sum, the amount of which was previously written into the keyboard 63 in decimal form by the owner of the ring and has been checked as described above.

The coupling with the aid of a transformer for supplying the ring from the specific device is chosen and shown in Figure 1 in such a way that galvanic isolation is ensured. The secondary winding Io5 of the transformer by the windings

509341/0863

and Iö5 is formed during the cooperation, follows a filter Io7 »which supplies a regulated DC supply voltage at its output, the filter is not capacitive because of the reduction in size, the capacity required for a classic filter cannot be made sufficiently small in relation to the other electronic elements. This supply coupling could also be achieved by an optical coupling between a light source in the specific Device is included, and a photocell are realized in the portable object, whereby the desired galvanic isolation is guaranteed in order to avoid any short-circuit that could lead to destruction which could cause memories contained in the ring. It is the same with the other optical ones Couplings chosen for the circulation of information between the device and the ring. The three memories whose function has been described are basically of the same design »When executed

laabesu sie dl © Sigsiiselnaft ₈ aacii

! ZVL "^ ΙΘΧύθΤί \ & XI & SGOlC ILLlSSIl 'S'aiS' 'bS ^'idLtLiiiS'S © S13-3 Ä, G] h GjT

r isi have ₀

5 iTi in · ')

Q in 51 iy ί-ΐ-

Compared to the latter, the advantage is that reading and enrolling are easier and more adaptable designed for the fact that they do not require the close proximity of the reading device. Your addressing is done electronically, with complicated, costly and unreliable electromechanical Devices are replaced by simple conductors, the number of which moreover by the known multiplex method can be reduced. These integrated circuit memories are preferably non-volatile memories used.

The display element 69 is used for simple visualization by means of luminous numbers, but it can also be done by means of a printing unit be replaced, whereby this printing unit can be branched in parallel at its inputs in order to provide the holder, of the ring to give the opportunity to write a document made by the specific device during the above the operation described above to keep.

The method applied to a distributor of banknotes can also be applied directly at a point of sale thereby enabling the owner of the ring to make his purchases without the purchase amount due is paid by cash or check, but only by the fact

509841/0863

that the buyer's ring is charged with the purchase price.

FIG. 4 shows an embodiment of the detector of the unprogrammed section for the case in which the detector is contained in the card 4oo. This embodiment shows a memory 2ol, whose address is controlled by a bolt 2o5. The AND gate 2o2 forms the detector of the empty Address that operates the memory 2o4. This controls the writing element 2o3 and the bolt 2o5 at once

In Figure 5 is another embodiment of the detector of the unprogrammed section for the case in which the detector is in a card 4oo is included.

The memory 2o9, set up for m words with η bits (for example, 256 words of 8 bits) is, from the outside through the conductor bundle 2o7 (in the chosen example 8) over the element 21o (8 Rifgel- or locking units) addressed (see Figure 6 _t in which a special embodiment of a bolt is shown, where E _f S _t £ »represent the input, the output, the charge control). In the empty state, all storage points of this element are at the logical level. This can be an integrated circuit of the

S09841 / 0863

Type 17o2 (Intel), 5203 or 5204 (National Semiconductor) or 7620 (e.g. Harris Semiconductors).

The output of this memory is from a bundle of conductors 222 (here 8 conductors) is formed, which is directed outwards.

The cancellation input 211 allows when it is on logic level 1 is brought to the write operations by increasing the supply voltage of the memory and the connection is released to a level corresponding to the output bit, which is intended for writing will.

When a voltage is applied, the flip-flop RS, which is formed by the elements 217 and 215, is automatically brought to level 1 (conductor 216) due to the capacitor 213t which is connected to the positive terminal of the supply source. This same capacitor calls for a brief moment the conduction of the Riecel 2io and the blocking of the write 212 via the ODEIi element 218

on the iogiscx '■ - "'. ·, '-Λ * :: ngt ■■.;. :: .- · .. α .v _:«. v \ i · i.rt f.; luCf Ni - « au 1 am Aa Ui'ü-Gl I '.-. cl? s 21-i: όΛ, r': atEinax; ~ oi: d ^ n flip-flop el '; - . ·; ' he sent out the -i ^ -ndense.tcr 215

5058 ^ 1/0863

Pulse to level 0.

In relation to the energization of the portable circuit, this has the consequence that the element 21o is locked and the member 212 is opened, which allows writing to this address through the conductor 219.

This state is stable until the next bias voltage is set, ie any change of the address is impossible from now on ₉ since the pulse emitted by the capacitor 213 occurs only once.

If the address displayed when the voltage is applied is already occupied (occurrence of a single zero on the conductor 222), the occurrence of a level 0 at the output of the AND element 214 has no effect on the flip-flop H = S _{9 of} the itself can be set to level 1 by the a'ior 213 »O the occurrence of an I at the output of the OR _{gate 218 prohibits writing o} You addressing is meanwhile Esögliehj where reading of all occupied addresses of the memory is permitted»

Ei © -Greta as Iggjt addressed address lets your flip = flop H = S in CGJi states 0 gc ^ ien, -wo through ά & χ write

Suspending the voltage is prohibited.

If the user desires writing to two consecutive addresses, it is imperative for him necessary to proceed to a de-energization of the device, and then to a new one Applying the voltage.

The device formed in this way can easily be implemented in the form of an integrated monolithic circuit and on a carrier, e.g. a card (e.g. 5x8 cm) be attached with 2o connections:

8 addressing conductors

8 information output ladder

3 supply conductors (general supply of the peripheral circuits VG, supply of the memory VM, ground)

1 writing command leader

When executed in a non-monolithic form, the arrangement of six separate housings can be more integrated Circuits and a capacitor are made, which are connected in a printed circuit, which is the necessary Provides pre-ties and serves as a mechanical support

509841/0863

5 *

The supply of the portable circuit is effected by the conductors 2o8, 22o and 221 ..

The apparatus (transmission device) capable of exchanging data with such a card is shown in brief form in Figure 7, which will now be described. The supply is through the ladder VG 24o and mass 238 caused, as well as by the conductor VM 2o8 during the write phase.

The received data, forwarded over the conductor 224 to the processing element 244, if necessary in terms of their addresses (conveyed by conductor 252, which is connected in parallel to conductor 222 is) "with possible external data that are conveyed via the conductor 248, juxtaposed with the Result of the processing effected write operations 246 (conductors 254, 256, 226) ', registration operations 25o, Display operations 251 and / or output operations 253 as well as verification operations 258 triggers.

The writing element 246 is used to coordinate the various operations required for writing: Increase the voltage VM (special supply source for the programmable memory 2o9) to the level VP, Level 1 on the E-conductor 226, separation of the conductor 22-Ί, then connection to a conductor corresponding to the "conductor"

609841/0

Level to be written.

The addressing element 242 is vortex-like a binary counter modulo η 257, which is able to use the memory at its successive addresses to address and so the writing to the first empty available address thanks to the NICIIT-AND gate 26o des AND gate with three inputs 262 and the clock 265 (Figure 8) to enable.

The NAND gate 260 is used for the processing element 244 to indicate that the activated at that moment Address is empty. This element 260 could be omitted if an automatic reset to zero des Counter 257 is provided when power is applied to the apparatus.

In the case of a 16 kBit memory (I365 pages with 12 bits) a total of 27 connection points are required for the circuit, which could appear forbidden. In order to reduce the number of connections, the input and output can be multiplied and / or a basic memory can be used which is set up for words with one bit, as described below in connection with FIG. that for mn words with a Γ-. '"- aiii j = :: ic'; t * T- i.st. 5. e .bi 1 d r- 1 n«: i sitssn. Pi \? rrSx memory «

f'ii '"* Gr ·; -:! ri" j. & ^! 'K'i-r ii. ν% iv - <- ■■ '.' II ^s "--Λ is, with η the ■ - ■ -! <- -" ■ "· - ■ -" - "- - '' ~ <ϊ '? -''■:' ■ '- ■ '- ^r ~ ■.' ■ '. - ■' ■ ii ^] . '. ■ ..'. _:; -. '.: i' ■■■.: ■ - .. ·, fct-.r ciitJalv the

different circuits of the required multiplication! but also write circuits that allow the storage of a selected bit (one of the eight bits of one of the 256 "pages") by simple logical Control on a single write input.

The writing of such a programmable memory is generally effected in several steps. A Example of a cycle is the following

1. Addressing a selected word

2. Separation of the output stages of the memory

3. Increase in the supply voltage of the memory

'· The right value'

.4. Connection to a predetermined voltage of the bits intended for writing (replacement of the initial state by a state Ö).

This localization often corresponds to a memory output, a so-called "open collector" _{or the like}

Ώ> ± ® Ge sannt la, © it. This Operatiesaarü WMB> often Selir below are bewirfst Bs' = FINISH different Ssi ^ konstasaten "

609841/0863

The memory Io2 (e.g. of the type 7620 Harris) is connected to its return resistors 338 to 3 ^ 5 as well as with eight NOT AND power elements 3o4 to 311 with open collector. One input of each of the eight elements is connected to point D of the memory (control the separation of the output stages). The supply input of the memory to which each of the return resistors is connected, a branch is made at output 352 electronic commutator. This consists of transistors 33 ^ and 336 as well as the inverter 3 ^ 7 · When one is applied logic level 0 on conductor 350., the transistor is blocked, while the inverter 3 ^ 7 the transistor 334t activated, the connection of the point 3Γ2 with the general supply VG is established. In contrast, if a level 1 is concerned, point 352 connected to the write supply VG.

The clock device 126 and the elements 3 ^ 8 and 3 <> 3 ensure the correct time sequence of the successive commands which correspond to the write operation.

The latch 332 serves to hold the address (generated by a level O ₁ by the inverter 328) on its latch input 356 during a write operation.

11 address weights are required when "βin memory

5098Λ 1/0863

of 256 χ 8 bits in the form of a memory of 2048 χ 1 bit is used, with the eight more important weights addressing the actual memory ("pages") and the read multiplexer 322 for three less significant weights and control write demultiplexer 32o.

If the address is selected to 11 bits, a positive write command on conductor 33 ° locks element 332, while successively separating the memory (conductor 360) _f increasing the supply voltage (conductor 35o) and placing the second input of the selected NOT -AND gate 3o4 to 3II through conductor 362, allowing conduction of demultiplexer 32o,

be ordered.
V

The addressing process is the same for reading, via multiplexer 322 which connects output conductor 366 controls.

Di · Inverter with high input threshold 312 to 319 serve to isolate the multiplexer 322 and the EITHER-OR gate 324 during the write phase.

Daa EITHER-OR element with eight inputs 324 detected in the form of level 1 on conductor 37o, a completely blank page of eight bits.

509841/0863

The grid can be shown schematically in Figure Io Way to be illustrated. It has 17 access connections:

11 address weights (A _Q - A ^)

3 supply points VP-VG-Masse 2 outputs: S (bit) and AV (display of a blank page) 1 write control E.

An exemplary embodiment of the clock circuit 326 is shown in FIG. It essentially has three Flip-flops R-S 373, 374 and 375, one after the other actuated by four delay lines 376 - 377 - 378 will. The inverter 372 gives the command of the end of writing.

A simple modification of the circuit would make it possible to equip this grid with any memory! alive, dead, programmable, or "programmable / reprogrammable". These modifications are familiar to the person skilled in the art.

FIG. 12 shows another exemplary embodiment of the blocking means (of the detector of the unprogrammed section) for the case in which the memory is set up for mn words with one bit (e.g. 2ok & words with one bit). In this embodiment the detector is contained in the card 400.

509841/086 3

The element 5ΐδ represents a grid that, around the actual memory, which includes various circuits required for the write operation. These® circuits are supplied by a single positive command via conductor 5 <> 3 is activated.

The clock generator 5o2 successively positions the various addresses of the memory via the counter / extractor 512, the bolt 5l4t and the elements 5o4 5o6-5o8. The shift register 53 ° converts the information emerging one after the other from the memory into parallel representations of 8 bits. The divider 536 by eight gives a test command of the contents of the register 53® every eight clock pulses. This command is transmitted via the capacitor 538 and the OR gate 5 ^ o to the latch 523, which is connected to the output of the AND gate 525 with eight inputs. If the output of this element is at level 0 (occupied page), addressing is continued. If the output of the latch 523 is at level 1 (completely empty page), the reverse input of the AND gate 5ok interrupts the arrival of the clock pulses, sets the counter / extractor 512 in the extraction position and opens the AND gate 52o, which in turn controls the from the clock 5 © 2 coming impulses can pass into the member 5o6.

509841/08 6 3

-ft-

The counter / extractor starts again from the beginning up to the eighth pulse of this sequence (detected by the Divider 526 one by eight) the by turning the flip-flop R-S, formed by EITHER-OR gates 522 and 524, lets tilt, the link 52o closes what the Clock generator 5o2 is out of operation.

From now on, the memory is located at the first empty address that follows a written page. From now on, writing is permitted via elements 528 and 5291, which in each case transmit the write command, which is forwarded from the outside via the conductor 531, and the addressing bit for bit, which from the outside forwarded via the conductor 533 via the links 5o6 and 5 © 8 is, allow. The links 5o8 and 51o as well as the Inverters 51 & are used to lock the address and, record the status of the address counter during the write pulses.

The capacitor 5 ^ 2 allows the emission of a single Pulse that resets all series elements of the device to 0 when voltage is applied.

The flip-flop R-S 5 ^ 8 - 55o is finally reset to zero through the transition of the counter / extractor 512 in maximum counting position CM (ladder 5 ^ 6), creating a stable Level 0 is generated on conductor 552, with the result that addressing member 529 is closed.

509841/0863

This device prevents an impostor from being able to return to an occupied address by using the addressing input 533 bit for bit beyond the nominal capacity of the counter.

From the moment the voltage is applied, the device brings all the information it has in memory onto conductor 517 "then adjusts itself to the first address of the first blank page, necessarily decreasing writing position due to link 560," whose reverse input forces the "rising / falling" command of the counter vox to zero at the end of the sequence of eight falling pulses.

The synchronization pulses are transmitted to the outside by the Transfer conductor 5o9.

It follows from this that the clock generator 502 could also be arranged outside the device. In this case, the conductor 5 ° 9 would serve to synchronize the grid from the outside, and would have to match point 5 ^! t ^ be connected.

This card requires only six connection points to be well connected to the environment.

The possible review of the write process is at the end

509841/0863

the operation by briefly interrupting the supply, Reading the new contents of the memory and comparing with the old, previously recorded contents and / or effected with the likewise stored write message.

The divider 55 ** one by eight as well as the flip-flop 558 allow the address pulse bit to be limited for bit according to the write process to eight. Under the same application of voltage to the portable circuit is thus just a write operation on the first blank page (a word of eight bits) of the memory 516 possible.

It is now beschrioben Figure 13 _t in which another embodiment of the Einschreibesperrmittel (the detector of the unprogr aminated s section) is illustrated for the case, i? I where the memory grid having the form described in conjunction with FIG. 9 In this embodiment the detector is arranged on the card 400. The memory 57o used is for multi-bit words, 25.B. 256 χ 8 bits set up. It includes its own multiplex write and read circuits. A link connected to its eight parallel outputs (Figure 9) enables the detection of an empty page (application of a level to all inputs and consequently to its output)

509841/0863

but the addressing is still effected by addresses of one bit.

The first page (eight first bits) is mandatory (equivalent of at least one zero bit).

After the voltage has been applied, the ^ iegel 57Ö arises fixed at level 0 (first occupied address), whereby the gate 573 is opened by the inverter 579, that the pulses coming from the clock 57 '* happen leaves.

The counter 571 now addresses the memory (by words of one bit), while the divider 575 by one eight the latch 578 via the link 576 and the capacitor 577 signaled the page changes.

On the first blank page there will be a level 1 at the exit of the latch close member 573 and open write member 580. The addressing can now from the outside via the conductor 583 through the member 572 bit for bit, while the write pulses from outside can also be conveyed via the conductor 58I.

The output of the information is via the conductor 5ß2 while the external synchronization is passed through conductor 584.

509841/0863

(Λ

If the memory has only occupied pages, the addressing continues indefinitely while the user is informed of the state of the device.

The flip-flop 586-587, which is connected to the output CM 583 of the counter 571 is connected, the closing of the addressing member 580 allows bit for bit, beyond the nominal capacity of the meter.

The capacitor 588 sends _{a single pulse to the conductor R 1} which resets all series elements of the portable circuit to zero at the moment the voltage is applied.

A card designed in this way can represent an advantageous embodiment of a semiconductor register. When it comes to a memory of the programmable / reprogrammable Type (electrical or optical extinction), they would e.g. with · a cash register connected to the point of sale, a registration according to the number of times the device is switched on, with words of one hundred bits for example the Represent the buyer's account number (84 bits) and the purchase price (16 bits).

A card with e.g. 16 storage of 20'18 bits would

509841/0863

TO

therefore enable registration of 327 purchases, which, for example, represents 6 operating days of a 9-hour cash register with a purchase every Io minutes.

If this card regularly to the bank to collect the information, delete and replace with one empty card is brought, this card plays the possible role of connection between a collecting facility the data (point of sale) and the processing facility (bank).

In another area of use (acquisition of alphanumeric data) this card could be the equivalent register from about 9o typewriter pages (In the case of an individual health book or an ID card or an identity certificate).

In the following the figure l '± is described in which shows an embodiment of the locking means which are intended to allow the modification of the content of the sections coded as prohibited to forbid. The blocking means are contained on a card 'i.oo.

The memory 6ol is set up for words of 9 bits, e.g. 256 χ 9 bits. All storage locations are empty at level 1. The bank account number that

S09841 / 0863

ζ.Bi consists of 21 digits, i.e. 8k bits, is divided into eleven words with 8 bits, each word being followed by a bit B_ with the value zero. The initial write takes place from B ₁ - B _Q for each of the eleven pages occupied by the account number in such a way that the destruction of the ninth bit prohibits the write operation only after this * has been effected. The write element 6o2, which may have to be able to hold an increased voltage at its input, controls the separation input 606 of the memory (often identified in technical literature with CS, E or ME). This is addressed by the conductor bundle 6o4 (8 conductors in the example given), while the eight input / output bits are available at the point. The command is given on conductor 6o7.

This embodiment has the advantage of optionally make any address irreversible with eight bits of memory. However, it has the disadvantage of being a considerable Number of connection points to be required on the outside (21 in the example shown), as well as a device with diodes 608, which prevents the link 6o2 from outside « is made conductive.

It is possible to reduce the number of these connections

509841/0 86

decorate by using a memory designed for words with one bit in a circuit, as shown in Figure 15 and in the following is described.

In Figure 15 is a further embodiment of the locking means which are intended to allow the modification of the content of the sections coded as forbidden to forbid. The blocking means are contained on a card 4oo.

The address conductors 613 of the memory 6o9 (set up for 2o48 words with one bit) also control the parallel comparators with 11 bits 6II and 612, which are connected at their second output to two connection networks, whereby they are connected to coding elements A and B in this way are that diode matrices, dead memories or simple connection points determine the numerical forbidden "window ¹¹ (in other words the addresses of the sections coded as forbidden). The comparisons allow the opening of the link 6l4. Writing can be forbidden due to the reverse input of the link 6I0 , which is connected to the output of the link 6l4k.

It should be noted that if the constitutes the lower limit

509841/0863

Address of the memory corresponds to the first address of the memory, the comparisons 6l2 and the corresponding coding element can be omitted.

In order to guarantee the initial registration of the account number, it is necessary that the receipt 615 of the link 6l4 during the manufacture of the Integrated Schaltimg is blocked and then finally (logical level l) is opened after the introduction. This is done by activating circuit 617 which is controlled from the outside at point 618 only once in the life of the card.

An embodiment of the activating circuit 617 is described below with reference to FIG described, which is able in its final form for the life of the semiconductor under consideration Store impulse of the correct amount and duration.

Such a circuit can consist of a transistor 62o connected in series with a fuse element 621. is switched. An inverter 622 forms the output of the element at the junction of the transistor and the backup. A diode 623 is interposed so as to prevent that during the annihilation process (which is generally done with the help of an impulse

509841/0863

of the value VB, which is above the general supply VG of the circuits, is effected) current in the direction of the inverter flows.

In addition, there is a resistance “62 * t between the Input of the inverter and the positive terminal of the supply VG arranged. This is where the Input of the inverter to ground potential (permeable diode) if the fuse is intact, whereby the The output of the inverter is therefore at level 1.

If the fuse is blown, the output of the inverter is connected to the positive terminal of the supply is, the exit is at a level. Before the annihilation order is given, is at the exit of the inverter 61 has a level 0, which allows the write operation. If this is done, complete a level of sufficient duration on the control 6l8 the final switching of the element 6l7, whereby the member 6l4 is unlocked will.

If you wish to reduce the number of connection points, it is imperative to add the To deliver addresses in serial form: be it through a shift register, be it through a counter. The counter has the advantage of providing the device with an operation on a predetermined address sequence

& 09841/0863

is justified (from address no. O to address 2o47) which is not the case in the case of a shift register. Moreover, the complexity of its integration is less than that of the shift register, so that the counter (asynchronous, increasing) is brought forward.

In Figure 17, an embodiment of the locking means is shown, intended to prevent the modification of the content of the sections coded as prohibited in the event a Speüier equipped with a counter 626 serve. The blocking means are included on the 4oo card. This embodiment also has the memory 9 (set up for 2048 words with one bit) and the write element 6I0 a decoder gate circuit 629 »starting capacitors 627 and 633, one of EITHER-OR gates 31 and 32 formed flip-flop R-S and an activation circuit on. The pre-decoding circuit 629 is coded to output the upper address y the sections ο - y coded as prohibited (address no. 83 in the example under consideration) or the bank account number which contains 21 digits, i.e. 84 bits, which occupy the first 84 addresses of the memory. After creating the voltage (the element 6l7 is activated), the output of the flip-flop is in stable form on the logical State 1 on, because of the (only) pulse generated by the capacitor (> 33 aubgosaiulten pulse. The output of the element 6l7

509841/0863

as well as the Elentes 629 is at a low level ■ because of the automatic setting to zero, which is arranged by the capacitor 627 of the counter 626. The, element 6I0 is consequently in . stable shape closed.

As soon as 84 clock pulses on the serial addressing conductor 3o have been received, the output of the decoder 629 sets itself to the level 1, whereby the output of the flip-flop is forced to zero, which causes the opening of the write member.

The address range 0 - 83 is therefore protected in general from the write process, since the "maximum count" output of the counter systematically resets the flip-flop to 1 at the moment the counter the address 0 is reached by exceeding its capacity, the initial write process is made possible by this that a level 1 is originally present at the output of the element, which forces the flip-flop to 0 in a stable form. After the initial write has been made and verified, a logical command 1 allows the Conductor 618 which is maintained for a sufficient duration in relation to the properties of the element 617 is obtained, the final oscillation of the flip-flop, i.e. the final irreversibility of the initial input

£ 09841/0863

Spellings.

The embodiment shown in Figure 17 can can be used in particular to create a payment card that is coded as forbidden in their memory Sections contains with:

Addresses 0 to k3 '. personal authorization code

Addresses 50 to 133: account number

Addresses 13 ^ to 233 ^: name of the user

Addresses 23'i to 273 ^: Serion number of the card.

In the example shown with a storage tank with 2o48 Bits remain 177 ^ e bits available to financial Save operations, e.g .:

Balance amount: 12 bits
Date: 16 bits
Valid bit: 1 bit

Thus 61 operations with 29 bits can be stored when the registration of the date is not important and if Io bits are enough to represent the balance. 16l operations with 11 bits can be stored in the memory of the payment card be registered.

50 9 841/0863

The "modified scheme of FIG. 18 represents an embodiment which allows the dimensioning of the lower limit χ of the numerical forbidden "window" to a value other than zero χ e.g. 0 <ix <"y <" 2O47 permitted. The elements already described have, with reference to the preceding figures the same reference numerals.

This embodiment has a second address decoder 64l, a second flip-flop 634-635 with, «a starting capacitor 636, a decoder 637t which is formed from an "OR exclusive" element and an OR element 638:

The decoder 637, in conjunction with the other decoders 64l, 639 and associated circuits the following sequential function:

0 <A < χ: writing possible
x <A <y: writing prohibited
y <A <20'i7: writing possible

(A is the address present on the parallel outputs of counter 626).

In Figure 19 is an embodiment of a locking means shown, which is particularly true to reading

509841/0883

Prohibit the contents of different sections (or zones) of memory. The locking means are on the card 4oo arranged. The information contained in this zone never leaves the card 4oo: them are intended to be processed inside the card by a processing means 646. At the in The embodiment shown in FIG. 19 is the zone o-x prohibited for reading. The zone o-y is forbidden for writing '. The locking means of the writing means are already has been described in connection with FIG. These means are not described again, they carry them same reference numerals.

The decoder 64o, the flip-flop 641-642, the starting capacitor 643 "the output element 644" form the essentials Elements of the locking means of the reading means. When the gate 644 is closed, the memory of the card This does not leave the information contained and the reading means that are outside the card, in particular in the specific device are arranged.

The confidential ones contained in zone 0-x of the store Information can be used, for example, to use the words intended for writing in the memory of the special processing means 646 in the following way: these ports occur in their initial coding through write input 647 and be on the conductor 649 in the new word forbidden for reading

509341/0863

correct code submitted.

A commutator element 648 actuated by the write command input 650 allows the proper Handling of the actual electrical write operations, in which the circuits with 's'wächer Power can be isolated during the write phase.

The activation circuit 617 allows while it is in the initial state, writing and reading of all sections of memory.

S09841 / 0863

Claims (1)

PATENT CLAIMS Iy system for storing data, characterized by at least one portable, independent electronic object, by at least one transmission device, wherein the portable object at least one memory intended for storing data in an easily transportable form, externally accessible, a temporary link between the portable object and the specific one Device allowing coupling means and arranged between the coupling means and the memory Having control circuits for the memory, the memory and the control circuits in FIG logic microswitch design are carried out, and wherein the transmission device means for transmission of data in the memory of the portable object, and by means for locking the transmission means that prohibit the transmission of the contents of certain sections of the memory. 2. System according to claim 1, characterized in that the locking means are arranged in the portable object and are connected to the control circuits of the memory. 509841/0863 3. System according to claim 1 or 2, characterized in that that the portable object is not powered and · the memory of the portable object is a dead memory. 4. System according to claim 3 »characterized in that the dead memory is a semiconductor memory. 5. System according to one of claims 3 or 4, characterized characterized in that the memory is a programmable dead memory. 6. System according to one of claims 3 or 4, characterized characterized in that the memory is a reprogrammable Dead memory is. 7 «System according to one of claims 5 or 6, characterized characterized in that the memory is arranged inaccessibly inside the portable object. 8. System according to one of claims 1 to 7 for unification and storage of data with different geographical origins on a portable carrier, wherein the transmission means means for writing data into the memory of the portable object have, characterized in that with the 509841/0863 - JBST- Control circuits in cooperation memory of the portable object from a There is a multitude of different sections that each take up a word. 9- system according to claim 8 ,. characterized in that the locking means includes an unprogrammed detector Have sections of the memory, which the activation of the writing means at already programmed sections are prohibited and the activation of the means of registration for unprogrammed sections Sections allowed so that a new size is written into these sections. 10. System according to claim 9 »characterized in that that the detector arranged in the transmission device of the unprogrammed memory sections a shift register connected to a latch for converting the content of each memory section in .Paralleldarstellung and one arranged between the parallel outputs of the bolt Member that allows the activation of the enrollment means. 11. System according to claim 9, characterized in that the detector arranged in the portable object 609841/0863 SI of the unprogrammed memory sections first element for the parallel recording of the content of the memory section under consideration. , a second Link for writing authorization, which is activated by the first link when the section in question does not contain any size, the second term being the Writing means actuated, and a memory circuit between the first and second members, the for storing the active state of the first member at least for the duration of an on-S honor i-cycle best imint: i κ t. 12. System according to claim 11, characterized in that the detector of the unprograraraierteri memory sections also one in the adrossing circuit of the memory, which is actuated by the first member via the memory circuit, has switched-on latch, wherein the crucible is intended to hold the address of the unprogrammed To record memory absenteeism at least for the duration of a write cycle. 13 · System according to claim 12, characterized in that the memory circuit is a flip-flop, the is activated when the portable object is energized. 609841/0863 l4. System according to claim 19 »in which the memory consists of mn words with one bit and bit for Bit is addressed by a clock generator via a counter extractor, using a shift register converts the η bits of a section into parallel representation, characterized in that the in the detector of the unprogrammed memory sections arranged on the portable object is a first element for the parallel recording of the content of the section under consideration, the first link then, if the section is not large, it blocks addressing by a second link, the counter-picker brings into the peeling position, the peeling is actuated up to the η-th pulse in such a way that the Memory at the address of the first unprogrammed part Section and writing is permitted bit by bit at the end of the subtraction. 15 · System according to claim Ik , characterized in that the first element actuates the withdrawal up to the η-th pulse with the aid of a divider by one by η and a flip-flop designed to hold the withdrawal when the n-th pulse occurs. l6. System according to one of Claims Ik or 15t, characterized in that the first link comprises the other elements 509841/0863 the detector of the unprogrammed sections : with the help of a bolt, the actuates for all η addressing pulses by means of a part one through η is made permeable. 17. System according to one of claims l4, 15 or l6, characterized in that the counter extractor has a maximum count output associated with With the help of a flip-flop, a member inserted in the addressing circuit closes. 18. The system of claim 9i, wherein the memory off m sections with η bits and addressed bit by bit with the help of an electronic circuit which consists of a clock operated counter and a raster memory, thereby characterized in that the detector arranged in the transportable object is not programmed Sections a link for the parallel inclusion of the contents of a viewed section and an in ac row with the link connected bolt, whereby the bolt in its all η addressing pulses with the help of a part one through η let through State is operated and the member then activates the enrollment means by means of the latch permitted if the section under consideration does not contain any size. 509841/0863 .tr 19. System according to claim l8, characterized in that that the raster memory is a memory consisting of m sections with η bits, its read and write outputs are connected to a read multiplexer and a write demultiplexer, an addressing circuit and a latch inserted in the addressing circuit operated by the writing means, wherein part of the conductors of the addressing circuit that emerge from the bolt, directly with the actual Memory and another part of the conductors of the addressing circuit that come out of the bolt with the Read multiplexer and the write demultiplexer connected is. 20. System according to one of claims 1 to 7, characterized in that that the blocking means comprises a coding means of the predetermined prohibited sections and a detection means which have sections coded as prohibited, which prohibits the activation of the transmission means danii, if the considered section is coded as forbidden and the activation of the transmission means then permitted if the section under consideration is not coded as forbidden. 21. System according to claim 2o, characterized in that the Coding and detection means in the portable object 509841/0863 are incorporated. 22. System according to claim 21, characterized in that incorporating the coding and detector means into the portable object in a manner inaccessible from the outside are. 23 «System according to one of claims 21 or 22, in which the Memory consists of words with nDits and input-output circuits for reading and writing with η conductors characterized in that the coding means consist of one of the bits of the word with η bits and that the detector means with the conductor of the input-output circuit are connected, which corresponds to the coding bit. 2k, system according to claim 23, characterized in that the coding means consists of the η-th bit of the word. 25 system according to one of claims 23 or 24, characterized in that that the detector means consists of a member for writing authorization. 26. System according to one of claims 21 or 22, characterized in that that the detector means consists of at least one address comparator, which is located between the addressing 609841/0863 it circuit of the memory and the coding means inserted is, the comparator then deactivates a member for write authorization when the address in question is an address coded as forbidden. 27 · System according to Claim 26, characterized in that the comparator uses the element for writing authorization of another member is deactivated, its state finally being permeable due to irreversible modification an activation circuit connected to the input of this other element can be maintained. 28. System according to one of claims 2o, 21 or 22, characterized characterized in that the detector and coding means consist of at least one decoding element which is associated with the Addressing circuit of the memory is connected and ztyu Proof of the border address of the prohibited sections is coded. 29 · System according to Claim 28, characterized in that the decoder has a member for writing authorization with the aid operated by a flip-flop. 3o. System according to Claim 2§ _%, characterized in that the state of the flip-flop is, if desired, by irreversible modification of an activation connected to the flip-flop. S09841 / 0863 circuit is determined. 31. The system of claim 2o, wherein the transmission device Contains reading means and the blocking means of the reading means prohibit reading of the sections coded as prohibited, characterized in that the portable object has processing means associated with the control circuitry of the memory and intended to store the data contained in the sections forbidden to read inside the card to process. 32. System according to one of claims 1 to 31 for processing of data obtained from the portable object, characterized in that the specific device has reading means for the content of the data of the portable object and processing means for processing data on the one hand contained in the card and, on the other hand, delivered directly to the specific device. 33 · System according to claim 32 for controlling a device as a function of the processed data, characterized in that the specific device comprises control means which operated by the processing means and controlling the device. 509841/0863 3k. System according to one of Claims 32 or 33 for storing the processed data by the specific device after processing, characterized in that the processing means are connected to the recording means. 35. System according to one of claims 32, 33 or. 3k for the personal and confidential processing of the data originating from the portable object, characterized in that the electronic portable object contains a further memory which contains once finally programmed identification data, and in that the specific device contains an identification hyperlink which contains the identification data contained in the other memory compares with a quantity introduced into the specific device by the holder of the portable object and, if the data to be compared match, allows the other means of the specific device to be started. 36. System according to one of claims 32, 331 3k or 35, characterized in that the memory of the portable object has two sub-units of different register sections and the data processing devices have a balancing unit which is intended to add up the data contained in each of the sub-units and, if necessary, to carry out the data supplied directly to the specific device and then to form the difference between the summons contained therein. S09841 / U863 37. System according to one of claims 32, 33, 3 '±, 35 or 36 to make the data contained in the memory of the portable object visible, characterized in that the specific device includes a visualization unit. 38. System according to claim 3 £ | characterized in that the Verarbextmittel are connected to pressure means. 609841/0863