DE2961954D1 - Semiconductor integrated memory circuit - Google Patents

Semiconductor integrated memory circuit

Info

Publication number
DE2961954D1
DE2961954D1 DE7979301092T DE2961954T DE2961954D1 DE 2961954 D1 DE2961954 D1 DE 2961954D1 DE 7979301092 T DE7979301092 T DE 7979301092T DE 2961954 T DE2961954 T DE 2961954T DE 2961954 D1 DE2961954 D1 DE 2961954D1
Authority
DE
Germany
Prior art keywords
semiconductor integrated
memory circuit
integrated memory
circuit
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979301092T
Other languages
English (en)
Inventor
Masao Suzuki
Toshio Hayashi
Kuniyasu Kawarada
Kazuhiro Toyoda
Chikai Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE2961954D1 publication Critical patent/DE2961954D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/10—SRAM devices comprising bipolar components
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
DE7979301092T 1978-06-14 1979-06-08 Semiconductor integrated memory circuit Expired DE2961954D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53071666A JPS5826179B2 (ja) 1978-06-14 1978-06-14 半導体集積回路装置

Publications (1)

Publication Number Publication Date
DE2961954D1 true DE2961954D1 (en) 1982-03-11

Family

ID=13467142

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979301092T Expired DE2961954D1 (en) 1978-06-14 1979-06-08 Semiconductor integrated memory circuit

Country Status (4)

Country Link
US (1) US4231108A (de)
EP (1) EP0006702B1 (de)
JP (1) JPS5826179B2 (de)
DE (1) DE2961954D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842556B2 (ja) * 1979-08-30 1983-09-20 富士通株式会社 半導体記憶装置
DE2944141A1 (de) * 1979-11-02 1981-05-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte speicheranordnung
JP2626160B2 (ja) * 1990-04-27 1997-07-02 日本電気株式会社 半導体メモリ
US9025398B2 (en) 2012-10-12 2015-05-05 Micron Technology, Inc. Metallization scheme for integrated circuit
US9190144B2 (en) 2012-10-12 2015-11-17 Micron Technology, Inc. Memory device architecture
US8891280B2 (en) 2012-10-12 2014-11-18 Micron Technology, Inc. Interconnection for memory electrodes
US9224635B2 (en) 2013-02-26 2015-12-29 Micron Technology, Inc. Connections for memory electrode lines
US10074693B2 (en) 2015-03-03 2018-09-11 Micron Technology, Inc Connections for memory electrode lines
JP6708158B2 (ja) 2017-04-14 2020-06-10 信越化学工業株式会社 粘着剤組成物およびこの組成物を用いてなるフィルム

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3815106A (en) * 1972-05-11 1974-06-04 S Wiedmann Flip-flop memory cell arrangement
US3959781A (en) * 1974-11-04 1976-05-25 Intel Corporation Semiconductor random access memory
DE2700587A1 (de) * 1976-01-15 1977-07-21 Itt Ind Gmbh Deutsche Monolithisch integrierte i hoch 2 l-speicherzelle

Also Published As

Publication number Publication date
JPS54162981A (en) 1979-12-25
US4231108A (en) 1980-10-28
EP0006702A1 (de) 1980-01-09
JPS5826179B2 (ja) 1983-06-01
EP0006702B1 (de) 1982-01-27

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU LTD., KAWASAKI, KANAGAWA, JP NIPPON TELEGR