DE2964943D1 - Semiconductor integrated memory circuit - Google Patents

Semiconductor integrated memory circuit

Info

Publication number
DE2964943D1
DE2964943D1 DE7979300757T DE2964943T DE2964943D1 DE 2964943 D1 DE2964943 D1 DE 2964943D1 DE 7979300757 T DE7979300757 T DE 7979300757T DE 2964943 T DE2964943 T DE 2964943T DE 2964943 D1 DE2964943 D1 DE 2964943D1
Authority
DE
Germany
Prior art keywords
semiconductor integrated
memory circuit
integrated memory
circuit
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979300757T
Other languages
English (en)
Inventor
Kuniyasu Kawarada
Chikai Ono
Masao Suzuki
Kazuhiro Toyoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP5600778A external-priority patent/JPS54147741A/ja
Priority claimed from JP2498379A external-priority patent/JPS55117269A/ja
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE2964943D1 publication Critical patent/DE2964943D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/10SRAM devices comprising bipolar components
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
DE7979300757T 1978-05-11 1979-05-02 Semiconductor integrated memory circuit Expired DE2964943D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP5600778A JPS54147741A (en) 1978-05-11 1978-05-11 Semiconductor integrated circuit unit
JP2498379A JPS55117269A (en) 1979-03-02 1979-03-02 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
DE2964943D1 true DE2964943D1 (en) 1983-04-07

Family

ID=26362583

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979300757T Expired DE2964943D1 (en) 1978-05-11 1979-05-02 Semiconductor integrated memory circuit

Country Status (3)

Country Link
US (1) US4228525A (de)
EP (1) EP0005601B1 (de)
DE (1) DE2964943D1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4366554A (en) * 1978-10-03 1982-12-28 Tokyo Shibaura Denki Kabushiki Kaisha I2 L Memory device
JPS5562586A (en) * 1978-10-30 1980-05-12 Fujitsu Ltd Semiconductor memory device
EP0013099B1 (de) * 1978-12-23 1982-02-10 Fujitsu Limited Vorrichtung mit integrierter Halbleiterschaltung mit einem, eine Vielheit von Lasten speisenden, Referenzspannungsgenerator
DE3070152D1 (en) * 1979-07-26 1985-03-28 Fujitsu Ltd Semiconductor memory device including integrated injection logic memory cells
JPS5842556B2 (ja) * 1979-08-30 1983-09-20 富士通株式会社 半導体記憶装置
DE2944141A1 (de) * 1979-11-02 1981-05-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte speicheranordnung
DE3071976D1 (en) * 1979-11-28 1987-07-02 Fujitsu Ltd Semiconductor memory circuit device
JPS56163585A (en) * 1980-05-17 1981-12-16 Semiconductor Res Found Semiconductor memory
JPS61123168A (ja) * 1984-11-20 1986-06-11 Fujitsu Ltd 半導体記憶装置
US4813017A (en) * 1985-10-28 1989-03-14 International Business Machines Corportion Semiconductor memory device and array
US5020027A (en) * 1990-04-06 1991-05-28 International Business Machines Corporation Memory cell with active write load
US5040145A (en) * 1990-04-06 1991-08-13 International Business Machines Corporation Memory cell with active write load
KR102126967B1 (ko) * 2013-10-11 2020-07-08 삼성전자주식회사 메모리 소자 및 그 제조 방법

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3959781A (en) * 1974-11-04 1976-05-25 Intel Corporation Semiconductor random access memory

Also Published As

Publication number Publication date
US4228525A (en) 1980-10-14
EP0005601A1 (de) 1979-11-28
EP0005601B1 (de) 1983-03-02

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: NIPPON TELEGRAPH AND TELEPHONE CORP., TOKIO/TOKYO,