DE2964943D1 - Semiconductor integrated memory circuit - Google Patents
Semiconductor integrated memory circuitInfo
- Publication number
- DE2964943D1 DE2964943D1 DE7979300757T DE2964943T DE2964943D1 DE 2964943 D1 DE2964943 D1 DE 2964943D1 DE 7979300757 T DE7979300757 T DE 7979300757T DE 2964943 T DE2964943 T DE 2964943T DE 2964943 D1 DE2964943 D1 DE 2964943D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor integrated
- memory circuit
- integrated memory
- circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/10—SRAM devices comprising bipolar components
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5600778A JPS54147741A (en) | 1978-05-11 | 1978-05-11 | Semiconductor integrated circuit unit |
JP2498379A JPS55117269A (en) | 1979-03-02 | 1979-03-02 | Semiconductor integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
DE2964943D1 true DE2964943D1 (en) | 1983-04-07 |
Family
ID=26362583
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE7979300757T Expired DE2964943D1 (en) | 1978-05-11 | 1979-05-02 | Semiconductor integrated memory circuit |
Country Status (3)
Country | Link |
---|---|
US (1) | US4228525A (de) |
EP (1) | EP0005601B1 (de) |
DE (1) | DE2964943D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4366554A (en) * | 1978-10-03 | 1982-12-28 | Tokyo Shibaura Denki Kabushiki Kaisha | I2 L Memory device |
JPS5562586A (en) * | 1978-10-30 | 1980-05-12 | Fujitsu Ltd | Semiconductor memory device |
EP0013099B1 (de) * | 1978-12-23 | 1982-02-10 | Fujitsu Limited | Vorrichtung mit integrierter Halbleiterschaltung mit einem, eine Vielheit von Lasten speisenden, Referenzspannungsgenerator |
DE3070152D1 (en) * | 1979-07-26 | 1985-03-28 | Fujitsu Ltd | Semiconductor memory device including integrated injection logic memory cells |
JPS5842556B2 (ja) * | 1979-08-30 | 1983-09-20 | 富士通株式会社 | 半導体記憶装置 |
DE2944141A1 (de) * | 1979-11-02 | 1981-05-14 | Ibm Deutschland Gmbh, 7000 Stuttgart | Monolithisch integrierte speicheranordnung |
DE3071976D1 (en) * | 1979-11-28 | 1987-07-02 | Fujitsu Ltd | Semiconductor memory circuit device |
JPS56163585A (en) * | 1980-05-17 | 1981-12-16 | Semiconductor Res Found | Semiconductor memory |
JPS61123168A (ja) * | 1984-11-20 | 1986-06-11 | Fujitsu Ltd | 半導体記憶装置 |
US4813017A (en) * | 1985-10-28 | 1989-03-14 | International Business Machines Corportion | Semiconductor memory device and array |
US5020027A (en) * | 1990-04-06 | 1991-05-28 | International Business Machines Corporation | Memory cell with active write load |
US5040145A (en) * | 1990-04-06 | 1991-08-13 | International Business Machines Corporation | Memory cell with active write load |
KR102126967B1 (ko) * | 2013-10-11 | 2020-07-08 | 삼성전자주식회사 | 메모리 소자 및 그 제조 방법 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3959781A (en) * | 1974-11-04 | 1976-05-25 | Intel Corporation | Semiconductor random access memory |
-
1979
- 1979-05-02 DE DE7979300757T patent/DE2964943D1/de not_active Expired
- 1979-05-02 EP EP79300757A patent/EP0005601B1/de not_active Expired
- 1979-05-11 US US06/038,016 patent/US4228525A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4228525A (en) | 1980-10-14 |
EP0005601A1 (de) | 1979-11-28 |
EP0005601B1 (de) | 1983-03-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB2014785B (en) | Semiconductor integrated circuit devices | |
JPS5591856A (en) | Semiconductor integrated circuit chip structure | |
DE3070410D1 (en) | Integrated memory circuit | |
JPS54154290A (en) | Planar semiconductor integrated circuit | |
DE3279429D1 (en) | Semiconductor integrated memory circuit | |
JPS554797A (en) | Semiconductor memory device | |
MY8700605A (en) | Semiconductor memory device | |
JPS54159827A (en) | Memory circuit | |
DE2965630D1 (en) | Semiconductor circuit | |
DE3071990D1 (en) | Semiconductor memory circuit | |
DE2964308D1 (en) | Semiconductor integrated circuit device | |
DE3072133D1 (en) | Semiconductor integrated circuit structure | |
JPS5580360A (en) | Nonnvolatile semiconductor memory | |
DE3176601D1 (en) | Semiconductor memory circuit | |
GB2143698B (en) | Semiconductor integrated memory circuit | |
GB2062391B (en) | Semiconductor memory circuit | |
GB2043337B (en) | Semiconductor integrated circuit devices | |
DE2964943D1 (en) | Semiconductor integrated memory circuit | |
IE810294L (en) | Semiconductor memory circuit | |
DE2962516D1 (en) | Semiconductor integrated circuit device | |
JPS54133083A (en) | Semiconductor circuit | |
DE2961954D1 (en) | Semiconductor integrated memory circuit | |
JPS5593593A (en) | Semiconductor memory | |
JPS54111789A (en) | Nonnvolatile semiconductor memory | |
DE2964801D1 (en) | Semiconductor integrated circuit device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: NIPPON TELEGRAPH AND TELEPHONE CORP., TOKIO/TOKYO, |