DE3270561D1 - A method for manufacturing a plastic encapsulated semiconductor device - Google Patents
A method for manufacturing a plastic encapsulated semiconductor deviceInfo
- Publication number
- DE3270561D1 DE3270561D1 DE8282103521T DE3270561T DE3270561D1 DE 3270561 D1 DE3270561 D1 DE 3270561D1 DE 8282103521 T DE8282103521 T DE 8282103521T DE 3270561 T DE3270561 T DE 3270561T DE 3270561 D1 DE3270561 D1 DE 3270561D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- encapsulated semiconductor
- plastic encapsulated
- plastic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12188—All metal or with adjacent metals having marginal feature for indexing or weakened portion for severing
- Y10T428/12194—For severing perpendicular to longitudinal dimension
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6489381A JPS57178352A (en) | 1981-04-28 | 1981-04-28 | Manufacture of resin sealing type semiconductor device and lead frame employed thereon |
JP6430781A JPS5710325A (en) | 1980-05-16 | 1981-04-30 | Device for simultaneously and continuously supplying powdered solid or liquid into treating machine |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3270561D1 true DE3270561D1 (en) | 1986-05-22 |
Family
ID=26405427
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE198282103521T Pending DE63811T1 (de) | 1981-04-28 | 1982-04-26 | Verfahren zum herstellen einer in kunststoff verkapselten halbleiteranordnung und ein leitergitter dafuer. |
DE8282103521T Expired DE3270561D1 (en) | 1981-04-28 | 1982-04-26 | A method for manufacturing a plastic encapsulated semiconductor device |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE198282103521T Pending DE63811T1 (de) | 1981-04-28 | 1982-04-26 | Verfahren zum herstellen einer in kunststoff verkapselten halbleiteranordnung und ein leitergitter dafuer. |
Country Status (4)
Country | Link |
---|---|
US (2) | US4451973A (de) |
EP (1) | EP0063811B1 (de) |
CA (1) | CA1200623A (de) |
DE (2) | DE63811T1 (de) |
Families Citing this family (84)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57147260A (en) * | 1981-03-05 | 1982-09-11 | Matsushita Electronics Corp | Manufacture of resin-sealed semiconductor device and lead frame used therefor |
US4641418A (en) * | 1982-08-30 | 1987-02-10 | International Rectifier Corporation | Molding process for semiconductor devices and lead frame structure therefor |
JPS59130449A (ja) * | 1983-01-17 | 1984-07-27 | Nec Corp | 絶縁型半導体素子用リードフレーム |
JPS59135753A (ja) * | 1983-01-25 | 1984-08-04 | Toshiba Corp | 半導体装置とその製造方法 |
IT1212780B (it) * | 1983-10-21 | 1989-11-30 | Ates Componenti Elettron | Contenitore in metallo e resina per dispositivo a semiconduttore adatto al fissaggio su un dissipatore non perfettamente piano e processo per la sua fabbricazione. |
JPS60186044A (ja) * | 1983-12-12 | 1985-09-21 | テキサス インスツルメンツ インコ−ポレイテツド | 集積回路装置 |
JPS60128646A (ja) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | 絶縁型パワートランジスタの製造方法 |
IT1213139B (it) * | 1984-02-17 | 1989-12-14 | Ates Componenti Elettron | Componente elettronico integrato di tipo "single-in-line" eprocedimento per la sua fabbricazione. |
JPS60176259A (ja) * | 1984-02-22 | 1985-09-10 | Toshiba Corp | 樹脂封止形半導体装置の製造方法 |
IT1180514B (it) * | 1984-07-27 | 1987-09-23 | Arcotroniks Italia Spa | Procedimento per la realizzazione di involucri protettivi in cui risultano annegati corrispondenti componenti elettrico elettronici |
US4862246A (en) * | 1984-09-26 | 1989-08-29 | Hitachi, Ltd. | Semiconductor device lead frame with etched through holes |
US5098630A (en) * | 1985-03-08 | 1992-03-24 | Olympus Optical Co., Ltd. | Method of molding a solid state image pickup device |
EP0206771B1 (de) * | 1985-06-20 | 1992-03-11 | Kabushiki Kaisha Toshiba | Verkapselte Halbleiteranordnung |
JPH0652732B2 (ja) * | 1985-08-14 | 1994-07-06 | 三菱電機株式会社 | パツシベ−シヨン膜の形成方法 |
US4721453A (en) * | 1986-03-05 | 1988-01-26 | Gte Communication Systems Corporation | Apparatus for encapsulating semiconductors |
EP0257681A3 (de) * | 1986-08-27 | 1990-02-07 | STMicroelectronics S.r.l. | Verfahren zur Herstellung von in Kunststoff eingeschmolzenen Halbleiterbauelementen und damit hergestellte Bauelemente |
US4857989A (en) * | 1986-09-04 | 1989-08-15 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
USRE37690E1 (en) * | 1987-02-25 | 2002-05-07 | Hitachi, Ltd. | Lead frame and semiconductor device |
US4942452A (en) * | 1987-02-25 | 1990-07-17 | Hitachi, Ltd. | Lead frame and semiconductor device |
IT1214254B (it) * | 1987-09-23 | 1990-01-10 | Sgs Microelettonica S P A | Dispositivo a semiconduttore in contenitore plastico o ceramico con "chips" fissati su entrambi i lati dell'isola centrale del "frame". |
US4904539A (en) * | 1987-09-30 | 1990-02-27 | Amp Incorporated | Continuous strip of electrical component assemblies and method of making same |
JPH01179332A (ja) * | 1987-12-31 | 1989-07-17 | Sanken Electric Co Ltd | 樹脂封止型電子装置の製造方法 |
US5049055A (en) * | 1987-12-31 | 1991-09-17 | Sanken Electric Co., Ltd. | Mold assembly |
US5133921A (en) * | 1987-12-31 | 1992-07-28 | Sanken Electric Co., Ltd. | Method for manufacturing plastic encapsulated electronic semiconductor devices |
US4952999A (en) * | 1988-04-26 | 1990-08-28 | National Semiconductor Corporation | Method and apparatus for reducing die stress |
US5049976A (en) * | 1989-01-10 | 1991-09-17 | National Semiconductor Corporation | Stress reduction package and process |
US4908935A (en) * | 1989-03-22 | 1990-03-20 | American Telephone And Telegraph Company, At&T Bell Laboratories | Method for fabricating electronic devices |
EP0400177A1 (de) * | 1989-05-31 | 1990-12-05 | Siemens Aktiengesellschaft | Verbindung eines Halbleiterbauelements mit einem Metallträger |
US4991002A (en) * | 1990-02-14 | 1991-02-05 | Motorola Inc. | Modular power device assembly |
US5083368A (en) * | 1990-02-14 | 1992-01-28 | Motorola Inc. | Method of forming modular power device assembly |
US5019893A (en) * | 1990-03-01 | 1991-05-28 | Motorola, Inc. | Single package, multiple, electrically isolated power semiconductor devices |
JPH0419114A (ja) * | 1990-05-15 | 1992-01-23 | Mitsubishi Electric Corp | インサート電極モールド体の製造方法 |
US5367766A (en) * | 1990-08-01 | 1994-11-29 | Staktek Corporation | Ultra high density integrated circuit packages method |
US5377077A (en) * | 1990-08-01 | 1994-12-27 | Staktek Corporation | Ultra high density integrated circuit packages method and apparatus |
US5446620A (en) * | 1990-08-01 | 1995-08-29 | Staktek Corporation | Ultra high density integrated circuit packages |
WO1992003035A1 (en) * | 1990-08-01 | 1992-02-20 | Staktek Corporation | Ultra high density integrated circuit packages, method and apparatus |
US5475920A (en) * | 1990-08-01 | 1995-12-19 | Burns; Carmen D. | Method of assembling ultra high density integrated circuit packages |
US5122858A (en) * | 1990-09-10 | 1992-06-16 | Olin Corporation | Lead frame having polymer coated surface portions |
IT1247649B (it) * | 1990-10-31 | 1994-12-28 | Sgs Thomson Microelectronics | Procedimento di incapsulamento in resina di un dispositivo a semiconduttore di potenza montato su dissipatore allontanando i reofori dal dissipatore mediante l'azione del controstampo in fase di chiusura dello stampo |
US5448450A (en) * | 1991-08-15 | 1995-09-05 | Staktek Corporation | Lead-on-chip integrated circuit apparatus |
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MX9205128A (es) * | 1991-09-30 | 1993-04-01 | Motorola Inc | Metodo para procesar un bloque de circuito integrado semiconductor. |
US5804870A (en) * | 1992-06-26 | 1998-09-08 | Staktek Corporation | Hermetically sealed integrated circuit lead-on package configuration |
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US5608267A (en) * | 1992-09-17 | 1997-03-04 | Olin Corporation | Molded plastic semiconductor package including heat spreader |
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US6205654B1 (en) | 1992-12-11 | 2001-03-27 | Staktek Group L.P. | Method of manufacturing a surface mount package |
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US5644161A (en) * | 1993-03-29 | 1997-07-01 | Staktek Corporation | Ultra-high density warp-resistant memory module |
US5801437A (en) * | 1993-03-29 | 1998-09-01 | Staktek Corporation | Three-dimensional warp-resistant integrated circuit module method and apparatus |
US5369056A (en) * | 1993-03-29 | 1994-11-29 | Staktek Corporation | Warp-resistent ultra-thin integrated circuit package fabrication method |
US5748658A (en) * | 1993-10-22 | 1998-05-05 | Matsushita Electric Industrial Co., Ltd. | Semiconductor laser device and optical pickup head |
JPH0846104A (ja) * | 1994-05-31 | 1996-02-16 | Motorola Inc | 表面実装電子素子およびその製造方法 |
US5506753A (en) * | 1994-09-26 | 1996-04-09 | International Business Machines Corporation | Method and apparatus for a stress relieved electronic module |
US6025642A (en) * | 1995-08-17 | 2000-02-15 | Staktek Corporation | Ultra high density integrated circuit packages |
US5886400A (en) * | 1995-08-31 | 1999-03-23 | Motorola, Inc. | Semiconductor device having an insulating layer and method for making |
JP3345241B2 (ja) * | 1995-11-30 | 2002-11-18 | 三菱電機株式会社 | 半導体装置 |
JP3305941B2 (ja) * | 1996-01-22 | 2002-07-24 | 株式会社村田製作所 | 電子部品 |
US5938038A (en) | 1996-08-02 | 1999-08-17 | Dial Tool Industries, Inc. | Parts carrier strip and apparatus for assembling parts in such a strip |
US5945732A (en) | 1997-03-12 | 1999-08-31 | Staktek Corporation | Apparatus and method of manufacturing a warp resistant thermally conductive integrated circuit package |
US6048744A (en) | 1997-09-15 | 2000-04-11 | Micron Technology, Inc. | Integrated circuit package alignment feature |
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-
1982
- 1982-04-13 US US06/367,809 patent/US4451973A/en not_active Expired - Lifetime
- 1982-04-26 DE DE198282103521T patent/DE63811T1/de active Pending
- 1982-04-26 DE DE8282103521T patent/DE3270561D1/de not_active Expired
- 1982-04-26 EP EP19820103521 patent/EP0063811B1/de not_active Expired
- 1982-04-27 CA CA000401752A patent/CA1200623A/en not_active Expired
-
1984
- 1984-02-17 US US06/581,251 patent/US4589010A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4451973A (en) | 1984-06-05 |
CA1200623A (en) | 1986-02-11 |
US4589010A (en) | 1986-05-13 |
EP0063811B1 (de) | 1986-04-16 |
DE63811T1 (de) | 1983-04-28 |
EP0063811A1 (de) | 1982-11-03 |
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Owner name: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., KADOMA, |