DE3280160D1 - Speichersystem mit selektiver zuweisung von reservespeicherzellen. - Google Patents

Speichersystem mit selektiver zuweisung von reservespeicherzellen.

Info

Publication number
DE3280160D1
DE3280160D1 DE8282111123T DE3280160T DE3280160D1 DE 3280160 D1 DE3280160 D1 DE 3280160D1 DE 8282111123 T DE8282111123 T DE 8282111123T DE 3280160 T DE3280160 T DE 3280160T DE 3280160 D1 DE3280160 D1 DE 3280160D1
Authority
DE
Germany
Prior art keywords
memory cells
storage system
reserve memory
selective assignment
assignment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8282111123T
Other languages
English (en)
Inventor
George Leroy Bond
Akella Venkata Surya Satya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3280160D1 publication Critical patent/DE3280160D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
DE8282111123T 1981-12-24 1982-12-02 Speichersystem mit selektiver zuweisung von reservespeicherzellen. Expired - Fee Related DE3280160D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/334,343 US4450559A (en) 1981-12-24 1981-12-24 Memory system with selective assignment of spare locations

Publications (1)

Publication Number Publication Date
DE3280160D1 true DE3280160D1 (de) 1990-05-31

Family

ID=23306787

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282111123T Expired - Fee Related DE3280160D1 (de) 1981-12-24 1982-12-02 Speichersystem mit selektiver zuweisung von reservespeicherzellen.

Country Status (4)

Country Link
US (1) US4450559A (de)
EP (1) EP0082981B1 (de)
JP (1) JPS58111200A (de)
DE (1) DE3280160D1 (de)

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US4922451A (en) * 1987-03-23 1990-05-01 International Business Machines Corporation Memory re-mapping in a microcomputer system
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US7447069B1 (en) 1989-04-13 2008-11-04 Sandisk Corporation Flash EEprom system
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US6081878A (en) * 1997-03-31 2000-06-27 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6728851B1 (en) 1995-07-31 2004-04-27 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US5907856A (en) * 1995-07-31 1999-05-25 Lexar Media, Inc. Moving sectors within a block of information in a flash memory mass storage architecture
US6801979B1 (en) 1995-07-31 2004-10-05 Lexar Media, Inc. Method and apparatus for memory control circuit
US6125435A (en) * 1995-09-13 2000-09-26 Lexar Media, Inc. Alignment of cluster address to block addresses within a semiconductor non-volatile mass storage memory
US5928370A (en) * 1997-02-05 1999-07-27 Lexar Media, Inc. Method and apparatus for verifying erasure of memory blocks within a non-volatile memory structure
US6034897A (en) * 1999-04-01 2000-03-07 Lexar Media, Inc. Space management for managing high capacity nonvolatile memory
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US6295231B1 (en) 1998-07-17 2001-09-25 Kabushiki Kaisha Toshiba High-speed cycle clock-synchronous memory device
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US6141249A (en) * 1999-04-01 2000-10-31 Lexar Media, Inc. Organization of blocks within a nonvolatile memory unit to effectively decrease sector write operation time
US7102671B1 (en) 2000-02-08 2006-09-05 Lexar Media, Inc. Enhanced compact flash memory card
US6426893B1 (en) 2000-02-17 2002-07-30 Sandisk Corporation Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
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US7167944B1 (en) 2000-07-21 2007-01-23 Lexar Media, Inc. Block management for mass storage
US6567307B1 (en) 2000-07-21 2003-05-20 Lexar Media, Inc. Block management for mass storage
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US7231643B1 (en) 2002-02-22 2007-06-12 Lexar Media, Inc. Image rescue system including direct communication between an application program and a device driver
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US7725628B1 (en) 2004-04-20 2010-05-25 Lexar Media, Inc. Direct secondary device interface by a host
US7370166B1 (en) 2004-04-30 2008-05-06 Lexar Media, Inc. Secure portable storage device
US7145816B2 (en) * 2004-08-16 2006-12-05 Micron Technology, Inc. Using redundant memory for extra features
US7594063B1 (en) * 2004-08-27 2009-09-22 Lexar Media, Inc. Storage capacity status
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US7526715B2 (en) * 2005-10-17 2009-04-28 Ramot At Tel Aviv University Ltd. Probabilistic error correction in multi-bit-per-cell flash memory
JP2007257791A (ja) * 2006-03-24 2007-10-04 Fujitsu Ltd 半導体記憶装置
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Also Published As

Publication number Publication date
EP0082981B1 (de) 1990-04-25
JPS58111200A (ja) 1983-07-02
US4450559A (en) 1984-05-22
EP0082981A2 (de) 1983-07-06
EP0082981A3 (en) 1985-11-27
JPS6132707B2 (de) 1986-07-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee