DE3373568D1 - Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system - Google Patents

Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system

Info

Publication number
DE3373568D1
DE3373568D1 DE8383201439T DE3373568T DE3373568D1 DE 3373568 D1 DE3373568 D1 DE 3373568D1 DE 8383201439 T DE8383201439 T DE 8383201439T DE 3373568 T DE3373568 T DE 3373568T DE 3373568 D1 DE3373568 D1 DE 3373568D1
Authority
DE
Germany
Prior art keywords
clock
clock system
multiple redundant
synchronizing clocks
mutually synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383201439T
Other languages
English (en)
Inventor
Jozef Laurentius Wilhe Kessels
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3373568D1 publication Critical patent/DE3373568D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1604Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
DE8383201439T 1982-10-11 1983-10-07 Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system Expired DE3373568D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL8203921A NL8203921A (nl) 1982-10-11 1982-10-11 Multipel redundant kloksysteem, bevattende een aantal onderling synchroniserende klokken, en klokschakeling voor gebruik in zo een kloksysteem.

Publications (1)

Publication Number Publication Date
DE3373568D1 true DE3373568D1 (en) 1987-10-15

Family

ID=19840391

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383201439T Expired DE3373568D1 (en) 1982-10-11 1983-10-07 Multiple redundant clock system comprising a number of mutually synchronizing clocks, and clock circuit for use in such a clock system

Country Status (6)

Country Link
US (1) US4779008A (de)
EP (1) EP0107236B1 (de)
JP (1) JPS5990125A (de)
CA (1) CA1210159A (de)
DE (1) DE3373568D1 (de)
NL (1) NL8203921A (de)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154221A (ja) * 1984-12-26 1986-07-12 Toshiba Corp 多数決回路
JPS6268314A (ja) * 1985-09-20 1987-03-28 Nec Corp タイミング信号同期方式
NL8502768A (nl) * 1985-10-10 1987-05-04 Philips Nv Dataverwerkingsinrichting, die uit meerdere, parallel-werkende dataverwerkingsmodules bestaat, multipel redundante klokinrichting, bevattende een aantal onderling zelf-synchroniserende klokschakelingen voor gebruik in zo een dataverwerkingsinrichting, en klokschakeling voor gebruik in zo een klokinrichting.
DE3638947C2 (de) * 1986-11-14 1995-08-31 Bosch Gmbh Robert Verfahren zur Synchronisation von Rechnern eines Mehrrechnersystems und Mehrrechnersystem
DE3643002A1 (de) * 1986-12-17 1988-06-30 Philips Patentverwaltung Schaltungsanordnung zur synchronisation von einrichtungen in den vermittlungs- und verstaerkerstellen eines zeitmultiplex-uebertragungssystems
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
JP2578817B2 (ja) * 1987-07-27 1997-02-05 日本電気株式会社 マイクロプロセツサ
US4788670A (en) * 1987-08-18 1988-11-29 Siemens Aktiengesellschaft Clock voltage supply
AU616213B2 (en) * 1987-11-09 1991-10-24 Tandem Computers Incorporated Method and apparatus for synchronizing a plurality of processors
JPH0797328B2 (ja) * 1988-10-25 1995-10-18 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン フオールト・トレラント同期システム
AU625293B2 (en) * 1988-12-09 1992-07-09 Tandem Computers Incorporated Synchronization of fault-tolerant computer system having multiple processors
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
EP0394725B1 (de) * 1989-04-28 1996-02-14 Siemens Aktiengesellschaft Taktverteilereinrichtung
US4979191A (en) * 1989-05-17 1990-12-18 The Boeing Company Autonomous N-modular redundant fault tolerant clock system
US5355090A (en) * 1989-10-06 1994-10-11 Rockwell International Corporation Phase corrector for redundant clock systems and method
US5295258A (en) * 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
US5203004A (en) * 1990-01-08 1993-04-13 Tandem Computers Incorporated Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections
US5118975A (en) * 1990-03-05 1992-06-02 Thinking Machines Corporation Digital clock buffer circuit providing controllable delay
US5124569A (en) * 1990-10-18 1992-06-23 Star Technologies, Inc. Digital phase-lock loop system with analog voltage controlled oscillator
US5295257A (en) * 1991-05-24 1994-03-15 Alliedsignal Inc. Distributed multiple clock system and a method for the synchronization of a distributed multiple system
US5373537A (en) * 1991-09-02 1994-12-13 Siemens Aktiengesellschaft Method and apparatus for the synchronization of a clock means of a telecommunication switching system
US5377205A (en) * 1993-04-15 1994-12-27 The Boeing Company Fault tolerant clock with synchronized reset
US5557623A (en) * 1994-08-12 1996-09-17 Honeywell Inc. Accurate digital fault tolerant clock
US5815041A (en) * 1996-04-12 1998-09-29 Silicon Image, Inc. High-speed and high-precision phase locked loop having phase detector with dynamic logic structure
US6141769A (en) * 1996-05-16 2000-10-31 Resilience Corporation Triple modular redundant computer system and associated method
KR100206476B1 (ko) * 1997-03-20 1999-07-01 윤종용 디지털 마이크로웨이브 시스템에서 송신용 국부발진주파수를 동기화시키기 위한 회로
US6326826B1 (en) 1999-05-27 2001-12-04 Silicon Image, Inc. Wide frequency-range delay-locked loop circuit
US6757350B1 (en) 1999-06-12 2004-06-29 Cisco Technology, Inc. Redundant clock generation and distribution
DE19947662A1 (de) * 1999-10-04 2001-04-12 Bayerische Motoren Werke Ag Betriebsverfahren für einen Datenbus
WO2002099609A1 (en) * 2001-06-06 2002-12-12 Marconi Communications, Inc. Multi-layer control interface for clock switching in a communications element
US6839391B2 (en) * 2002-01-08 2005-01-04 Motorola, Inc. Method and apparatus for a redundant clock
US6970045B1 (en) 2003-06-25 2005-11-29 Nel Frequency Controls, Inc. Redundant clock module
US7199671B2 (en) * 2005-03-31 2007-04-03 Hewlett-Packard Development Company, L.P. Systems and methods for clock generation using hot-swappable oscillators

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3859466A (en) * 1972-05-23 1975-01-07 Siemens Ag Reciprocal synchronization of oscillators of a time multiplex telephone communication network
CH556576A (de) * 1973-03-28 1974-11-29 Hasler Ag Einrichtung zur synchronisierung dreier rechner.
CH623669A5 (de) * 1973-11-14 1981-06-15 Agie Ag Ind Elektronik
JPS5620746Y2 (de) * 1974-07-04 1981-05-16
FR2379857A1 (fr) * 1977-02-07 1978-09-01 Cii Honeywell Bull Generateur de signaux d'horloges dans un systeme de traitement de l'information
FR2390856A1 (fr) * 1977-05-10 1978-12-08 Lannionnais Electronique Base de temps
US4239982A (en) * 1978-06-14 1980-12-16 The Charles Stark Draper Laboratory, Inc. Fault-tolerant clock system
FR2484104A1 (fr) * 1980-06-06 1981-12-11 Chomette Andre Boucle d'asservissement a microprocesseur
US4419629A (en) * 1980-06-25 1983-12-06 Sperry Corporation Automatic synchronous switch for a plurality of asynchronous oscillators
NL8202685A (nl) * 1982-07-05 1984-02-01 Philips Nv Kloksignaalregenerator met hoge stabiliteit.

Also Published As

Publication number Publication date
CA1210159A (en) 1986-08-19
JPS5990125A (ja) 1984-05-24
EP0107236A1 (de) 1984-05-02
US4779008A (en) 1988-10-18
JPH0420484B2 (de) 1992-04-03
NL8203921A (nl) 1984-05-01
EP0107236B1 (de) 1987-09-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8339 Ceased/non-payment of the annual fee