DE3464670D1 - A method for manufacturing a semiconductor device - Google Patents
A method for manufacturing a semiconductor deviceInfo
- Publication number
- DE3464670D1 DE3464670D1 DE8484108809T DE3464670T DE3464670D1 DE 3464670 D1 DE3464670 D1 DE 3464670D1 DE 8484108809 T DE8484108809 T DE 8484108809T DE 3464670 T DE3464670 T DE 3464670T DE 3464670 D1 DE3464670 D1 DE 3464670D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System further characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/934—Sheet resistance, i.e. dopant parameters
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/953—Making radiation resistant device
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58138858A JPS6031232A (ja) | 1983-07-29 | 1983-07-29 | 半導体基体の製造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE3464670D1 true DE3464670D1 (en) | 1987-08-13 |
Family
ID=15231786
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE8484108809T Expired DE3464670D1 (en) | 1983-07-29 | 1984-07-25 | A method for manufacturing a semiconductor device |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4579601A (de) |
| EP (1) | EP0133954B1 (de) |
| JP (1) | JPS6031232A (de) |
| DE (1) | DE3464670D1 (de) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62500340A (ja) * | 1984-09-28 | 1987-02-05 | モトロ−ラ・インコ−ポレ−テツド | 電荷蓄積空乏領域放電保護装置及び方法 |
| US4659400A (en) * | 1985-06-27 | 1987-04-21 | General Instrument Corp. | Method for forming high yield epitaxial wafers |
| JPH0712043B2 (ja) * | 1986-04-07 | 1995-02-08 | 日本電気株式会社 | 半導体基板 |
| JPH0237771A (ja) * | 1988-07-28 | 1990-02-07 | Fujitsu Ltd | Ｓｏｉ基板 |
| US5194395A (en) * | 1988-07-28 | 1993-03-16 | Fujitsu Limited | Method of producing a substrate having semiconductor-on-insulator structure with gettering sites |
| US5250445A (en) * | 1988-12-20 | 1993-10-05 | Texas Instruments Incorporated | Discretionary gettering of semiconductor circuits |
| DE4223914C2 (de) * | 1992-06-30 | 1996-01-25 | Fraunhofer Ges Forschung | Verfahren zum Herstellen eines vertikalen Leistungsbauelementes mit reduzierter Minoritätsträgerlebensdauer in dessen Driftstrecke |
| JP3333560B2 (ja) * | 1992-10-23 | 2002-10-15 | リコーエレメックス株式会社 | シリコン基板のエッチング方法 |
| JP3384506B2 (ja) * | 1993-03-30 | 2003-03-10 | ソニー株式会社 | 半導体基板の製造方法 |
| US5611855A (en) * | 1995-01-31 | 1997-03-18 | Seh America, Inc. | Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth |
| KR100328455B1 (ko) | 1997-12-30 | 2002-08-08 | 주식회사 하이닉스반도체 | 반도체소자의제조방법 |
| US6829814B1 (en) * | 2002-08-29 | 2004-12-14 | Delphi Technologies, Inc. | Process of making an all-silicon microphone |
| JP6187689B2 (ja) * | 2014-06-02 | 2017-08-30 | 株式会社Sumco | シリコンウェーハの製造方法 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2507366C3 (de) * | 1975-02-20 | 1980-06-26 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Unterdrückung parasitärer Schaltungselemente |
| US4053925A (en) * | 1975-08-07 | 1977-10-11 | Ibm Corporation | Method and structure for controllng carrier lifetime in semiconductor devices |
| US4001864A (en) * | 1976-01-30 | 1977-01-04 | Gibbons James F | Semiconductor p-n junction solar cell and method of manufacture |
| JPS5297666A (en) * | 1976-02-12 | 1977-08-16 | Hitachi Ltd | Production of semiconductor device containing pn junctions |
| DE2917455A1 (de) * | 1979-04-30 | 1980-11-13 | Ibm Deutschland | Verfahren zur vollstaendigen ausheilung von gitterdefekten in durch ionenimplantation von phosphor erzeugten n-leitenden zonen einer siliciumhalbleitervorrichtung und zugehoerige siliciumhalbleitervorrichtung |
| JPS5618430A (en) * | 1979-07-25 | 1981-02-21 | Fujitsu Ltd | Manufacture of semiconductor element |
| US4318750A (en) * | 1979-12-28 | 1982-03-09 | Westinghouse Electric Corp. | Method for radiation hardening semiconductor devices and integrated circuits to latch-up effects |
| US4328610A (en) * | 1980-04-25 | 1982-05-11 | Burroughs Corporation | Method of reducing alpha-particle induced errors in an integrated circuit |
| GB2085224B (en) * | 1980-10-07 | 1984-08-15 | Itt Ind Ltd | Isolating sc device using oxygen duping |
| JPS5787119A (en) * | 1980-11-19 | 1982-05-31 | Toshiba Corp | Manufacture of semiconductor device |
| JPS5814538A (ja) * | 1981-07-17 | 1983-01-27 | Fujitsu Ltd | 半導体装置の製造方法 |
| US4506436A (en) * | 1981-12-21 | 1985-03-26 | International Business Machines Corporation | Method for increasing the radiation resistance of charge storage semiconductor devices |
| US4459159A (en) * | 1982-09-29 | 1984-07-10 | Mara William C O | Method for making semi-insulating substrate by post-process heating of oxygenated and doped silicon |
| NL188923C (nl) * | 1983-07-05 | 1992-11-02 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| US4505759A (en) * | 1983-12-19 | 1985-03-19 | Mara William C O | Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals |
-
1983
- 1983-07-29 JP JP58138858A patent/JPS6031232A/ja active Pending
-
1984
- 1984-07-25 DE DE8484108809T patent/DE3464670D1/de not_active Expired
- 1984-07-25 EP EP84108809A patent/EP0133954B1/de not_active Expired
- 1984-07-27 US US06/635,434 patent/US4579601A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6031232A (ja) | 1985-02-18 |
| EP0133954B1 (de) | 1987-07-08 |
| EP0133954A1 (de) | 1985-03-13 |
| US4579601A (en) | 1986-04-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |